Discrete-time ΔΣ Modulators Research Articles

A Reconfigurable 0.1–10 MHz DT Passive Dynamic Zoom ADC for Cellular Receivers

This paper presents a multi-mode, dynamically zooming analog to digital converter (ADC). The architecture is based on a 5b interpolating flash ADC as the zooming unit and a passive discrete-time ΔΣ modulator as the fine conversion unit. The proposed ADC provides a dynamic zooming technique, employing an interpolating zooming front-end. The modulator covers between 0.1 MHz and 10 MHz signal bandwidth which makes it suitable for cellular applications including 4G radio systems. By reconfiguring the OSR, bias current, and component parameters, optimal power consumption can be achieved for every mode. The ADC is implemented in 0.13 μm CMOS technology and it achieves an SNDR of 83/75.7/73.2/67 dB for 0.1/1.92/5/10MHz bandwidth with 1.3/4.7/8.1/10.3mW power consumption from a 1.2 V supply.

Low-Power DT $\Delta \Sigma$ Modulators Using SC Passive Filters in 65 nm CMOS

A comparative design study of ultra-low-power discrete-time ΔΣ modulators (DT ΔΣMs) suited for medical implant devices is presented. Aiming to reduce the analog power consumption, the objective is to investigate the effectiveness of the switched-capacitor passive filter. Two design variants of 2nd-order ΔΣMs are analyzed and compared to a power-optimized standard active modulator (ΔΣM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AA</sub> ). The first variant (ΔΣM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AP</sub> ) employs an active filter in the 1st stage and a passive filter in the less critical 2nd stage. The second variant (OTA-less ΔΣM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PP</sub> ) makes use of passive filters in both stages. For practical verification, all three modulators are implemented on a single chip in 65 nm CMOS technology. Designed for 500-Hz signal bandwidth, the ΔΣM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AA</sub> , ΔΣM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AP</sub> , and ΔΣM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PP</sub> achieve 76 dB, 70 dB and 67 dB peak SNDR, while consuming 2.1 μW, 1.27 μW, and 0.92 μW, respectively, from a 0.9 V supply. Furthermore, the ΔΣM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PP</sub> can operate at a supply voltage reduced to 0.7 V, achieving a 65 dB SNDR at 430 nW power and 0.296 pJ/step.

Multirate Cascaded Discrete-Time Low-Pass ΔΣ Modulator for GSM/Bluetooth/UMTS

This paper shows that multirate processing in a cascaded discrete-time ΔΣ modulator allows to reduce the power consumption by up to 35%. Multirate processing is possible in a discrete-time ΔΣ modulator by its adaptibility with the sampling frequency. The power reduction can be achieved by relaxing the sampling speed of the first stage and increasing it appropriately in the second stage. Furthermore, a cascaded ΔΣ modulator enables the power efficient implementation of multiple communication standards.@The advantages of multirate cascaded ΔΣ modulators are demonstrated by comparing the performance of single-rate and multirate implementations using behavioral-level and circuit-level simulations. This analysis has been further validated with the design of a multirate cascaded triple-mode discrete-time ΔΣ modulator. A 2-1 multirate low-pass cascade, with a sampling frequency of 80 MHz in the first stage and 320 MHz in the second stage, meets the requirements for UMTS. The first stage alone is suitable for digitizing Bluetooth and GSM with a sampling frequency of 90 and 50 MHz respectively. This multimode ΔΣ modulator is implemented in a 1.2 V 90 nm CMOS technology with a core area of 0.076 mm2. Measurement results show a dynamic range of 66/77/85 dB for UMTS/ Bluetooth/GSM with a power consumption of 6.8/3.7/3.4 mW. This results in an energy per conversion step of 1.2/0.74/2.86 pJ.