We investigated the application of compact and densely integrated silicon photonics (SiP) switches and controlled them using layer 2 labels to achieve low-latency and low-power-consumption data transfer for resource disaggregation and convergence in edge/cloud computing platforms. We utilize virtual LAN identifiers of the standardized Ethernet frame as labels of the packet, which were read by the look-up table (LUT) formed in a field-programmable gate array to control the output destination of the switch. During the label control operation, a delay of 140 ns in the LUT is observed using the software and considering delay in label addition/identification and the off-logic processing delay in transmission/reception, the delay in label addition/identification can be expected to be on the order of microseconds. Three SiP Mach-Zehnder-Interferometer-type switches were monolithically integrated with three inputs and four outputs. The bit error rate (BER) of each switch path was measured, and it was found that the BER was less than 10−8 at all paths.
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