Direct Digital Synthesis Technique Research Articles

High-precision high-stability acousto-optic pulse picking driver with a direct digital synthesis technique.

A method for maintaining a fixed phase relationship between the driving signal of acousto-optic modulator (AOM) and the original mode-locked seed laser is proposed and realized, which stabilizes the amplitude of diffracted signal output from the AOM for subsequent amplification. A field-programmable gate array (FPGA), combined with external summing amplifiers, is used to directly synthesize high-timing-precision driving signals that are synchronized with the seed laser pulses, and the accuracy of signal timing control reaches 160 ps. Using this driver, the standard deviation of the diffracted signal output from the AOM is significantly decreased from 0.52% to 0.18%. This pulse-picking solution also includes a control system that can flexibly control the frequency, gating width, etc., of the driving signal, which makes it more convenient for subsequent laser amplification and makes it suitable for a variety of mode-locked lasers.

A High-Resolution LED Stimulator for Steady-State Visual Stimulation: Customizable, Affordable, and Open Source.

Visually evoked steady-state potentials (SSVEPs) are neural responses elicited by visual stimuli oscillating at specific frequencies. In this study, we introduce a novel LED stimulator system explicitly designed for steady-state visual stimulation, offering precise control over visual stimulus parameters, including frequency resolution, luminance, and the ability to control the phase at the end of the stimulation. The LED stimulator provides a personalized, modular, and affordable option for experimental setups. Based on the Teensy 3.2 board, the stimulator utilizes direct digital synthesis and pulse width modulation techniques to control the LEDs. We validated its performance through four experiments: the first two measured LED light intensities directly, while the last two assessed the stimulator's impact on EEG recordings. The results demonstrate that the stimulator can deliver a stimulus suitable for generating SSVEPs with the desired frequency and phase resolution. As an open source resource, we provide comprehensive documentation, including all necessary codes and electrical diagrams, which facilitates the system's replication and adaptation for specific experimental requirements, enhancing its potential for widespread use in the field of neuroscience setups.

In-Phase and Quadrature-Phase Sinusoidal Signal Generation Using DDS Technique

In-phase and quadrature-phase (IQ) sinusoidal signals are used as bases functions in many phase modulation schemes in communication systems. Generating such signals in engineering education laboratories without higher-end signal generators is quite challenging. Most of the time, the IQ signals used in undergraduate engineering education laboratories are in audio frequency range that is used to demonstrate or experiment with various phase modulation schemes. This paper presents a method to generate IQ sinusoids in the audio frequency range using direct digital synthesis technique. The system developed is simulated using MathWorks® Simulink and implemented on commonly available Xilinx’s® Spartan 6 FPGA. The system designed is capable of producing phase correct sine and cosine waves having frequencies between 1 Hz and 20 kHz.

Design and Analysis of Low Power and High SFDR Direct Digital Frequency Synthesizer

Due to the advantages of fast frequency shifting, continuous phase shifting, fine frequency resolution, large bandwidth, and excellent spectral purity, the direct digital frequency synthesis (DDFS) technique is attracting more attention than ever before. Although the DDFS suffer from high power consumption, recent researches on the development of the low power DDFS (LP-DDFS) increases the feasibility of applying the DDFS to portable devices. To further accelerate the use of LP-DDFS, a new LP-DDFS design to significantly improve power efficiency is proposed and analyzed in this paper. In the new design, the dominant spur by truncation errors causing performance degradation has been also thoroughly considered. Since the existing dithering techniques for the truncation error problems can cause the additional performance degradation due to the side effects such as frequency offset and SNDR deterioration, an enhanced dithering technique is also proposed in this paper. The proposed technique includes a frequency compensation circuit and thus minimizes the truncation errors in the LP-DDFS with the minimal additional power consumption and SNDR degradation. Both theoretical and experimental analysis are conducted to verify the proposed design, where a prototype chip is fabricated and measured.

Long Range Backscatter Communication Method Based on Direct Digital Frequency Synthesis

Long Range(LoRa) Backscattering Communication (BC) not only has the advantages of low cost and low power consumption, but also has a long communication distance. However, the existing LoRa BC scheme is complex and can not be applied to actual engineering. For this purpose, a new LoRa BC method is proposed. A Direct Digital frequency Synthesis (DDS) technique is used to generate a square wave with a linear frequency variation as a LoRa scattering modulation signal. For the first time, the prototype of LoRa BC system based on MCU is demonstrated. Experimental results show that design can successfully realize backscatter communication at any position between the station and the receiver which are 208 meters apart, while being compatible with commodity LoRa chipset. In addition, the method is also applicable to an Application Specific Integrated Circuit (ASIC) design, which enables the LoRa backscattering IC to have higher robustness, lower cost, and lower power consumption.

A Generalized and Flexible Control Scheme for Photovoltaic Grid-Tie Microinverters

In this paper, design and implementation of a flyback photovoltaic (PV) microinverter based on the direct digital synthesis (DDS) technique has been described for both the standalone and the grid-connected operation. The DDS technique adopted provides flexibility in the implementation of various control schemes of the PV microinverter on a simple low-cost digital signal processing type of microprocessor (dsPIC). As compared with the conventional look-up-table method used for generating sinusoidal output voltage waveforms by digital signal processing, a much higher resolution can be obtained in the voltage phase angle and magnitude owing to the adaptive nature of the look-up table implemented within the DDS architecture. The DDS technique is used in the implementation of all control schemes of a PV microinverter, such as maximum power point tracking (MPPT), phase-locked-loop (PLL), anti-islanding, and low-voltage ride-though (LVRT), with an integrated software run on a simple microcontroller. A dedicated computer simulation model is developed, where the PV panel model, the PLL in DQ reference frame, the MPPT algorithm, and the anti-islanding and LVRT features are all taken into account. The experimental results obtained on a 120-W PV flyback microinverter have verified the validity of the proposed technique for both the steady-state and the transient-state operation. The DDS technique is thus found to be quite convenient for application to module integrated converters.

An Improved Design of Automatic-Identification-System-Based Man Overboard Device: A Multidisciplinary Product

In this paper, the improved design of a small automatic-identification-system (AIS) based man overboard (MOB) device is described. The device is one of the state-of-the-art maritime vehicular technologies and has been widely used in marine vehicles for search and rescue (SAR) purposes. Similar devices have been available in the market for years; however, the design methodology and hardware circuitries have never been exposed in literature. This paper first reviews the basic principles of Gaussian minimum-shift keying modulation and the direct digital frequency synthesis technique. Second, the design methodology and hardware implementation of subsystems of the device with design objectives in effective SAR are presented. Finally, a prototype of the AIS MOB was fabricated and fully tested. The experimental results demonstrate that the emitted signal spectrum meets the AIS standards. The fabricated prototype has a minimum effective range of five nautical miles with a battery life of 36 h under continuous operation. This AIS MOB device is a multidisciplinary design product. The described work comprises of active antenna design, the microcontroller-based AIS control circuit design, the global positioning system circuit design, and the implementation of Gaussian minimum-shift keying modulation.

Portable signal conditioning system of a MEMS magnetic field sensor for industrial applications

We present a portable signal conditioning system of a micromachined magnetic field sensor. This system, implemented on a printed circuit board, includes a new algorithm for two sinusoidal signal generators, which bias the magnetic field sensor. This algorithm uses the direct digital synthesis technique for two embedded peripheral interface microcontrollers. The magnetic field sensor consists of a resonant silicon structure (600 µm × 700 µm × 5 µm), an aluminum loop (1 µm thickness), and a Wheatstone bridge of four type-p piezoresistors. The two signal generators have a frequency stability of ±100 ppm and a resolution of 1 Hz. With this system, the magnetic field sensor has a linear approximately response in voltage mode as well as experimental sensitivity and resolution of 0.32 V Tź1 and 35 nT at atmospheric pressure, respectively. A virtual instrument is designed to visualize the output voltage of the magnetic field sensor. The signal conditioning system of the sensor could be used as industrial portable equipment to detect residual magnetic fields of ferromagnetic materials.

Design of Arbitrary Waveform Generator Based on Direct Digital Synthesis Technique Using Code Composer Studio Platform

This paper deals with the design of arbitrary waveform generator using the Direct Digital Synthesis (DDS) technique. The key idea is the utilization of Look-up Table (LUT) supported with Code Composer Studio (CCS) platform. The synthesized arbitrary waveform is generator by storing the samples of the signal described by mathematical equation in the form of LUT in the memory of TMS320VC5416 Digital Signal Processor (DSP) and subsequently by recalling the stored samples periodically. The D/A converter generated the analog waveform. Experimental results have been included.

Generation of linear frequency modulation signal with reduced round-off error using pulse-output direct digital synthesis technique

The pulse-output Direct Digital Synthesis (DDS), in which the overflow signal of the phase accumulator is used for the pulse output, can be easily implemented due to its simple hardware architecture and low algorithm complexity. This paper introduces the fundamentals for generating Linear Frequency Modulation (LFM) pulse using pulse-output DDS technique. Error introducing mechanisms that affect the accuracy of signal's duration, initial phase, and frequency are studied. Extensive analysis of round-off error is given. A modified hardware architecture for LFM pulse generation with reduced round-off error is proposed. Experiment results are given, which shows that the proposed generator is promising in applications such as sonar transmitters.

Simplified Analogue Realization of the Digital Direct Synthesis (DDS) Technique for Signal Generation

The design of signal generators has evolved through various analog techniques and in the recent years has seen the adoption of digital design methods owing to tremendous advantages that digital methods offer over analog. This work studied Direct Digital Synthesis (DDS) technique and the implementation was done using simplified yet innovative approach to realize the memory data storage of signal points on look-up tables in a PROM and also the DAC.

Improvement Hardware Design of High Power and Ultra-Low Frequency Signal Source in Cased Hole Resitivity Logging

The cased hole resistivity logging technology is one of high-tech logging technologies being studied in China. The signal source requires high voltage, high current, ultra-low frequency, high stability, high resolution, etc. Based on the characteristics, proposed were the ideas that the direct digital synthesis technique should be applied to produce the required sine logging exciting signals, and high-power FET were used to produce the signals with high power and high voltage. The results show that the output frequency of signal source is 0~ 10 Hz, frequency resolution 0. 002 Hz, output voltage range -300 V~+300V, output current less than 6 A. The design has been successfully applied in the research project of extremely weak nV-level electric signal acquisition theory and experimental study on formation resistivity measurement through metal casing.

A digital magnetic resonance imaging spectrometer using digital signal processor and field programmable gate array

A digital spectrometer for low-field magnetic resonance imaging is described. A digital signal processor (DSP) is utilized as the pulse programmer on which a pulse sequence is executed as a subroutine. Field programmable gate array (FPGA) devices that are logically mapped into the external addressing space of the DSP work as auxiliary controllers of gradient control, radio frequency (rf) generation, and rf receiving separately. The pulse programmer triggers an event by setting the 32-bit control register of the corresponding FPGA, and then the FPGA automatically carries out the event function according to preset configurations in cooperation with other devices; accordingly, event control of the spectrometer is flexible and efficient. Digital techniques are in widespread use: gradient control is implemented in real-time by a FPGA; rf source is constructed using direct digital synthesis technique, and rf receiver is constructed using digital quadrature detection technique. Well-designed performance is achieved, including 1 μs time resolution of the gradient waveform, 1 μs time resolution of the soft pulse, and 2 MHz signal receiving bandwidth. Both rf synthesis and rf digitalization operate at the same 60 MHz clock, therefore, the frequency range of transmitting and receiving is from DC to ~27 MHz. A majority of pulse sequences have been developed, and the imaging performance of the spectrometer has been validated through a large number of experiments. Furthermore, the spectrometer is also suitable for relaxation measurement in nuclear magnetic resonance field.

Design of Improved DDS Signal Generator Based on Amplitude to Phase Sampling

Abstract: In this paper, the working principle of the Direct Digital frequency Synthesis (DDS) technique is briefly introduced. The main source of the spurious output is analyzed. After derived how to reduce the spurious signals, an improved DDS based on Amplitude to Phase sampling is proposed. It can decrease the phase truncation error to improve the frequency stability, reduce the phase quantization error, and save storage space. In the end, the simulation results display the performance of this DDS system.

Signal Generator Based on Direct Digital Synthesis Techniques

This paper describes a design of signal generator based on direct digital synthesis technique (DDS). According to the basic principles of DDS using Matlab/DSP Builder establish DDS model, then compiling by the SignalCompiler tools and generating VHDL code. Finally download the relevant documents to the field programmable gate array (FPGA) chip EP2C5Q208C8N. EP2C5Q208C8N and digital-analog chip DAC908, high-speed operational amplifier THS4001 together to complete the signal generator’s hardware design. The system can output sine wave, square wave, triangle wave, phase shift keying (PSK), amplitude shift keying (ASK) and frequency shift keying (FSK). It’s stable, reliable and fairly practical.

Distributed Transmit Beamforming without Phase Feedback

Phase feedback and adjustment between wireless nodes greatly reduce the power efficiency of distributed beamforming. In this paper, we propose a distributed transmit beamforming method without any phase feedback between nodes. The concept of our approach is to have the received signals retrace their ways, so that the phase offset of the forward path compensates that of the backward path; as a result, signals from different nodes in-phase combine at the destination. Therefore, the received power or the communication range is increased. In order to implement the concept of "retracement", we also propose a transceiver prototype which is based on the Direct Digital Synthesis technique. Experimental and simulation results validate the effectiveness of our approach.

Development of analytically capable time-of-flight mass spectrometer with continuous ion introduction

The present article describes the results and findings explored in the course of the development of the analytically capable prototype of continuous time-of-flight (CTOF) mass spectrometer. Currently marketed pulsed TOF (PTOF) instruments use ion introduction with a 10 ns or so pulse width, followed by a waiting period roughly 100 micros. Accordingly, the sample is under excitation in 10(-4) part of the total measuring time. This very low duty cycle severely limits the sensitivity of the PTOF method. A possible approach to deal with this problem is to use linear sinusoidal dual modulation technique (CTOF) as described in this article. This way the sensitivity of the method is increased, due to the 50% duty cycle of the excitation. All other types of TOF spectrometer use secondary electron multiplier (SEM) for detection, which unfortunately discriminates in amplification in favor of the lighter ions. This discrimination effect is especially undesirable in a mass spectrometric method, which targets high mass range. In CTOF method, SEM is replaced with Faraday cup detector, thus eliminating the mass discrimination effect. Omitting SEM is made possible by the high ion intensity and the very slow ion detection with some hundred hertz detection bandwidth. The electrometer electronics of the Faraday cup detector operates with amplification 10(10) V/A. The primary ion beam is highly monoenergetic due to the construction of the ion gun, which made possible to omit any electrostatic mirror configuration for bunching the ions. The measurement is controlled by a personal computer and the intelligent signal generator Type Tabor WW 2571, which uses the direct digital synthesis technique for making arbitrary wave forms. The data are collected by a Labjack interface board, and the fast Fourier transformation is performed by the software. Noble gas mixture has been used to test the analytical capabilities of the prototype setup. Measurement presented proves the results of the mathematical calculations as well as the future potentiality for use in chemical analysis of gaseous mixtures.

A DDS Waveform Generator for Electromagnetic Non-Destructive Testing

A direct digital synthesis (DDS) waveform generator for electromagnetic non-destructive testing (NDT) is presented in order to improve the measurement quality. The advantage and disadvantage of analogue and digital circuit waveform generators are analyzed. The DDS technique is preferred. The principle of DDS technique is introduced and the hardware and software design of a DDS waveform generator is described. The characteristics of the waveform generator based on a DDS chip AD7008 are that the signal frequency is of high stability, high precision and high resolution. Furthermore, the amplitude, frequency and phase can be continuously adjusted. An experimental electromagnetic NDT system is built and the testing results are analyzed. The system uses digitally generated sine waves as exciting, reference and demodulation signals. Experimental results show that the DDS waveform generator improves the signal-to-noise ratio. This kind of wave generation circuit is used not only in NDT but also in other instruments, such as electrical impedance tomography (EIT), which need signals with high stability, high precision and high resolution.

Arbitrary Waveform DDFS Utilizing Chebyshev Polynomials Interpolation

A new technique of arbitrary waveform direct digital frequency synthesis (DDFS) is introduced. In this method, one period of the desired periodic waveform is divided into m sections, and each section is approximated by a series of Chebyshev polynomials up to degree d. By expanding the resultant Chebyshev polynomials, a power series of degree d is produced. The coefficients of this power series are obtained by a closed-form direct formula. To reconstruct the desired signal, the coefficients of the approximated power series are placed in a small ROM, which delivers the coefficients to the inputs of a digital system. This digital system contains digital multipliers and adders to simulate the desired polynomial, as well as a phase accumulator for generating the digital time base. The output of this system is a reconstructed signal that is a good approximation of the desired waveform. The accuracy of the output signal depends on the degree of the reconstructing polynomial, the number of subsections, the wordlength of the truncated phase accumulator output, as well as the word length of the DDFS system output. The coefficients are not dependent on the sampling frequency; therefore, the proposed system is ideal for frequency sweeping. The proposed method is adopted to build a traditional DDFS to generate a sinusoidal signal. The tradeoff between the ROM capacity, number of sections, and spectral purity for an infinite output wordlength is also investigated.

A low-power DS-CDMA RAKE receiver utilizing resource allocation techniques

This paper presents architectural and implementation innovations made to realize a self-contained front-end processor for any DS-CDMA-based system. At the heart of the ASIC is a highly flexible RAKE processing engine that utilizes a unique resource allocation technique for maximum flexibility. The front-end of the chip consists of a matched filter and an all digital timing and frequency recovery loop based on interpolation and direct digital frequency synthesis (DDFS) techniques. A highly configurable multipath combiner is used to generate the final demodulated symbols by combining contributions from different multipath in a maximal ratio combining scheme. The combiner is also instrumental in performing channel estimation/correction and in closing the loop on the timing and frequency recovery circuits. The chip also features a multipath searcher which performs an energy scan of the wireless channel to decide on new valid multipath. To minimize power consumption and enhance the flexibility of the architecture a unique data tagging technique is utilized to decouple the sampling rate of the incoming data from the processing frequency of different blocks of the ASIC. All resources are programmable via a microcontroller interface that provides firmware control over system resources. Furthermore, the architecture supports the concept of design reuse by enabling simple modular expansion as a means of increasing resources. The resulting layout area is 8.29 mm/sup 2/ in a 0.18-/spl mu/m 1-poly 6-metal CMOS process and consists of 320000 equivalent gates. The core consumes a total of 4.032 mW in a typical load scenario including full demodulation of two RAKE fingers and simultaneous searching for new multipath.