Digital Predistortion Linearization Research Articles

Full-Wave Digital Predistortion Linearization Based on Memory Polynomials for HF Power Amplifiers

Full-Wave Digital Predistortion Linearization Based on Memory Polynomials for HF Power Amplifiers

GPU versus FPGA implementation of a digital predistortion linearizer for wideband radiofrequency power amplifiers

This paper presents and compares the implementation of a digital predistortion (DPD) linearizer for radiofrequency power amplifiers (PAs) considering two different hardware acceleration platforms. Both graphics processing unit (GPU)-based and field programmable gate arrays (FPGA)-based implementations of the DPD are capable to meet the high throughput requirements for linearizing the PA with current 5G new radio (NR) wideband signals. A comparison in terms of hardware resources usage, precision, throughput and linearization performance is provided for both GPU and FPGA implementations of a DPD based on the generalized memory polynomial (GMP) behavioral model.

Attention mechanism based bidirectional LSTM model for broadband power amplifier linearization

AbstractIn this letter, a novel digital predistortion (DPD) model for broadband power amplifier (PA) linearization is proposed, namely Attention Mechanism based Bidirectional Long Short‐term Memory Network (AM‐BiLSTM) model. In order to verify the linearization performance of the AM‐BiLSTM model in digital predistortion process, a 100 MHz bandwidth 5G new radio (5G NR) signal is employed to test a sub‐6G PA operating at 2.6‐GHz. The experimental results show that the adjacent channel power ratio (ACPR) of the PA with AM‐BiLSTM model can be improved by 24 dB which is 6 dB and 3 dB better than the generalized memory polynomial (GMP) model and the Chebyshev polynomials LSTM (CP‐LSTM) model in ref [1], repspectively. Therefore, the proposed AM‐BiLSTM model is very effective for the DPD linearization of broadband PAs.

Digital Predistortion Linearization of a GaN HEMT Push-Pull Power Amplifier for Cable Applications With High Fractional Bandwidth

This paper presents two linearization strategies for a custom-designed wideband push-pull (PP) power amplifier (PA) for wired communication applications such as, for example, cable TV. Two digital predistortion (DPD) behavioral models are proposed to meet the in-band and out-of-band linearity requirements when efficiently amplifying wideband DOCSIS signals with high fractional bandwidth (FBW). A radiofrequency (RF) DPD linearizer based on a band-pass generalized memory polynomial (BP-GMP) behavioral model and a baseband (BB) I-Q DPD linearizer based on a harmonic distortion GMP (HD-GMP) behavioral model are proposed. Both DPD models take into account the harmonic distortion typical of high FBW amplification. Experimental results will show high efficient and linear amplification of a 4 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> 192 MHz composite DOCSIS signal by properly combining a crest factor reduction (CFR) technique and the proposed DPD strategies.

Towards optimization of 5G NR transport over fiber links performance in 5G Multi-band Networks: An OMSA model approach

The application of analog radio over fiber (A-RoF) systems for 5G new radio (NR) multiband waveforms presents challenges, including nonlinearity introduced by the Mach Zehnder Modulator and the dispersion and attenuation of the optical signal over long fiber lengths. To address these challenges, this paper proposes a new version of the magnitude-selective affine (MSA) model, named the optimized magnitude-selective affine (OMSA) model, which incorporates a power-reliant weighting function to improve performance while reducing complexity via Digital Predistortion (DPD). The OMSA model is tested using 5G NR signals at 10 GHz with 50 MHz and flexible-waveform signals at 2.14 GHz with a 20 MHz bandwidth, transmitted over a 10 km fiber length using a Mach Zehnder Modulator and a 1550 nm optical carrier. The performance of the OMSA model is compared to the MSA and generalized memory polynomial (GMP) models in terms of adjacent channel power ratio, error vector magnitude, and complexity. The results show that the OMSA model outperforms the MSA and GMP models in terms of performance reducing the error vector magnitude to 1.9% as compared to 4% and 3% in case of GMP and MSA respectively. Additionally, in terms of complexity measured via coefficients, OMSA is 168 times more efficient as compared to GMP and offers 1.93 times higher efficiency as compared to MSA while maintaining lower complexity. The experimental demonstration of 5G NR multiband waveforms over A-RoF links using the OMSA model represents a significant step towards the practical implementation of high-performance, low-complexity 5G NR systems over fiber-optic links and provides a promising solution to the challenges associated with DPD linearization for A-RoF systems.

Signal Reconstruction Deep Residual Neural Network-Based Bandwidth Augmented Methods for DPD Linearization

In this letter, a signal reconstruction deep residual neural network (SRDRNN)-based bandwidth augmented method for digital predistortion (DPD) linearization of a radio frequency (RF) power amplifier (PA) is proposed. The SRDRNN is utilized to interpolate the samples from the analog-to-digital (ADC) converter in the DPD feedback path of the RF PA so as to increase its bandwidth. The experimental results illustrate that the SRDRNN can accurately produce the out-of-band spectrum regrowth of the equivalent baseband signal for a PA. It can also be directly applied to another PA with the same type. Finally, the effectiveness of SRDRNN-based bandwidth augmented method is verified with DPD linearization experiment. Both of the feedback signals reconstructed by the SRDRNN for the training PA and the test PA exhibit an excellent linearization performance.

A System Approach for Efficiency Enhancement and Linearization Technique of Dual-Input Doherty Power Amplifier

In this paper, we propose an efficient system approach to improve the power efficiency of dual-input Doherty power amplifier (DIDPA) with maintaining its linearity level. An auto-tuning process based on a hybrid heuristic search control (HHSC) is applied to optimally define DIDPA configuration by optimizing its free parameters. Digital predistortion (DPD) is then integrated to linearize DIDPA using an optimal reduced-complexity model based on the segmentation approach. An optimal pruning process of the free parameters, based on hill-climbing (HC) heuristics, is proposed to reduce the HHSC complexity in order to refine the optimal DIDPA configuration. The system approach has been approved by experimental results, in different scenarios, using an LTE 20 MHz signal with a PAPR of 8 dB. DPD linearization under optimal DIDPA configuration improved linearity using a low-complex model with only 30 coefficients, which exhibited an error vector magnitude (EVM) of 2.5% and an adjacent channel power ratio (ACPR) of −50 dB at an averaged output power of 34 dBm. By updating the cost function coefficients and pruning the free parameters, DIDPA exhibited an EVM of 3%, an ACPR of −50 dB, and a drain efficiency of 47% at an average output power of 39 dBm.

Digital Linearization of Wideband Envelope Tracking Power Amplifiers for Mobile Terminals

This article presents a low-complexity linearization method to compensate for multisource nonlinear distortion in wideband envelope tracking (ET) power amplifiers (PAs) for 5G new radio (NR) mobile terminals. The proposed linearization approach consists in an envelope leakage cancellation (ELC) system operating in the dynamic supply path and a 2-D digital predistortion (2-D-DPD) linearizer acting on the baseband complex modulated signal. In a first step, an envelope generalized memory polynomial (EGMP) behavioral model is proposed to compensate for the unwanted radio frequency (RF) leakage that appears at the output of ET modulator (ETM). Then, a baseband 2-D-DPD linearizer based on a slow envelope-dependent generalized memory polynomial (SED-GMP) behavioral model is used to further enhance the linearization performance. The proposed method is validated on a system-on-chip (SoC) ET PA board for mobile applications. The reported experimental results show how the proposed digital linearization approach can mitigate the linearity and efficiency trade-off in ET PAs. Consequently, the out-of-band linearity requirement of −36 dBc of adjacent channel power ratio (ACPR) is met for 5G-NR test signals with bandwidths ranging from 60 to 200 MHz at 2.55 GHz (band B41), with an overall ET PA power efficiency ranging from 10.1% and up to 16.5%, depending on the signal bandwidth.

A General Digital Predistortion Linearization Scheme for Hybrid Beamforming System

Hybrid beamforming multiple-input multiple-output (MIMO) system has attracted a lot of attention in recent years since it significantly reduces the hardware cost compared to the fully digital beamforming system. However, with hybrid beamforming, the one-to-one mapping between the radio frequency (RF) chain and the nonlinear power amplifier (PA) is destroyed. The PA nonlinearity cannot be compensated by conventional digital predistortion (DPD) algorithms. In this article, we propose a novel multiple-input DPD model for hybrid beamforming MIMO systems. An extra digital compensation block is introduced in the feedback path. With the feedback compensation block, the proposed DPD can linearize the PA output signal as well as the aggregated far-field signal. What is more, we propose a DPD estimation algorithm with much reduced complexity. Comparing to existing solutions, the proposed scheme achieves satisfactory performance for hybrid beamforming system. It does not rely on the measurement of the channel or the assumption of massive antennas. Simulation results demonstrate the effectiveness of the proposed DPD scheme.

Doherty Power Amplifier With Extended High-Efficiency Range Based on the Utilization of Multiple Output Power Back-Off Parameters

This article presents a novel method of extending the high-efficiency range of Doherty power amplifiers (DPAs) by utilizing multiple output power back-off (OBO) parameters. The OBO extension techniques of the DPAs, such as complex combining load (CCL), virtual stub (VS), and out-phased current combining (OCC) methods, were defined, and a general expression for these OBO extension techniques was derived. Using the general expression, three OBO extension methods were comparatively and comprehensively analyzed. Based on the analysis, the DPA with an extended OBO can be designed by simultaneously employing multiple back-off techniques with a high degree of freedom. To verify the general expression and its analysis, a DPA design for the frequency band of 3.45–3.75 GHz with GaN HEMTs was conducted using multiple OBO extension techniques of VS and OCC methods for a large OBO of 8.5 dB. Using a long-term evolution (LTE) signal with a signal bandwidth of 20 MHz and a peak-to-average power ratio (PAPR) of 8 dB, the drain efficiency (DE) of 38.9%–56.8% was achieved at the average output power levels of 34.4–36.8 dBm while satisfying ACLR of no larger than −45 dBc with digital predistortion (DPD) linearization. Under excitation of a 5G new radio (NR) signal with a signal bandwidth of 100 MHz and a PAPR of 8 dB, the DE of 38.5%–50.2% was achieved at the average output power levels of 34.6–36.8 dBm with an ACLR of under −24.6 dBc without DPD linearization.

A Generic Theory for Design of Efficient Three-Stage Doherty Power Amplifiers

An analytical load—pull-based design methodology for three-stage Doherty power amplifiers (PAs) is presented and demonstrated. A compact output combiner network, together with the input phase delays, is derived directly from transistor load—pull data and the design requirements. The technique opens up a new design space for three-stage Doherty PAs with reconfigurable high-efficiency power back-off levels. The method is designed to enable high transistor power utilization by maintaining full voltage and current swings of the main and auxiliary amplifier cells. Therefore, a wide efficiency enhancement range can be achieved also with symmetrical devices. As a proof of concept, a 2.14-GHz 30-W three-stage Doherty PA with identical gallium nitride (GaN) HEMT active devices is designed, fabricated, and characterized. The prototype PA is able to linearly reproduce 20-MHz long-term evolution signals with 8.5- and 11.5-dB peak-to-average power-ratio (PAPR), providing average efficiencies of 56.6% and 46.8% at an average output power level of 36.8 and 33.8 dBm, respectively. Moreover, an average efficiency as high as 54.5% and an average output power of 36.3 dBm have been measured at an adjacent power leakage ratio of −45.7 dBc for a 100-MHz signal with 8.5 dB of PAPR, after applying digital predistortion linearization.

Reconfigurable DPD Based on ANNs for Wideband Load Modulated Balanced Amplifiers Under Dynamic Operation From 1.8 to 2.4 GHz

This article proposes a methodology to ensure linear amplification of a load modulated balanced amplifier (LMBA) while keeping the power efficiency as high as possible over a frequency band ranging from 1.8 to 2.4 GHz and where the transmitted signals can present different bandwidth (BW) configurations. The proposed reconfigurable linearization methodology consists of, in a first step, tuning some free parameters (with dependence on the signal BW and frequency of operation) of the LMBA to trade-off linearity and power efficiency. In a second step, two multipurpose adaptive digital predistortion (DPD) linearizers are considered, properly combined with crest factor reduction (CFR) techniques, to meet the required linearity specifications. Either a DPD based on artificial neural networks or a DPD based on polynomials can be selected taking into account the compromise between computational complexity and linearization performance. Experimental results will validate the proposed methodology to guarantee the linearity levels (ACPR <−45 dBc and EVM <1%) with high power efficiency in an LMBA under dynamic transmission, where both the signal BW (from 20 and up to 200-MHz instantaneous BW) and frequency of operation (in the range of 1.8–2.4 GHz) change.

A Frequency-Selective Digital Predistortion Method Based on a Generalized Indirect Learning Architecture

Frequency-selective (FS) digital predistortion (DPD), which focuses on suppressing the nonlinear distortion at a specific band, has gained increased interest in recent years. However, there is a lack of a general FS DPD approach that is applicable to most scenarios and is suitable for practical implementation. This paper proposes an FS DPD method based on a generalized indirect learning architecture (GILA). Our work on this GILA-based FS DPD method is composed of two contributions. First, an FS Volterra series model structure, which consists of a basic linear part and a partial-band pre-compensation part, is proposed to construct an FS predistorter. Second, a GILA-based identification method is proposed to extract coefficients of the FS predistorter with the FS Volterra series model structure. The proposed GILA-based FS DPD is a general method with low complexity for implementation. Both simulations and experiments verify that the target band of the DPD linearization is arbitrary for the proposed GILA-based FS DPD method. As a special case, when using the proposed method to focus on suppressing the out-of-band distortion, the adjacent channel power ratio performance of the proposed method can be 7.1 dB better than that of the conventional full-band DPD.

Comparison of Feature Selection Techniques for Power Amplifier Behavioral Modeling and Digital Predistortion Linearization.

The power amplifier (PA) is the most critical subsystem in terms of linearity and power efficiency. Digital predistortion (DPD) is commonly used to mitigate nonlinearities while the PA operates at levels close to saturation, where the device presents its highest power efficiency. Since the DPD is generally based on Volterra series models, its number of coefficients is high, producing ill-conditioned and over-fitted estimations. Recently, a plethora of techniques have been independently proposed for reducing their dimensionality. This paper is devoted to presenting a fair benchmark of the most relevant order reduction techniques present in the literature categorized by the following: (i) greedy pursuits, including Orthogonal Matching Pursuit (OMP), Doubly Orthogonal Matching Pursuit (DOMP), Subspace Pursuit (SP) and Random Forest (RF); (ii) regularization techniques, including ridge regression and least absolute shrinkage and selection operator (LASSO); (iii) heuristic local search methods, including hill climbing (HC) and dynamic model sizing (DMS); and (iv) global probabilistic optimization algorithms, including simulated annealing (SA), genetic algorithms (GA) and adaptive Lipschitz optimization (adaLIPO). The comparison is carried out with modeling and linearization performance and in terms of runtime. The results show that greedy pursuits, particularly the DOMP, provide the best trade-off between execution time and linearization robustness against dimensionality reduction.

Digitally-Compensated Wideband 60 GHz Test-Bed for Power Amplifier Predistortion Experiments.

Millimeter waves will play an important role in communication systems in the near future. On the one hand, the bandwidths available at millimeter-wave frequencies allow for elevated data rates, but on the other hand, the wide bandwidth accentuates the effects of wireless front-end impairments on transmitted waveforms and makes their compensation more difficult. Research into front-end impairment compensation in millimeter-wave frequency bands is currently being carried out, mainly using expensive laboratory setups consisting of universal signal generators, spectral analyzers and high-speed oscilloscopes. This paper presents a detailed description of an in-house built MATLAB-controlled 60 GHz measurement test-bed developed using relatively inexpensive hardware components that are available on the market and equipped with digital compensation for the most critical front-end impairments, including the digital predistortion of the power amplifier. It also demonstrates the potential of digital predistortion linearization on two distinct 60 GHz power amplifiers: one integrated in a direct-conversion transceiver and an external one with 24 dBm output power.

Beyond the Moore-Penrose Inverse: Strategies for the Estimation of Digital Predistortion Linearization Parameters

Digital predistortion (DPD) is the linearization technique most often used to cope with the inherent tradeoff between linearity and efficiency in power amplifiers (PAs). Adaptation is needed to optimize DPD performance. This article reviews strategies for estimating the parameters controlling the DPD linearizer.

Automated Driving of GaN Chireix Power Amplifier for the Digital Predistortion Linearization

This brief presents the measurement/modeling of a dual-input outphasing Chireix power amplifier (PA) for the analysis of nonlinear and memory effects behavior when excited with modulated signals. Moreover, we formulate a cubic-spline (CS) memory model with a closed-loop for the digital predistortion (DPD) linearization algorithm. An FPGA system has been developed to automate the outphasing angles and their respective asymmetrical incident power levels applied at the Class-F PAs of the Chireix under test. Based on experimental results, the CS model offers a DPD with a normalized mean square error (NMSE) of -21.87 dB, and -52.47 dB for a WCDMA 5-MHz and an LTE-A 10-MHz with -26.84 dB and -43.91 dB in extraction and prediction, respectively. An output power improvement of -43.5 dBc in adjacent channel power ratio (ACPR) with 9.3 dB PAPR yield 50% average efficiency enhance at 2 GHz, is achieved.

Mesh-Selecting for Computational Efficient PA Behavioral Modeling and DPD Linearization

This letter proposes a mesh-selecting (MeS) method for complex-valued signals oriented at significantly reducing the training data required to extract the parameters of mathematical models for characterizing the nonlinear behavior of power amplifiers or digital predistortion linearizers. Experimental results will show the advantages of the proposed MeS method when properly combined with dimensionality reduction techniques. A reduction of the parameters' identification computational complexity by a factor of 65 can be achieved with respect to training with consecutive samples and employing the commonly used QR least-squares solution.

Wideband Two-Way Hybrid Doherty Outphasing Power Amplifier

A new type of wideband dual-input hybrid Doherty outphasing power amplifier (HDO-PA) is developed in which the load-modulation scheme continuously converts as the frequency increase, from the previously reported HDO-PA mode with maximum flat efficiency response versus power to the conventional Doherty PA mode. For a symmetric HDO-PA implementation, this corresponds to the peak-to-backoff fundamental voltage ratio of the auxiliary amplifier linearly varying from 9/7 to 2 with frequency. A transmission-line-based wideband HDO-PA prototype is first established at the current-source reference planes to cover the frequency band from 1.4-GHz to 2.5-GHz. The wideband HDO-PA is implemented next at the package reference planes by synthesizing the wideband combiner circuit required to sustain the intrinsic load-modulation behavior across the entire frequency bandwidth. A 1.4-GHz to 2.5-GHz wideband HDO-PA is fabricated and characterized using both continuous-wave and modulated signals. The 6-dB backoff efficiency varies from 60% to 44% and the maximum power from 44.8 dBm to 42.9 dBm as the frequency increases. When the PA is excited with a 20 MHz bandwidth long-term evolution signal at 1.7 GHz with 6.5 dB peak-to-average-power ratio (PAPR), the PA achieves an average drain efficiency of 50.3% with -32.0 dBc adjacent-channel-power leakage ratio (ACLR) and an average drain efficiency of 47.8% with -54.0 dBc ACLR after digital predistortion linearization.

Compensation of Transmitter I/Q Imbalance in Millimeter-Wave MIMO Systems Using a Single Transmitter Observation Receiver

This article proposes a new method to concurrently identify and compensate for the $I/Q$ imbalance in millimeter-wave (mm-wave) multiple-input multiple-output (MIMO) direct-conversion transmitters (Txs) using a single transmitter observation receiver (TOR) fed with the combined outputs of the individual Tx chains. In addition, a signal training approach is proposed that minimizes in-band distortion while maintaining acceptable performance in the out-of-band region. The proposed $I/Q$ imbalance mitigation method is validated by both the simulation and measurement results, using quadrature modulators arranged in one, two, and four Tx configurations for a compensation bandwidth of 4 GHz. The simulation results demonstrate the ability of the proposed method to obtain the same performance for one, two, and four Txs after compensation using an ideal power combiner. Simulations also reveal the sensitivity of the output signal quality to the isolation of the combiner. The experimental measurement results show a normalized mean-square error improvement from 14.5% to 2.22% and 3.46% for the one and four Tx configurations, respectively, using a power combiner with limited isolation. Finally, the method’s ability to improve compensation accuracy is demonstrated as part of the digital predistortion (DPD) linearization of an mm-wave power amplifier (PA).