Differential Inverters Research Articles

Differential Inverters: A General Design Procedure Integrating a Novel Power Losses Modeling Approach for Utilized DC-DC Modules at Different Modulation Schemes

Differential Inverters: A General Design Procedure Integrating a Novel Power Losses Modeling Approach for Utilized DC-DC Modules at Different Modulation Schemes

Differential Single-Phase Inverters With Active Power Decoupling: A Survey

This paper provides an overview of differential single-phase inverter topologies with active power decoupling (APD) and their main control techniques. Owing to the advantage of achieving APD without additional semiconductor devices, thus boosting inverter reliability at a minimum cost, these topologies have gained increasing interest, especially for small-scale photovoltaic applications. Therefore, in this study, we consider it essential to synthesize the main differential single-phase inverters, their operating principles, and provide a unified mathematical description for each topology. The study identified and analyzed three main structures: buck, boost, buck–boost, and derived topologies. First, a comparative analysis, including a hardware assessment in terms of the DC-link voltage requirements, voltage and current stresses on the switches, and losses, shows the performance of various inverter topologies under different operating parameters (e.g., input voltage and decoupling capacitance). Second, this paper discusses the main control strategies applied to this class of inverters to achieve both primary control (autonomous or grid-connected operation) and APD functions, while highlighting the development of control algorithms that are less dependent on parameter variations and more robust to external disturbances. Finally, the need for further research on reliability improvement in single-phase differential inverters, particularly in the context of emerging technologies, such as high-speed switches (e.g., wide-bandgap semiconductors) and advanced control techniques, is emphasized.

Improved Controller and Design Method for Grid-Connected Three-Phase Differential SEPIC Inverter

Single-ended primary-inductor converter (SEPIC) based differential inverters (SEPIC-BDI) have received wide concerns in renewable energy applications due to their modularity, galvanic isolation, decreased power stages, continuous input current, and step up/down capability. However, its design still has several challenges related to component design, the existence of complex right half plane (RHP) zeros, and increased sensitivity to component mismatches. In this context, this paper presents an improved control and enhanced design method for the three-phase SEPIC-BDI for grid-tied applications. A generalized static linearization approach (SLA) is proposed to mitigate the low-order harmonics. It practically simplifies the control complexity and decreases the required control loops and sensor circuits. The mismatch between the SEPIC converters in each phase is highly mitigated due to the independent operation of the SLA in each phase and the output dc offset currents are reduced. The proposed enhanced design methodology modifies the SEPIC open-loop transfer function by moving the complex RHP zeros to the left half-plane (LHP). Therefore, a simple proportional-integral (PI) controller effectively maintains converter stability without adding higher-order compensators in the literature. Moreover, a straightforward integrator in the control loop eliminates the negative sequence harmonic component (NSHC) and provides a low computational burden. Simulations and experimental results based on 200V, 1.6 kW, 50 kHz prototype with silicon carbide (SiC) devices are provided to validate the effectiveness of the proposed work. The results show that the proposed controller and design method achieve pure output current waveforms at various operating points of the inverter and dc voltage variations.

Integration of solar PV into grid using a new UPQC with differential inverter control

Integrated photovoltaic (PV) distribution systems voltage stability is of great significance in supporting all connected equipment smooth functioning in the distribution network. Voltage profile maintenance is one of the challenging tasks in PV integration. To maintain a constant voltage profile to a sensitive load of 22 kVA is the main idea of this study. A single-phase PV-integrated distribution system is selected for the study. The novelty is that differential inverters are used for dynamic voltage restorer and distribution static synchronous compensator of the unified power quality conditioner (UPQC). Active power decoupling facility is the main advantage using the differential inverter. The research work objective is to synchronise a 10 kW solar PV system to the distribution system using this new UPQC. The research work discusses and derives the most suitable control strategy for the UPQC with battery energy storage system. A 20 kVA UPQC is designed for the PV integration and to increase voltage stability of the distribution system. The frequency, voltage and reactance/resistance ratio of the distribution system is assumed to be constant. A prototype model of differential UPQC is developed. Experimental and simulation results validate the main objective.

Generalized Power Decoupling Control for Single-Phase Differential Inverters With Nonlinear Loads

Differential inverters provide a cost-effective solution to the second-order ripple power issue in single-phase systems. Most existing differential inverter-based power decoupling methods are for linear loads, which may not work well for nonlinear loads. When supplying nonlinear loads, differential inverters may suffer from harmonics at the ac terminal, which may propagate to the dc side and deteriorate the performance of power decoupling. In this paper, the harmonic mitigation is realized by reshaping capacitor voltages, and it is applied to buck-, boost-, and buck–boost-type differential inverters with detailed harmonics compensation capacity analysis. Then, a feedback linearization-based dc current feedback control scheme is proposed to realize the harmonic mitigation; hence, both the dc-side ripple power and the nonlinearity found in differential inverters can be decoupled simultaneously. The proposed control scheme is developed based on a generalized half-bridge model and can be applied to buck-, boost-, or buck–boost-type differential inverters with minor revisions. Experimental results are presented to validate the performance of the proposed control scheme and theoretical analysis.

Single-Phase Differential Buck–Boost Inverter With Pulse Energy Modulation and Power Decoupling Control

This paper presents a single-phase differential buck–boost inverter that possesses both buck–boost and active power decoupling functions without adding any power electronics or increasing the complexity of driver circuits, as compared with the previous differential inverters. Two types of operating principles are introduced: the unipolar operation with new pulse energy modulation technique enabling the inverter to operate under both discontinuous conduction mode and continuous conduction mode, and the bipolar operation with energy-based active power decoupling delivering the second-order ripple power into the output film capacitors, thus eliminating the large electrolytic capacitor at the dc side. Small-signal modeling analysis is conducted to show the characteristics of the proposed system and control. Simulation and experimental results verified the feasibility of operating principles for the differential buck–boost inverter and successful power decoupling with substantial reduction of second-order component in the dc current.

Design of a CMOS adaptive charge pump with dynamic current matching

A novel structure for a charge pump circuit is proposed, in which the charge-pump (CP) current can adaptively regulated according to phase-locked loops (PLL) frequency synthesis demand. The current follow technology is used to make perfect current matching characteristics, and the two differential inverters are implanted to increase the speed of charge pump and decrease output spur due to theory of low voltage difference signal. Simulation results, with 1st silicon 0. 25 μm 2.5 V complementary metal-oxide-semiconductor (CMOS) mixed-signal process, show the good current matehing characteristics regardless of the charge pump output voltages.

Precision low jitter oscillator circuit

A precision, low jitter oscillator circuit is provided that is particularly well-suited for generating a clock signal in miniature digital systems, such as digital hearing aids. The oscillator includes a plurality of differential inverters configured in a feedback loop to generate an oscillating clock signal. The differential inverters include a capacitive trimming network for adjusting the frequency of the oscillating clock signal and employ resistive loads for minimizing jitter in the clock signal. The components of the oscillator are fabricated in a common silicon process to minimize the size of the oscillator.

A sampling technique and its CMOS implementation with 1 Gb/s bandwidth and 25 ps resolution

This paper presents a technique and circuitry for high-resolution sampling of a digital waveform. Very fine sampling resolution is achieved by simultaneously propagating both data and clock signals through delay elements in such a way that resolution is controlled by the difference in the delay of clock and data signals. Delay units were designed using biased CMOS and differential CMOS inverters. A sampler circuit with 64 stages has been fabricated in 1.2 /spl mu/m CMOS technology, and test results show a bandwidth of up to 1 Gb/s for the input data and a sampling resolution externally adjustable between 25 and 250 ps. The fabricated circuit has shown sampling stability, monotonicity in sampling, and uniformity in sampling resolution. >