Differential Difference Current Conveyor Research Articles

1 V Electronically Tunable Differential Difference Current Conveyors Using Multiple-Input Operational Transconductance Amplifiers.

This paper presents electronically tunable current conveyors using low-voltage, low-power, multiple-input operational transconductance amplifiers (MI-OTAs). The MI-OTA is realized using the multiple-input bulk-driven Metal Oxide Semiconductor transistor (MIBD-MOST) technique to achieve minimum power consumption. The MI-OTA also features high linearity, a wide input range, and a simple Complementary Metal Oxide Semiconductor (CMOS). Thus, high-performance electronically tunable current conveyors are obtained. With the MI-OTA-based current conveyor, both an electronically tunable differential difference current conveyor (EDDCC) and a second-generation electronically tunable current conveyor (ECCII) are available. Unlike the conventional differential difference current conveyor (DDCC) and second-generation current conveyor (CCII), the current gains of the EDDCC and ECCII can be controlled by adjusting the transconductance ratio of the current conveyors. The proposed EDDCC has been used to realize a voltage-to-current converter and current-mode universal filter to show the advantages of the current gain of the EDDCC. The proposed current conveyors and their applications are designed and simulated in the Cadence environment using 0.18 μm TSMC (Taiwan Semiconductor Manufacturing Company) CMOS technology. The proposed circuit uses ±0.5 V of power supply and consumes 90 μW of power. The simulation results are presented and confirm the functionality of the proposed circuit and the filter application. Furthermore, the experimental measurement of the EDDCC implemented in the form of a breadboard connection using a commercially available LM13700 device is presented.

Realization of nth Order Wave Active Low-Pass Filter Using Differential Difference Current Conveyor

A wave active filter (WAF) based on a differential difference current conveyor (DDCC) is presented in this paper. An active filter formation depends entirely on wave quantity processing. The wave method is demonstrated for the basic wave active elements (WAEs) of active filters such as a series inductor and a shunt capacitor. The novelty of the proposed work is that the mathematical operations required to implement the wave active components, such as lossy integration-subtraction; subtraction; summation and inverter, are performed using the DDCC as an analog building block (ABB). Designing WAFs of lower to higher-order is extremely challenging, i.e., great motivation to propose a WFA using a CMOS-based DDCC for lower and higher-order low-pass Butterworth filter topologies. Additionally, the filter performances are verified through noise analysis, percentage total harmonic distortion (%THD) and Monte Carlo analysis. The proposed WFA is theoretically verified for [Formula: see text]th order low-pass Butterworth filter designs ([Formula: see text]) using DDCC-based WAEs and validated using SPICE simulations with [Formula: see text]m TSMC CMOS technology parameters for DDCC, operating on [Formula: see text][Formula: see text]V.

Single‐differential difference current conveyor‐based first‐order VM/TAM universal filter and its applications

AbstractA new first‐order universal filter structure is presented in this article using a single differential difference current conveyor (DDCC). The proposed circuit can provide three first‐order filter functions namely, high‐pass filter (HPF), low‐pass filter (LPF), and all‐pass filter (APF) in voltage mode (VM) and transadmittance mode (TAM) both. A voltage amplifier with a gain of 2 is required for the realization of the APF functions in both the modes while for LPF and HPF, no condition is required. The pole frequency and gain of the proposed circuit can be controlled separately. The effect of the parasitic impedances of the DDCC has been modeled in the nonideal equivalent circuit from which nonideal parameters have been evaluated and compared with their ideal ones. Application examples of the proposed circuits configured as amplitude equalizer (in both modes) and in the realization of a simple wideband band‐pass filter are also discussed. The functionality of the proposed circuit as well as its mentioned application circuits is verified using complementry metal oxide semiconductor DDCC to support the theoretical propositions. Some experimentally observed frequency responses and transient responses of the various VM filters have also been corroborated using DDCC implemented using AD844 ICs.

Tunable floating and grounded memristor emulator Model

ABSTRACT A Differential Difference Current Conveyor Transconductance Amplifier (DDCCTA) based resistor tunable memristor emulator has been proposed in this work. The emulator can be used in both grounded and floating circumstances. The proposed design incorporates only one active block along with few passive components. Moreover, the circuit can operate in both incremental and decremental modes, by simply changing the input ports. The circuit demonstrates all the characteristics of an ideal memristor up to 6 MHz. The proposed model has been simulated using TSMC 0.18m process parameter and occupies an area of 51 × 42.5 m2 chip-area, excluding capacitor. The circuit’s reliability has been verified by studying non-ideal, non-volatile, Monte-Carlo, process corner variations analysis. The circuit applicability has been tested through series/parallel combinations. To validate the experimental demonstration, AD844AN and CA3080 have been used to make a prototype, which shows good agreement with theoretical and simulation results.

Electronically Tunable Differential Difference Current Conveyor Using Commercially Available OTAS

This paper presents a new electronically tunable differential difference current conveyor (EDDCC) using the commercially available operational transconductance amplifiers (OTAs). Unlike the conventional DDCC, the proposed EDDCC offers current gain that can be electronically controlled. The EDDCC can be used to realize a new electronically tunable fully differential difference second-generation current conveyor (EFDCCII). Therefore, the current gain of the proposed EFDCCII can be electronically controlled. To show the advantages of the proposed EDDCC and EFDCCII, the EDDCC has been used to realize a quadrature oscillator and the EFDCCII has been used to realize a current-mode universal filter. The proposed circuits have been investigated by simulation and experimental tests using the commercially available LM13700 OTAs.

Low Voltage-Low Power Wide Range FGMOS Fully Differential Difference Current Conveyor And Application Examples

ABSTRACT A novel floating gate MOS (FGMOS) low voltage-low power wide range fully differential difference current conveyor (FDDCCII) is proposed. Proposed FDDCCII has a power consumption of 375nW and a rail-to-rail input signal range. Appropriate selection of the ratio between total capacitance vs. input capacitance of FGMOS transistors leads to a decrease in the transconductance and this feature increases the input signal oscillation range of the FDDCCII. Some of the key properties of the proposed FDDCCII are the bandwidth of 31 Mhz and 26 MHz at current conveying curve and voltage conveying curve, respectively.

1.2 V differential difference current conveyor using MIGD MOST technique and its applications

This paper presents a new differential difference current conveyor (DDCC), realized using multiple-input gate-driven MOS transistor (MIGD MOST) technique. The application of MIGD MOST can reduce the number of differential pairs in the input stage of the DDCC, thus simplifying its overall structure. Unlike previous DDCC, the output stage of the circuit operates in super class-AB, that offers low static power consumption, high load driving capability and improved gain-bandwidth product (GBW).The proposed DDCC can work with the supply voltage of 1.2 V and consumes 44.2 μW of power. The proposed DDCC has been used to realize a versatile circuit that can work as a universal filter or a quadrature oscillator into a single topology. When the circuit works as a universal filter, it can realize low-pass, band-pass, high-pass, band-stop and all-pass voltage responses. The natural frequency and the quality factor of these responses can be orthogonally controlled. When the circuit works as a quadrature oscillator, the condition and the frequency of oscillators can be orthogonally controlled. The proposed MIGD DDCC and the proposed universal filter and quadrature oscillator have been simulated with SPICE, using 0.18 μm CMOS process parameters to prove the functionality and workability of the new circuits.

DDCC-based meminductor circuit with hard and smooth switching behaviors and its circuit implementation

After the realization of memristors, researchers have focused on other nonlinear memory elements such as memcapacitors and meminductors. Many circuits are designed to emulate these mem-elements since it is not possible to find these components on the market as discrete circuit elements. This study presents a Differential Difference Current Conveyor (DDCC)-based meminductor circuit emulator able to produce both hard switching and smooth switching behaviors without changing any circuit topology. The proposed meminductor circuit consists of only two DDCCs, a single analogue multiplier, a transistor, and three grounded passive circuit elements. No other circuit elements such as a memristor or memcapacitor were used to obtain meminductive behavior. The frequency dependence, pulse response, transition from smooth switching to hard switching, and Monte Carlo analyses of the proposed meminductor were investigated. A meminductor-based regular spike generator was designed as an application of the proposed meminductor, and a regular spike train was successfully produced.

Nth order voltage-mode universal filter employing only plus type differential difference current conveyor

Nth order voltage-mode universal filter employing only plus type differential difference current conveyor

Memristor emulation and analog application using differential difference current conveyor of CC-II in CMOS technology

Memristors have drawn a significant widespread attention from the research community since past decade due to their high-speed operational potential in analog applications. However, it has been difficult to achieve the memristor behavior directly from solid state solution and state of the art. This work presents a novel emulator design to mimic the memristor behavior. A generic and simple emulator circuit for a voltage controlled memristor is presented using a differential difference current conveyor, which is based on a versatile second-generation current conveyor methodology. Although, the voltage-controlled memristor models are of great importance, no significant research has been done to build emulator circuits for this type of memristor. A high-speed low power DDCC in 130 nm RF-CMOS process has been designed and functional simulations have been performed on SPICE environment using Advanced Design System (Keysight Technology). Proposed DDCC then implements the memristor operation with compatible specifications. Finally, the memristor operation and potential has been verified by its application in high speed active filter operations. A universal biquad section has been presented which employs the designed memristor emulator, with 30 mW of power dissipation with ± 1.5 V supply.

A novel memristor emulator design and universal biquad filter application using second generation high swing differential current conveyor transconductance amplifier in 130 nm CMOS process

Memristors have drawn a significant wide spread attention from the research community since past decade due to their high-speed operational potential in analog applications. However, it has been difficult to achieve the memristor behavior directly from solid state solution and state of the art. This work presents a novel emulator design to mimic the memristor behavior. A generic and simple emulator circuit for a voltage controlled memristor is presented using a differential difference current conveyor transconductance amplifier (DDCCTA), which is based on a versatile second-generation current conveyor methodology. A high-swing (up to ±600 mA at the output) and low power implementation design effort for DDCCTA is kept in 130 nm RF-CMOS process with dual power supply mode. The functional simulations have been performed in SPICE environment using Advanced Design System (Keysight Technology), which showed a good alignment to the memristor emulator’s I-V characteristic at 1 KHz and 10 KHz. Proposed DDCCTA then implements the memristor operation with compatible specifications. Finally, the memristor operation and potential has been verified by its application in high-speed active filter operations. A universal biquad section has been presented which employs the designed memristor emulator, with 30 mW of power dissipation with ±1.5 V supply.

Current-mode Positive and Negative Rectifier based on DDCC suitable for Higher Frequency operations

In the present proposal current-mode (CM) full-wave rectifiers (FWR) using a differential-difference current conveyor (DDCC) block, two MOS-based diodes and three grounded resistors. Two proposals of rectifiers are presented, the first is CM FW positive rectifier and the second is CM FW negative rectifier. The value 200MHz was observed in the operating frequency of the simulated designs. The SPICE simulations with 180 nm TSMC CMOS technology model file has been used to ensure the proper functioning of both of the proposals.

Voltage-mode Second-order Filter and Quadrature Oscillator Based-on Differential Difference Current Conveyors and Only Grounded Elements

Voltage-mode Second-order Filter and Quadrature Oscillator Based-on Differential Difference Current Conveyors and Only Grounded Elements

Single DDCC− based simulated floating inductors and their applications

Three simulated floating inductor (SFI) circuits containing a single DDCC− called as minus-type differential difference current conveyor are proposed. These SFIs are series lossy, parallel lossy and negative lossless ones. The used DDCC− in each of the proposed SFIs has a single Z terminal. Without needing any passive element matching constraints, each of the proposed SFIs is composed of a minimum number of passive elements. As application examples, second-order current-mode (CM) and voltage-mode low-pass (LP) filters derived from the proposed series lossy SFI are given. Also, a fourth-order CM Butterworth LP filter example is presented as another application. A second-order CM high-pass (HP) filter and an RLC resonant circuit obtained from the proposed parallel lossy SFI are given. All the simulations are achieved via SPICE program. Moreover, some experimental results for the proposed lossy SFIs and CM HP filter are given in order to show the performances.

Current Mode and Voltage Mode Third Order Sinusoidal Oscillator Using CCDDCCTA

Objective: In this paper, a novel third order sinusoidal oscillator based on current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA) is proposed. Methods: The proposed circuit configuration consist of single CCDDCCTA, two grounded resistor and three capacitors. It can concurrently yield output voltage and current. The amplitude of output current can be easily tuned by the bias current. The non-ideality and Monte-Carlo analysis are discussed and presented. Results: The stated results agree well with the theoretical estimation. Conclusion: The performance ofa proposed oscillator are analyzed with ORCAD 16.6 simulator and the analog block has been depicted using 0.25 μm CMOS TSMC technology parameters.

Improved current-mode wave active filter

ABSTRACT In this paper, a resistorless improved wave active filter (WAF) is presented using a comparatively new current-mode building block, namely extra X current-controlled current conveyor (EX-CCCII). The proposed wave active filter is designed in the current mode. The incident and reflected waves are used for designing the basic wave active elements, namely series and shunt inductors (L) and capacitors (C). The novelty of the circuit is that the mathematical operations like lossy integrator, unity gain amplifier, summation, and subtraction, required to realise the wave active elements, are accomplished by judiciously using the port relationships of EXCCCII. As a result of which the proposed circuit is compact and uses only two EXCCCIIs and one grounded capacitor for the realisation of wave elements (L and C). One 3rd and one 4th order Butterworth wave active filters are designed using EX-CCCII-based wave elements and simulated in cadence using 0.18 µm TSMC CMOS technology. The comparison indicates that the proposed WAF uses minimum numbers of analog building blocks (ABBs) and consumes the least power; moreover, the performances such as noise, percentage total harmonic distortion (%THD), and electronic controllability of cut-off frequency of the filters are also reported. Abbreviations: ABB: analog building block; FDNR: frequency-dependent negative resister; WAF: wave active filter; THD: total harmonic distortion; OTA: operational transconductance amplifier; CFOA: current feedback operational amplifier; VDTA: voltage differencing transconductance amplifier; OTRA: operational transresistance amplifier; CCDDCCTA: current-controlled differential difference current conveyor transconductance amplifier; DVCCCTA: differential voltage current-controlled conveyor transconductance amplifier; DVCCTA: differential voltage current conveyor transconductance amplifier; EX-CCCII: extra X current-controlled conveyor

Extremely low-voltage low-power differential difference current conveyor using multiple-input bulk-driven technique

In this paper, a new differential difference current conveyor (DDCC) with ultra-low voltage and low-power capability is presented. The DDCC is designed by using a non-tailed differential pair with multiple-input bulk-driven MOS transistor technique to obtain a rail-to-rail input common-mode swing and extremely low supply voltage. The MOS transistors biased in the sub-threshold region have been used to achieve extremely low power consumption. The performance of the proposed DDCC is evaluated by simulation results using SPICE program and MOS transistors parameters provided by a standard n-well 0.18 µm CMOS process from TSMC. A rail-to-rail input common-mode range was shown and a high accuracy was expressed. The bandwidth was 2.2 kHz and the total harmonic distortion was 1% for an input signal with amplitude of 240 mVp-p, obtained at supply voltage of 0.3 V and power dissipation of 28.6 nW. The proposed DDCC has been used to realize a sixth-order low-pass filter for application to electrocardiogram (ECG) applications.

Schmitt Trigger Circuits using Various Active Devices

A vast number of diverse analog circuit blocks have been arosed in the past few decades. A various active devices are Operational Amplifier (Op-Amp), Current Conveyor (CC), Operational Transconductance Amplifier (OTA), Differential Difference Current Conveyor (DDCC), Differential Difference Current Conveyor Transconductnace Amplifier (DDCCTA), Z-Copy Current Differencing Transconductance Amplifier (ZC-CDTA), Voltage Difference Transconductance Amplifier (VDTA) and so on. A review on Schmitt trigger circuits by using different active devices are presented in this paper since Schmitt trigger circuits are widely used in numerous applications such as in waveform generators, wave-shaping circuits, comparators, Bio-medical applications, analog processing systems, communication and instrumentation systems.

0.3 V Differential Difference Current Conveyor Using Multiple-Input Bulk-Driven Technique

This paper presents a new ultra-low voltage and ultra-low power differential difference current conveyor (DDCC) which is suitable for portable electronic applications. The proposed DDCC uses the subthreshold technique to reduce the power consumption and the bulk-driven technique to obtain a rail-to-rail input common-mode swing. Unlike previous DDCCs, the multiple-input bulk-driven technique is used in the proposed DDCC to reduce the number of transistors and to achieve the compactness. The proposed DDCC was designed using 0.18 µm TSMC CMOS technology with 0.3 V power supply and 38 nW power consumption. To confirm the workability of the new active device, a third-order elliptic filter using the proposed DDCCs as active device has been introduced as an application example. The proposed DDCC and its application have been designed and simulated in Cadence/Specter environment, and the simulated results prove the functionality and the attractive results of the new circuits.

High Output Impedance Current-Mode Universal First-Order Filter With Three Inputs Using One DDCC

Background: A current-mode universal first-order filter with three input terminals and one output terminal is presented. Methods: The proposed circuit uses one differential difference current conveyor (DDCC), one grounded capacitor and two resistors. Results: This circuit offers the following advantageous features: high output impedance, employing only one active component, using a grounded capacitor, the versatility to synthesize any type of first-order filter transfer functions. Conclusion: Each standard first-order filter function can be obtained by using only one current input signal from the proposed circuit.