Differential Current Conveyor Research Articles

Electronically Tunable Differential Difference Current Conveyor Using Commercially Available OTAS

This paper presents a new electronically tunable differential difference current conveyor (EDDCC) using the commercially available operational transconductance amplifiers (OTAs). Unlike the conventional DDCC, the proposed EDDCC offers current gain that can be electronically controlled. The EDDCC can be used to realize a new electronically tunable fully differential difference second-generation current conveyor (EFDCCII). Therefore, the current gain of the proposed EFDCCII can be electronically controlled. To show the advantages of the proposed EDDCC and EFDCCII, the EDDCC has been used to realize a quadrature oscillator and the EFDCCII has been used to realize a current-mode universal filter. The proposed circuits have been investigated by simulation and experimental tests using the commercially available LM13700 OTAs.

Realization of multi-mode universal shadow filter and its application as a frequency-hopping filter

This work presents a new active block called the differential current conveyor cascaded transconductance amplifier (DCCCTA) and implemented multi-mode biquadratic universal shadow filter. The frequency-hopping filter is implemented using a multi-mode universal shadow filter. The proposed circuit has two modes of operation: current mode (CM) and transadmittance mode (TAM). All-pass (AP), band-pass (BP), band-reject (BR), high-pass (HP), and low-pass (LP) responses are simultaneously accomplished. As intended, low input impedance for CM and high input impedance for TAM are acquired, while high output impedance is attained for both modes of operation. Inter-modulation distortion (IMD), percentage total harmonic distortion (%THD), and Monte Carlo analysis are also obtained. The theoretical results are verified using Cadence Virtuoso in 180 nm TSMC technology.

CMOS compatible sinusoidal oscillator structures with explicit voltage and current outputs

ABSTRACT The paper presents two novel circuits of sinusoidal oscillator featuring single differential difference dual-X second-generation current conveyor (DD-DXCCII) based realisation. One of the presented circuits provides voltage output signal and employs one DD-DXCCII, two capacitors and two resistors. Another presented circuit offers current output signal and employs one DD-DXCCII, two capacitors and three resistors. Both the circuits use grounded capacitors only. The output signals of presented circuits are obtainable at suitable impedance terminals (voltage signal at low impedance terminal and current signal at high impedance terminal), therefore the presented oscillator circuits offer rich cascadability. The additional performance features such as good operating frequency (49 MHz), low total harmonic distortion (<1.16%) and low power consumption (2.5 mW) are available from the presented oscillator circuits. The non-ideal, parasitic and stability aspects of the circuits are also investigated. Furthermore, the proposed ideas are enriched by presenting their MOS-C equivalent structures. Thus proposed structures are well-liked CMOS compatible structures which are well-suited to IC implementation. The presented circuits are verified through simulation outcomes which are carried out using PSPICE tool with 0.18 μm technology parameters.

DV-EXCCCII Based Resistor-Less Current-Mode Universal Biquadratic Filter

This study aims to present a new resistor-less current-mode multi-input single-output universal filter. The current-mode’s design approach is used to obtain the proposed circuit. This circuit employs a single differential voltage extra-X current controlled current conveyor (DV-EXCCCII) and two grounded capacitors. This multifunction filter circuit offers low-pass, high-pass, all-pass, band-pass, and band-reject filters at a single output terminal without passive component matching constraints. The same circuit topology can obtain all second-order filter functions with different input conditions. The proposed circuit design is electronically adjustable with the bias current of DV-EXCCCII. Because of its high output impedance, this arrangement is suitable for cascading other current-mode circuits. The proposed circuit is simulated by Cadence Spectre with 0.18 µm UMC CMOS technology process parameters at ± 0.9 V supply voltages. The simulation results agree well with the theoretical concept of the proposed circuit.

A current mode instrumentation amplifier with high common-mode rejection ratio designed using a novel fully differential second-generation current conveyor

This study presents a high common-mode rejection ratio (CMRR), and high power-supply rejection ratio (PSRR) current-mode instrumentation amplifier (CMIA) to overcome the limitations of existing differential voltage second-generation current conveyors (DVCCII)-based CMIAs in achieving high CMRR. The design is based on a fully differential second-generation current conveyor block with a novel circuit design following by a current subtracting stage. The CMIA is designed and laid out in 130 nm CMOS technology operating under ± 1.2 V supply voltage in Cadence software. The post-layout simulation results show that the CMIA achieves low-frequency voltage and current CMRR- BW of 228.8 dB–10 kHz and 246 dB–10.6 kHz, respectively, with PSRR + /PSRR- of 108.2 dB/99.7 dB, power consumption of 507 µW, and a core area of 0.0015 mm2. The unique quality of the circuit is that, it does not need well-matched active blocks, but inherently improves CMRR, bandwidth, and PSRR; hence it gains an excellent choice for integration.

Electronically Tunable Current Mode Instrumentation Amplifier Employing Single DV-EXCCCII

In this paper, a new design of a current mode instrumentation amplifier (CMIA) is presented using a single differential voltage extra-X current controlled current conveyor (DV-EXCCCII) and a grounded resistor. Therefore, this circuit design is very simple and suitable for IC integration. The proposed circuit of instrumentation amplifier has high output impedance so it is easily cascadable with other current mode circuits without buffer requirement. Furthermore, the proposed circuit is electronically tunable with the bias current of the active element used. This circuit offers good frequency performance with wide differential gain and CMRR bandwidth. The non-idealities and parasitic effects of the proposed circuit are also investigated. To validate the proposed instrumentation amplifier, various simulations are performed using the CADENCE VIRTUOSO SPECTRE simulator using 0.18 µm CMOS technology parameters.

A Band-Pass Instrumentation Amplifier Based on a Differential Voltage Current Conveyor for Biomedical Signal Recording Applications

Recently, due to their abundant benefits, current-mode instrumentation amplifiers have received considerable attention in medical instrumentation and read-out circuit for biosensors. This paper is focused on the design of current-mode instrumentation amplifiers for portable, implantable, and wearable electrocardiography and electroencephalography applications. To this end, a CMOS differential voltage second-generation current conveyor (DVCCII) based on a linear transconductor is presented. A new band-pass instrumentation amplifier, based on the designed DVCCII, is also implemented in this paper. The concept of the proposed differential voltage current conveyor and instrumentation amplifier is validated numerically and their predicted performance is presented. The simulation results of the presented circuits were tested for 0.18 μm TSMC CMOS technology in a post layout simulation level using the Cadence Virtuoso tool with a ±0.9 V power supply, and demonstrated that the designed DVCCII has a wide dynamic range of ±400 mV and ±0.85 mA and a power consumption of 148 μW. The layout of the DVCCII circuit occupies a total area of 0.378 μm2. It is shown that the designed DVCCII benefits from good linearity over a wide range of input signals and provides a low input impedance at terminal X. Two versions of the proposed band-pass instrumentation amplifier using pseudo resistances were designed with different specifications for two different applications, namely for EEG and ECG signals. Numerical analyses of both designs show proper outputs and frequency responses by eliminating the undesired artifact and DC component of the EEG and ECG input signals.

CMOS Realizable and Highly Cascadable Structures of First-Order All-Pass Filters

Two novel resistorless structures of a first-order voltage-mode all-pass filter are presented in the paper. Both the structures employ a fully differential second-generation current conveyor (FDCCII) as the primary active element, in addition to an active resistor. A grounded capacitor is the only passive component used in both the structures. In both the structures, CMOS realization of FDCCII is utilized; hence, these structures are CMOS compatible. Some of the other highly demanded features possessed by the presented all-pass structures are: a simple circuit topology, electronic tunability, high input impedance, constraint-free operation in terms of passive component matching, and low sensitivity figures. The theoretical performances under ideal and non-ideal scenarios are presented in detail. Furthermore, the proposed idea is extended to an Nth-order voltage-mode all-pass filter and a quadrature oscillator to explore some of the possible applications. PSPICE simulation results verify the theoretical claims of the presented all-pass filters.&#x0D; HIGHLIGHTS&#x0D; &#x0D; Two novel resistorless structures of first-order all-pass filters based on fully differential second-generation current conveyor are presented&#x0D; Performance of the proposed structures are thoroughly described in ideal and non-ideal scenarios&#x0D; Theoretically described details of the proposed structures are verified by carrying simulations on PSPICE using 180 nm CMOS technology&#x0D; An Nth-order all-pass filter and a quadrature oscillator are also presented as applications&#x0D; &#x0D; GRAPHICAL ABSTRACT

A novel memristor emulator design and universal biquad filter application using second generation high swing differential current conveyor transconductance amplifier in 130 nm CMOS process

Memristors have drawn a significant wide spread attention from the research community since past decade due to their high-speed operational potential in analog applications. However, it has been difficult to achieve the memristor behavior directly from solid state solution and state of the art. This work presents a novel emulator design to mimic the memristor behavior. A generic and simple emulator circuit for a voltage controlled memristor is presented using a differential difference current conveyor transconductance amplifier (DDCCTA), which is based on a versatile second-generation current conveyor methodology. A high-swing (up to ±600 mA at the output) and low power implementation design effort for DDCCTA is kept in 130 nm RF-CMOS process with dual power supply mode. The functional simulations have been performed in SPICE environment using Advanced Design System (Keysight Technology), which showed a good alignment to the memristor emulator’s I-V characteristic at 1 KHz and 10 KHz. Proposed DDCCTA then implements the memristor operation with compatible specifications. Finally, the memristor operation and potential has been verified by its application in high-speed active filter operations. A universal biquad section has been presented which employs the designed memristor emulator, with 30 mW of power dissipation with ±1.5 V supply.

0.5 V, 10.94 μW, 36.89 μ$$V_{rms}$$ IRN, 3rd order bulk-driven quadrature filter using fully differential current conveyor for bluetooth applications

0.5 V, 10.94 μW, 36.89 μ$$V_{rms}$$ IRN, 3rd order bulk-driven quadrature filter using fully differential current conveyor for bluetooth applications

Single Fully Differential Second Generation Current Conveyor Based Four‐Quadrant Analog Multiplier Design and Its Applications

Single Fully Differential Second Generation Current Conveyor Based Four‐Quadrant Analog Multiplier Design and Its Applications

Electronically Adjustable Emulator of the Fractional-Order Capacitor

This paper presents a design of the controllable emulator of the FOC (Fractional-Order Capacitor) and its application. The circuit is based on 5th-order RC topology (type Foster I), where the passive elements in the topology are replaced by electronically adjustable components. The proposed emulator is based on OTA (Operational Transconductance Amplifier) and VDCC (Voltage Differencing Current Conveyor). The electronically controllable resistors are implemented by OTAs. The electronically tunable capacitors are implemented using capacitance multipliers, which employ VDCCs. The proposed structure provides the electronic control of the order and electronic shifting of the frequency band of the approximation validity. The proposed FOC emulator is also used for fractional-order filter design. The proposed circuits are verified using PSpice simulations.

Novel current mode universal filter and dual-mode quadrature oscillator using VDCC and all grounded passive elements

ABSTRACTThe paper introduces a universal filter operating in current mode and a quadrature oscillator operating in current and voltage mode, employing Voltage Differencing Current Conveyor as active device along with all grounded passive elements. Apart from providing all five filter responses, i.e. low pass, high pass, band pass, band reject and all pass, the filter configuration also supports independent tunability of quality factor. The oscillator configuration can be easily realised with slight modifications in filter circuit, and features like low component count, use of grounded capacitors for supporting efficient integrated circuit implementation and availability of explicit current outputs are witnessed in both the devised networks. In the oscillator, network’s condition and frequency of oscillation can be independently tuned. For practical validation of the proposed network, PSPICE simulation software is used. The simulation results include two sets of outputs, one using CMOS (Complmentary Metal Oxide Semiconductor) implementation of Voltage Differencing Current Conveyor (VDCC) and another using off the shelf IC (Integrated Circuit) implementation of VDCC.

0.4 V fully differential current conveyor using multiple-input bulk-driven MOST technique

This paper presents a new ultra-low voltage ultra-low power fully differential current conveyor (FDCCII) which is suitable for extremely low-voltage low-power analog signal circuit applications. Thanks to multiple-input bulk-driven MOS transistor technique, the proposed structure employs two differential pairs which offer low complexity and low power consumption. The bulk-driven MOS technique based circuit also provides rail-to-rail input common-mode range of proposed circuit. To prove the workability of the proposed FDCCII, the circuit has been used to realize summing/subtracting amplifier as design examples. The performances of the proposed FDCCII and design examples are demonstrated through PSPICE simulations using a 0.18 μm TSMC n-well CMOS process with 0.4 V supply voltage.

Second generation fully differential current conveyor based analog circuits

In this paper, we present a new voltage-mode biquad filter that uses a six-terminal CMOS fully differential current conveyor (FDCCII). The FDCCII with only 23 transistors in its structure and operating at ± 1.5 V, is based on a class AB fully differential buffer. The proposed filter has the facility to tune gain, ωo and Q. A circuit division circuit (CDC) is employed to digitally control the FDCCII block. This digitally controlled FDCCII is used to realize a new reconfigurable fully-differential integrator and differentiator. We performed SPICE simulations to determine the performance of all circuits using CMOS 0.25 μm technology.

Analytical synthesis of elliptic voltage‐mode even/odd‐ n th‐order filter structures using DDCCs, FDCCIIs, and grounded capacitors and resistors

Despite the recent publication of the analytical synthesis of voltage-mode even/odd- n th-order differential difference current conveyor (DDCC) and fully differential current conveyor II (FDCCII)-grounded resistor and capacitor universal Butterworth/Chebyshev filter structures, an elliptic voltage-mode even/odd- n th-order DDCC and FDCCII-based filter structure is yet to be presented in the literature. Under the restriction of a finite order, the elliptic filter is better at meeting the stringent cut-off rate of a very narrow transition band as compared to other kinds of filters, thus making the synthesis of such an elliptic filter to be extremely useful. In this study, one even- n th-order and two odd- n th-order elliptic filter structures are analytically synthesised using DDCCs and FDCCIIs. The feasibility of such structures is validated through H-spice simulations on the proposed elliptic third-order low-pass and elliptic fourth-order low-pass, high-pass, band-pass, and band-reject filters.

A low power waveform generator using DCCII with grounded capacitor

As second generation differential current conveyor (DCCII) is an active element, one new square wave generator is introduced into the current mode applications. The proposed circuit uses only one DCCII with two resistors and a single capacitor. The resultant signal gives equal ON and OFF margins. And duty cycle is varied in accordance with the other passive components. The circuit is designed and carried simulation in cadence with gpdk 180 nm spectre files. The experimental validation is done with the prototype model developed using AD 844AN. The usage of grounded capacitor feature nullifies the maximum level of parasitics and makes the proposed circuit less sensitive to the noise immunity. The circuits advantages are compared with the other standard waveform generators and tabulated.

A LP, Very High-CMRR, Wide-Bandwidth FDCCII-Based CMIA Adapted to Both Current and Voltage Inputs

This paper presents a novel current-mode instrumentation amplifier (CMIA) which is based on a fully differential second-generation current conveyor (FDCCII). This circuit is innovatively adapted to both types of input signals, thus becoming uniquely versatile. As another unique quality, neither does it need well-matched active blocks nor does it require matched resistors; but it can inherently improves common-mode rejection ratio (CMRR), bandwidth (BW), power and area consumption and hence becomes an excellent matchless choice for integration. Most favorably, its CMRR is enormously (100–105 dB) improved using a current subtracting stage. The proposed CMIA is designed using TSMC 0.18 um RF CMOS 2P6M Technology and supply voltages of ± 1 V. Its pre-layout and post-layout performances both plus Monte Carlo analysis are simulated using CADENCE. In pre-layout, it achieves voltage and current CMRR magnitude-BW of 224.9 dB–7.2 KH and 104 dB–0.94 KHz, respectively, differential voltage/current gain BW of 8.42 MHz/9.02 MHz, very low consumed power of 521.7 uW, output offset of 2.23 uV and area of 63.4 um \(\times \) 87 um. Exceptionally, post-layout plus Monte Carlo results are tightly close to pre-layout ones; altogether, it proves its well PVT insensitivity.

SUB-VOLT BULK-DRIVEN FULLY DIFFERENTIAL CURRENT CONVEYOR AND ITS APPLICATIONS

SUB-VOLT BULK-DRIVEN FULLY DIFFERENTIAL CURRENT CONVEYOR AND ITS APPLICATIONS

A New Versatile Universal Biquad Configuration for Emerging Signal Processing Applications

The paper introduces a new versatile universal biquadratic configuration based on two fully differential second generation current conveyors without need of input matching conditions. The proposed circuit consists of two fully differential second generation current conveyors, four resistors and two grounded capacitors. The proposed biquad configuration provides all five standard filtering responses: low-pass, high-pass, band-pass, band-reject and all-pass in voltage-mode, transadmittance-mode, current-mode and transimpedance-mode. The proposed circuit is single-input multiple-outputs type, so all responses are available simultaneously. Moreover, extra inverting amplifier and double-type amplifier are also not required in the proposed circuit for any filtering response. The nonideal and parasitic effects of fully differential second generation current conveyor on the proposed circuit have also been investigated. HSPICE simulation results have been incorporated to validate the proposal.