Destination Output Port Research Articles

Improvement of contrast ratio in quadriphase-shift-keying optical label recognition with passive optical waveguide circuit

In photonic label routing networks, recognition of optical labels is one of the key functions. We have proposed waveguide-type optical circuits for recognition of optical labels encoded in quadriphase-shift-keying (QPSK) form. A basic device for the circuits consists of a 3-dB directional coupler, two Y-branches, and an asymmetric X-junction coupler. We employed a scheme of complete interference of optical waves between each coded pulse and a reference pulse in our previously reported paper. The contrast ratio of the output at the destination output port to the outputs at the other ports was reported to decrease to 1.6, 1.28, and 1.13 for two-, three-, and four-stage circuits for recognition of 16, 64, and 256 QPSK labels, respectively. We find optimum circuits with improved contrast ratio of 1.8, 1.6, and 1.47 for 16, 64, and 256 labels, respectively. The recognition operation with the improved circuits is numerically confirmed using the beam propagation method. Noise tolerance of the proposed circuits is also clarified by numerical simulation. The improved circuits are optimum from the viewpoint of efficient use of optical power and noise tolerance.

Design of an All-Optical Network Based on LCoS Technologies

AbstractIn this paper, an all-optical network composed of the ROADMs (reconfigurable optical add-drop multiplexer), L2/L3 optical packet switches, and the fiber optical cross-connection for fiber scheduling and measurement based on LCoS (liquid crystal on silicon) technologies is proposed. The L2/L3 optical packet switches are designed with optical output buffers. Only the header of optical packets is converted to electronic signals to control the wavelength of input ports and the packet payloads can be transparently destined to their output ports. An optical output buffer is designed to queue the packets when more than one incoming packet should reach to the same destination output port. For preserving service-packet sequencing and fairness of routing sequence, a priority scheme and a round-robin algorithm are adopted at the optical output buffer. The wavelength of input ports is designed for routing incoming packets using LCoS technologies. Finally, the proposed OFS (optical flow switch) with input buffers can quickly transfer the big data to the output ports and the main purpose of the OFS is to reduce the number of wavelength reflections. The all-optical content delivery network is comprised of the OFSs for a large amount of audio and video data transmissions in the future.

Design of a Multicast Optical Packet Switch Based on Fiber Bragg Grating Technology for Future Networks

Abstract In this paper, a non-blocking multicast optical packet switch based on fiber Bragg grating technology with optical output buffers is proposed. Only the header of optical packets is converted to electronic signals to control the fiber Bragg grating array of input ports and the packet payloads should be transparently destined to their output ports so that the proposed switch can reduce electronic interfaces as well as the bit rate. The modulation and the format of packet payloads may be non-standard where packet payloads could also include different wavelengths for increasing the volume of traffic. The advantage is obvious: the proposed switch could transport various types of traffic. An easily implemented architecture which can provide multicast services is also presented. An optical output buffer is designed to queue the packets if more than one incoming packet should reach to the same destination output port or including any waiting packets in optical output buffer that will be sent to the output port at a time slot. For preserving service-packet sequencing and fairness of routing sequence, a priority scheme and a round-robin algorithm are adopted at the optical output buffer. The fiber Bragg grating arrays for both input ports and output ports are designed for routing incoming packets using optical code division multiple access technology.

Optical Label Recognition Using Tree-Structure Self-Routing Circuits Consisting of Asymmetric X-Junctions

We propose a new label recognition system for photonic label routing network. Binary-coded labels in binary phase-shift-keying format are considered. The system consists of an optical waveguide circuit with tree-structure passive asymmetric X-junctions and time gates. The system uses self-routing propagation of an identifying bit by performing interference with address bits. The identifying bit is placed in advance of the address bits in the label. The identifying bit pulse is routed to the destination output port corresponding to the code of the address. The operation principle is described. It is shown that all the binary number codes can be recognized with this system. We discuss the feasibility of the system by evaluating its crosstalk. To reduce the crosstalk, an improved scheme is also presented. The label recognition operation with the optical waveguide device is verified by numerical simulation using the finite-difference beam propagation method.

All-Optical Label Recognition Using Self-Routing Architecture of Mach-Zehnder Interferometer Optical Switches with Semiconductor Optical Amplifiers

We propose a new label recognition system for photonic label switching using self-routing of labels. Binary-coded labels in on-off keying format are considered. The system consists of an all-optical demultiplexer (DeMUX) and an address recognition unit (ARU) consisting of tree-structured switches. The system uses self-routing propagation of an indication bit controlled with address bits. The indication bit is placed in advance of the address bits in the label. In DeMUX, all-optical switches in a configuration of Mach-Zehnder interferometer with semiconductor optical amplifiers (SOA-MZI) are controlled by the indication bit pulse to separate each of the label bits. The indication bit pulse is routed to the destination output port corresponding to the code of the address in ARU. It is shown that all the binary number codes can be recognized with this system. The operation principle is verified by numerical simulation using coupled-mode theory and a rate equation. Moreover, the switching crosstalk is also evaluated.

A very large-scale switching system by using nested ring-based architecture

In recent years, network applications and hardware technology have been developed in impressive speed. That is, a large-scale network switching system is needed to satisfy all demand among network service providers and population, such as data, voice, image, video on demand, videoconferencing, telecommunications, remote control and teaching, etc. A general large-scale network switching system cannot fulfill various application needs, such as the correctness of data transmission and the capacity of extension for input/output port of switching system. In this paper, we propose a nested ring-based architecture to build a very large-scale network switching system. In order to satisfy the various network application needs, a nested ring-based architecture is designed as a switching element. It can make input data exchange fast to the destined output port, and input/output port of switching system can easily be extended up to 100 ports or 1000 ports to construct a very large-scale network switching system. The simulation results show that a better performance can be achieved in data transmission, delay, throughput and extensibility for the proposed system.

An Efficient Packet Scheduling Algorithm With Deadline Guarantees for Input-Queued Switches

Input-queued (IQ) switches overcome the scalability problem suffered by output-queued switches. In order to provide differential quality of services (QoS), we need to efficiently schedule a set of incoming packets so that every packet can be transferred to its destined output port before its deadline. If no such a schedule exists, we wish to find one that allows a maximum number of packets to meet their deadlines. Recently, this problem has been proved to be NP-complete if three or more distinct deadlines (classes) are present in the set. In this paper, we propose a novel algorithm named Flow-based Iterative Packet Scheduling (FIPS) for this scheduling problem. A key component in FIPS is a non-trivial algorithm that solves the problem for the case where two classes are present in the packet set. By repeatedly applying the algorithm for two classes, we solve the general case of an arbitrary number of classes more efficiently. Applying FIPS to a frame-based model effectively achieves differential QoS provision in IQ switches. Using simulations, we have compared FIPS performance with five well-known existing heuristic algorithms including Earliest-Deadline-First (EDF), Minimum-Laxity-First (MLF) and their variants. The simulation results demonstrate that our new algorithm solves the deadline guaranteed packet scheduling problem with a much higher success rate and a much lower packet drop ratio than all other algorithms.

출력포트 확장 방식을 사용한 입출력 버퍼형 ATM 교환기에서의 성능 비교 분석

입력과 출력에 버퍼를 갖는 ATM 교환기의 셀 폐기 방법은 기존의 귀환(Backpressure)모드와 손실(Queueloss)모드가 있으며, 최근에는 두 모드의 단점을 보완한 하이브리드(Hybrid)모드가 제안되었다. 하이브리드모드는 목적하는 출력 버퍼와 입력 버퍼가 모두 포화일 경우에만 셀을 폐기하는 방식이다. 본 논문에서는 유니폼 트래픽하에서 Output-port expansion 기법을 사용한 귀환 손실 모드 및 하이브리드모드 하에서의 셀 손실률과 셀 지연을 성능 비교 분석한다 Output-port expansion 기법은, 한 타임 슬롯동안에 입력포트 당 하나의 셀만 교환되며, 만약 하나 이상의 셀들이 같은 출력포트로 향하고자 하면, 최대 교환되는 셀 수를 K(Output-port expansion ratio)개로 제한하는 방식이다. 셀 손실률을 비교 분석한 결과, 이전의 연구에서와는 달리 로드 0.9를 기점으로. 0.9이하의 로드에서는 하이브리드 모드가, 0.9 이상의 로드에서는 손실모드가 가장 낮은 셀 손실률을 보인다. 셀 지연을 비교 분석한 결과, 한 개의 교환기 성능 분석에서는 셀 손실로 인한 재전송(retransmission)을 고려하지 않는 관계로, 예상한 바와 같이, 로드가 많아질수록 셀 손실률이 높은 귀환모드가 K를 높일수록 다른 모드에 비해 낮은 셀 지연을 보였다. An input and output buffering ATM switch conventionally operates in either Queueloss mode or Backpressure mode. Recently, a new mode, which is called Hybrid mode, was proposed to overcome the drawbacks of Queueloss mode and Backpressure mode. In Hybrid mode, when both the destined output buffer and the originfted input buffer are full, a cell is dropped. This thesis analyzes the cell loss rate and the cell delay of Queueloss, Backpressure and Hybrid modes in a switch adopting output-port expansion scheme under uniform traffic. Output-port expansion scheme allows only one cell from an input buffer to be switched during one time slot. If several cells switch to a same destined output port, the number of maximum transfer cells is restricted to K (Output-port expansion ratio). The simulation results show that if an offered load is less than 0.9, Hybrid mode has lower cell loss rate than the other modes; otherwise, Queueloss mode illustrates the lowest cell loss rate, which is a different result from previous researches. However, the difference between Hybrid and Queueloss modes is comparably small. As expected, the average cell delay in Backpressure mode is lower than those of Queueloss mode and Hybrid mode, since the cell delay due to the retransmission of higher number of dropped cells in Backpressure mode is not considered.

A novel routing optical matrix swtiching method

A routing optical matrix switching method which constitutes of a novel nonblocking routing optical Crossbar network system is presented. The routing optical Crossbar network includes two parts: one is a routing fan-out unit which provides multi-optical channels for each input light beam, and the other is a routing fan-in unit which combines the optical channels with the same destination output port into one. A module of 4×4 routing optical matrix switching module was developed by this method, which is as well applicable to 2×2,8×8, etc. These optical matrix switches can widely be used in the field of DWDM communications.

The UniMIN switch architecture for large-scale ATM switches

A general expansion architecture is proposed that can be used in building large-scale switches using any type of asynchronous transfer mode (ATM) switch. The proposed universal multistage interconnection network (UniMIN) switch is composed of a buffered distribution network (DN) and a column of output switch modules (OSMs), which can be any type of ATM switch. ATM cells are routed to their destination using a two-level routing strategy. The DN provides each incoming cell with a self-routing path to the destined OSM, which is the switch module containing the destination output port. Further routing to the destined output port is performed by the destination OSM. Use of the channel grouping technique yields excellent delay/throughput performance in the DN, and the virtual FIFO concept is used for implementing the output buffers of the distribution module without internal speedup. We also propose a "fair virtual FIFO" to provide fairness between input links while preserving cell sequence. The distribution network is composed of one kind of distribution module which has the same size as the OSM, regardless of the overall switch size N. This gives good modular scalability in the UniMIN switch. Performance analysis for uniform traffic and hot-spot traffic shows that a negligible delay and cell loss ratio in the DN can be achieved with a small buffer size, and that DN yields robust performance even with hot-spot traffic. In addition, a fairness property of the proposed fair virtual FIFO is shown by a simulation study.

Look-ahead reservation-based scheduling for input–output buffered ATM switch

The authors present a decentralised scheduling approach for an input–output buffered ATM switch based on look-ahead reservation that minimises head-of-line blocking. Cells in an input port are queued separately according to their destined output port. To schedule the transmission time of cells in the input buffer, the input port may send requests to output ports to reserve bandwidth and buffer space at most ω cell times in advance. The reservation request carries with it the state information of the input port which allows the output port to compute a conflict-free schedule. Co-ordination among input/output ports are not required. This approach effectively minimises head-of-line blocking. A simulation study reveals that the performance of the proposed method, in terms of throughput and cell delay, is substantially better than the windowing approach and is close to that of the optimal scheduling method using exhaustive search.

Design and performance evaluation of a distributed knockout switch with input and output buffers

A nonblocking ATM switch with input and output buffers is proposed and its performance is evaluated. The proposed switch is a modified version of an existing distributed-knockout-switch . In the proposed switch architecture, an input port with a nonempty queue always sends a cell to the switch at the beginning of each time slot. The cell sent out from an input port reaches either its destination output port (if it wins the contention) or a different input port (if it loses). A priority scheme is adopted to preserve service-cell sequencing. A cell is discarded if it loses a predetermined number of consecutive contentions. A modified architecture which can provide multicast service is also presented. Simulations are performed to evaluate the proposed switch architecture under both uniform- and hot-spot nonuniform-traffic models.