DEPFET Sensor With Signal Compression Research Articles

A 64k pixel CMOS-DEPFET module for the soft X-rays DSSC imager operating at MHz-frame rates

The 64k pixel DEPFET module is the key sensitive component of the DEPFET Sensor with Signal Compression (DSSC), a large area 2D hybrid detector for capturing and measuring soft X-rays at the European XFEL. The final 1-megapixel camera has to detect photons with energies between 250,text{eV} and 6,text{keV}, and must provide a peak frame rate of 4.5,text{MHz} to cope with the unique bunch structure of the European XFEL. This work summarizes the functionalities and properties of the first modules assembled with full-format CMOS-DEPFET arrays, featuring 512,times ,128 hexagonally-shaped pixels with a side length of 136 μm. The pixel sensors utilize the DEPFET technology to realize an extremely low input capacitance for excellent energy resolution and, at the same time, an intrinsic capability of signal compression without any gain switching. Each pixel of the readout ASIC includes a DEPFET-bias current cancellation circuitry, a trapezoidal-shaping filter, a 9-bit ADC and a 800-word long digital memory. The trimming, calibration and final characterization were performed in a laboratory test-bench at DESY. All detector features are assessed at 18,^{circ }text{C}. An outstanding equivalent noise charge of 9.8e−rms is achieved at 1.1-MHz frame rate and gain of 26.8 Analog-to-Digital Unit per keV (,text {ADU}/text{keV}). At 4.5,text{MHz} and 3.1,,text {ADU}/text{keV}, a noise of 25.5 e−rms and a dynamic range of 26,text{k}text {e}^{-} are obtained. The highest dynamic range of 1.345,text{M}text {e}^{-} is reached at 2.25,text{MHz} and 1.6,text {ADU}/text{keV}. These values can fulfill the specification of the DSSC project.

Qualification and Integration Aspects of the DSSC Mega-Pixel X-Ray Imager

The focal-plane module is the key component of the DEPFET sensor with signal compression (DSSC) mega-pixel X-ray imager and handles the data of 128 $\times512$ pixels. We report on assembly-related aspects, discuss the experimental investigation of bonding behavior of different adhesives, and present the metrology and electrical test results of the production. The module consists of two silicon (Si) sensors with flip-chip connected CMOS integrated circuits, a Si-heat spreader, a low-temperature co-fired ceramics circuit board, and a molybdenum frame. A low-modulus urethane-film adhesive fills the gaps between on-board components and frame. It is also used between board and heat spreader, reduces the misfit strain, and minimizes the module warpage very efficiently. The heat spreader reduces the on-board temperature gradient by about one order of magnitude. The placement precision of the bare modules to each other and the frame is characterized by a standard deviation below 10 and 65 $\mu \text{m}$ , respectively. The displacement due to the in-plane rotation and vertical tilting errors remains below 80 and 50 $\mu \text{m}$ , respectively. The deflection of the sensor plane shows a mean value below 30 $\mu \text{m}$ with a standard deviation below 15 $\mu \text{m}$ . Less than 4% of the application-specified integrated circuits (ASICs) exhibit a malfunction. More than two-thirds of the sensors have a maximum leakage current below 1 $\mu \text{A}$ .

First results on DEPFET Active Pixel Sensors fabricated in a CMOS foundry—a promising approach for new detector development and scientific instrumentation

DEPFET Active Pixel Sensors (APS) have been introduced as focal plane detectors for X-ray astronomy already in 1996. Fabricated on high resistivity, fully depleted silicon and back-illuminated they can provide high quantum efficiency and low noise operation even at very high read rates. In 2009 a new type of DEPFET APS, the DSSC (DEPFET Sensor with Signal Compression) was developed, which is dedicated to high-speed X-ray imaging at the European X-ray free electron laser facility (EuXFEL) in Hamburg. In order to resolve the enormous contrasts occurring in Free Electron Laser (FEL) experiments, this new DSSC-DEPFET sensor has the capability of nonlinear amplification, that is, high gain for low intensities in order to obtain single-photon detection capability, and reduced gain for high intensities to achieve high dynamic range for several thousand photons per pixel and frame. We call this property “signal compression”.Starting in 2015, we have been fabricating DEPFET sensors in an industrial scale CMOS foundry maintaining the outstanding proven DEPFET properties and adding new capabilities due to the industrial-scale CMOS process. We will highlight these additional features and describe the progress achieved so far. In a first attempt on double-sided polished 725 μm thick 200 mm high resistivity float zone silicon wafers all relevant device related properties have been measured, such as leakage current, depletion voltage, transistor characteristics, noise and energy resolution for X-rays and the nonlinear response. The smaller feature size provided by the new technology allows for an advanced design and significant improvements in device performance. A brief summary of the present status will be given as well as an outlook on next steps and future perspectives.

First functionality tests of a 64 × 64 pixel DSSC sensor module connected to the complete ladder readout

The European X-ray Free Electron Laser (XFEL.EU) will provide every 0.1 s a train of 2700 spatially coherent ultrashort X-ray pulses at 4.5 MHz repetition rate. The Small Quantum Systems (SQS) instrument and the Spectroscopy and Coherent Scattering instrument (SCS) operate with soft X-rays between 0.5 keV–6 keV. The DEPFET Sensor with Signal Compression (DSSC) detector is being developed to meet the requirements set by these two XFEL.EU instruments. The DSSC imager is a 1 mega-pixel camera able to store up to 800 single-pulse images per train. The so-called ladder is the basic unit of the DSSC detector. It is the single unit out of sixteen identical-units composing the DSSC-megapixel camera, containing all representative electronic components of the full-size system and allows testing the full electronic chain. Each DSSC ladder has a focal plane sensor with 128× 512 pixels. The read-out ASIC provides full-parallel readout of the sensor pixels. Every read-out channel contains an amplifier and an analog filter, an up-to 9 bit ADC and the digital memory. The ASIC amplifier have a double front-end to allow one to use either DEPFET sensors or Mini-SDD sensors. In the first case, the signal compression is a characteristic intrinsic of the sensor; in the second case, the compression is implemented at the first amplification stage. The goal of signal compression is to meet the requirement of single-photon detection capability and wide dynamic range. We present the first results of measurements obtained using a 64× 64 pixel DEPFET sensor attached to the full final electronic and data-acquisition chain.

The DEPFET detector-amplifier structure for spectroscopic imaging in astronomy and for experiments at free electron lasers

The DEPFET detector-amplifier structure possesses several unique properties which make it extremely useful as readout element in semiconductor detectors and in particular as building block of semiconductor pixel detectors. Variations of DEPFETs can be tuned to specific requirements as to be sensitive only in predetermined time intervals, to measure signal charge with sub-electron precision, dead-time-free readout and with signal compression. These devices have been shown to work in simulations and in prototypes. Recently the first two fully developed detector systems have been finished and installed in the MIXS (Mercury Image X-ray Spectrometer) instrument of the Mercury Planetary Orbiter scheduled to be launched in 2017. A further DEPFET detector system under development is the DSSC (Depfet Sensor with Signal Compression) that will be installed in one of the beam-lines of XFEL. The requirements of the two projects are rather different. While the MIXS sensors are supposed to measure precisely the energy and position of single photons down to very low energies but at moderate rates, the DSSC has to measure the number of photons arriving in each pixel within a time interval of 220ns. Here the challenge is the capability of detecting single X-ray photons in one pixel simultaneously with up to 10,000 photons in some other pixels. Device functioning has been verified with sensors produced in a research laboratory. Now process and design have been adapted to an industrial type production line, allowing additional improvements.

Methods for calibrating the gain and offset of the DSSC detector for the European XFEL using X-ray line sources

The DSSC (DEPFET Sensor with Signal Compression) will be a silicon based, 2d 1 Mpx imaging detector for the European X-ray Free Electron Laser Facility (XFEL.EU) in Hamburg, Germany. The DSSC is foreseen for soft X-radiation from 0.5 keV up to 6 keV . Driven by its scientific requirements, the design goals of the detector system are single photon detection, high dynamic range and a high frame rate of up to 4.5 MHz. Signal compression and amplification will be performed in the silicon sensor pixels yielding a low signal noise. Utilizing an in-pixel active filtering stage and an 8/9-bit ADC, the detector will provide parallel read-out of all pixels. In order to calibrate offset and gain, the procedure currently under investigation relies on determining peak positions in measurements with calibration line sources such as 55Fe. Here the status of studies of the stability and performance of a parameterized fit function designed for this task will be presented.

X-CSIT: a toolkit for simulating 2D pixel detectors

A new, modular toolkit for creating simulations of 2D X-ray pixel detectors, X-CSIT (X-ray Camera SImulation Toolkit), is being developed. The toolkit uses three sequential simulations of detector processes which model photon interactions, electron charge cloud spreading with a high charge density plasma model and common electronic components used in detector readout. In addition, because of the wide variety in pixel detector design, X-CSIT has been designed as a modular platform so that existing functions can be modified or additional functionality added if the specific design of a detector demands it. X-CSIT will be used to create simulations of the detectors at the European XFEL, including three bespoke 2D detectors: the Adaptive Gain Integrating Pixel Detector (AGIPD), Large Pixel Detector (LPD) and DePFET Sensor with Signal Compression (DSSC). These simulations will be used by the detector group at the European XFEL for detector characterisation and calibration. For this purpose, X-CSIT has been integrated into the European XFEL's software framework, Karabo. This will further make it available to users to aid with the planning of experiments and analysis of data. In addition, X-CSIT will be released as a standalone, open source version for other users, collaborations and groups intending to create simulations of their own detectors.

A front-end stage with signal compression capability for XFEL detectors

In this work, we present a front-end stage with signal compression capability to be used in detectors for the new European XFEL in Hamburg. This front-end is an alternative solution under study for the DEPFET Sensor with Signal Compression (DSSC) detection system for the European XFEL. The DEPFET sensor of the DSSC project has a high dynamic range and very good noise performance. The high gain for small collected charge and the compression for large signals will provide both desired features of single photon detection capability and wide dynamic range. However, manufacturing of the DEPFET sensor requires a sophisticated processing technology with a relatively long time fabrication process. Accordingly, an alternative solution, namely Day-0 solution, was introduced as an approach characterized not by the best performance of the DEPFET, but available in a shorter time to allow first beam tests and experiments. The alternative sensor is made of mini Silicon Drift Detector (mini-SDD) and the compression behavior is obtained from the front-end on the readout ASIC and not by the transistor integrated in the silicon sensor, as in the DEPFET. The first version of corresponding front-end of the Day-0 solution has been realized based on an input PMOSFET transistor placed on the readout chip. This simple front-end proved the working principle of the proposed compression technique and the desired noise performance. In this paper, an improved version of the Day-0 front-end is presented. In the new prototype, the current gain of the front-end stage has been increased by factor of 1.8, the total input capacitance (SDD+PMOSFET) has been reduced by factor of 2 with respect to the previous prototype and consequently the noise performance has been improved. Moreover, by introducing selectable extra branches in parallel with the main one, the compression behavior of the front-end can be tuned based on desired dynamic range.

Pixel-Level Charge and Current Injection Circuit for High Accuracy Calibration of the DSSC Chip at the European XFEL

This work presents the experimental results from the characterization of the second prototype of a high accuracy (in terms of linearity, mismatch and noise) injection circuit to be used for in-pixel calibration of a large sensor matrix. The circuit was designed for the calibration of the pixel cell unit of a hybrid pixel device, the DEPFET Sensor with Signal Compression (DSSC) chip, for the large format imager at the European X-ray Free Electron Laser (XFEL), but, in principle, it can be used also for other kinds of detectors, e.g., deep N-well monolithic CMOS sensors. In the case of hybrid pixels, the injection circuit is particularly useful to test the functionality of the readout electronics already at the chip level, when no sensor is connected to the chip. Two injection techniques have been investigated: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture of the calibration circuit, which has been implemented in a 130-nm CMOS technology, and to present the results from the characterization of the second prototype.

Expected performance of the DEPFET sensor with signal compression: A large format X-ray imager with mega-frame readout capability for the European XFEL

The new DSSC (DEPFET sensor with signal compression) detector system is being developed in order to fulfil the requirements of the future XFEL in Hamburg. The instrument will be able to record X-ray images with a maximum frame rate of 5 MHz and to achieve a high dynamic range. The system is based on a silicon pixel sensor with a new designed non-linear-DEPFET as a central amplifier structure. The detector chip is bump-bonded to mixed signal readout ASICs that provide full parallel readout and temporary data storage. The signals coming from the detector are processed by an analog filter, immediately digitized by 8-ENOB ADCs and locally stored in a custom designed memory. The ASICs are designed in 130 nm CMOS technology. During the time gap of 99 ms of the XFEL machine, the digital data are sent off the focal plane to a DAQ electronics that acts as an interface to the back-end of the whole instrument. The pixel sensor has been designed so as to combine high energy resolution at low signal charge with high dynamic range. This has been motivated by the desire to be able to be sensitive to single low energy photons and, at the same time, to measure at other positions of the detector signals corresponding to up to 10 4 photons of 1 keV. In order to fit this dynamic range into a reasonable output signal swing, achieving at the same time single photon resolution, a strongly non-linear characteristic is required. The new proposed DEPFET provides the required dynamic range compression at the sensor level, considerably facilitating the task of the electronics. At the same time the DEPFET charge handling capacitance is enormously increased with respect to standard DEPFETs. The sensor matrix will comprise 1024 × 1024 pixels of hexagonal shape with a side-length of 136 μ m . The simultaneous implementation of the 5 MHz frame rate, of the single low-energy photon resolution and of the high dynamic range goes beyond all the existing instruments and requires the development of new concepts and technologies.