Delta Modulation Scheme Research Articles

An innovative FPGA-based ADC/DAC design using 1-bit adaptive-delta modulation

The Analog-to-Digital Converter (ADC), with its wide variety of applications in the electronics and communication domains, is the most crucial unit in every digital gadget. This paper discusses a smart way of converting an input analog signal to its digital counterpart using an innovative Adaptive-Delta modulator, followed by a signal reconstruction process to retrieve the original message. It has done the design in Matrix Laboratory (MATLAB) Simulink, and the hardware implementation is tested on the Xilinx Spartan-6 LX45 FPGA core. This design aims for high-accuracy conversion and optimization of hardware resources. The 1-bit adaptive model is superior in comparison to the traditional delta modulation (DM) scheme while tracking stiff analog input signals, producing a much lower mean square error. The implementation is quite simple as it uses the transmission of 1-bit digital data at a time. On the receiver side, digital-toanalog conversion (DAC) makes use of the same adaptive logic in reconstructing the original input signal. The designed prototype demonstrates its resistance to a wide range of input amplitude and frequency variations. The ADC-DAC design method in this paper is accurate, makes the best use of resources, and is easy to use.

Investigation of Current Reference Schemes in Model Predictive Control and Asynchronous Sigma–Delta Modulation for Control of Single-Phase Inverter

This paper investigates different current reference generation schemes for the control of single-phase inverter-based distributed generator with model predictive control-based space vector modulation and asynchronous sigma–delta modulation schemes. The current references for the developed controller have been deduced from three different schemes, known as scalar, modified scalar and simplified active and reactive power control. The performance of the developed controllers with considered current reference generation schemes is examined for different real and reactive power feedings from the single-phase generator to the grid.

Multiple Hidden Markov Model Post Processed with Support Vector Machine to Recognize English Handwritten Numerals

This paper presents rotation and size invariant English numerals recognition system with, competitive recognition rate. The novelty of this paper is the introduction of two unique methods of feature extraction namely Pixel Moment of Inertia (PMI) and Delta Distance Coding (DDC). The proposed Multiple Hidden Markov Model (MHMM) is a two tier model to neutralize the effect of two very frequent writing styles of numerals ‘4’ and ‘7’ on their recognition rates. The novelty of PMI is that it finds moment of all the pixels of a specified zone about the central pixel and not about geometrical centroid of image area. In this paper, PMI has been observed to have an upper hand over centroidal MI. DDC is a new technique of curvature coding, based on distance from a reference level and is similar to the logic behind Delta modulation scheme in Digital Communications. Thus, the current paper correlates two digital domains namely, Digital Image Processing and Digital Communications. Support Vector Machine differentiates two close output classes obtained from classification with MHMM. The overall recognition accuracy rate of 99.17% has been achieved based on MNIST database.

Reduction in limit cycle oscillation and conducted electromagnetic emissions by switching frequency adjustment in digitally controlled DC-DC converters

Limit Cycle oscillation is a major issue in digitally controlled dc–dc converter due to low resolution digital pulse width modulators (DPWMs). This paper proposes a method for the reduction in limit cycle oscillation by combining the advantages of sigma delta modulation scheme and frequency modulation of switching frequency. In this paper, the correction of quantization error due to low resolution DPWM is accomplished by changing the switching frequency. The error due to the quantization of DPWM was accumulated for few clock cycles and the switching frequency was adjusted in the last cycle such that the duty ratio changes by the number of LSBs corresponding to the quantization error. The quantization error correction increases the effective resolution of DPWM thereby reducing the ripple due to limit cycle oscillations. Further, it also reduces the conducted electromagnetic emissions. Simulations using the SIMULINK model of the converter were carried out to validate the effectiveness of the proposed method. Experimental verification of the scheme was also carried out using a 16 bit DSP Processor which showed around 17 dB reduction in ripple due to limit cycle oscillation and 25 dB reduction in conducted emission levels.

A New Space Vector Modulation Scheme for Multilevel Inverters Which Directly Vector Quantize the Reference Space Vector

A new space-vector-based sigma delta modulation scheme for any general N-level voltage source inverter is proposed in this paper, which directly quantizes the reference space vector. The proposed scheme uses the sigma delta modulation with the quantizer implemented by the proposed space vector quantizer. A new scheme is proposed for directly quantizing the reference space vector to the multilevel inverter switching vectors without mapping it into two-level inverter vector space. Voronoi regions of the multilevel inverter vector space in the proposed space vector quantizer are defined as a parallelogram with the inverter switching vectors as its vertices. The property of the integer values of the inverter switching vectors in 60° coordinates is utilized for the direct vector quantization of the instantaneous reference voltage space vector. The proposed scheme is implemented for five-level inverters realized by an open-end-winding induction motor fed with two three-level inverters from either side having symmetrical dc-link voltages, and results are presented.

Optimised synchronised discrete delta modulation scheme for UPS applications

The concept and results of a new optimised synchronised discrete delta modulation (SDDM) scheme suitable for DC-AC power conversion in uninterruptible power supply (UPS) applications are presented. Unlike the traditional delta modulation scheme, the SDDM scheme has a well defined harmonic spectrum, resulting in simple filter design and reduced radio interterence.

A single-phase delta-modulated inverter for UPS applications

The performance characteristics of the rectangular wave delta modulation (RWDM) scheme for uninterruptible power supply (UPS) applications is investigated. Normalized characteristic curves that show the effect of various modulator parameters on the frequency spectrum of the inverter output voltage are obtained using discrete Fourier transform (DFT) and harmonic analysis techniques. The performance of a single-phase half-bridge inverter with an LC filter is discussed, and experimental results are provided to validate the predicted and simulated results. It is shown that the harmonic content of the inverter output waveform can be controlled through the control of the modulator parameters.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Speech data encoding scheme

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An Improved Hybrid Companding Delta Modulator

We present two new forms of delta modulation for speech encoding. These algorithms differ from the earlier hybrid companding delta modulation (HCDM) scheme in that they employ Song voice adaptation as the basis of the instantaneous companding, rather than constant factor adaptation. We show that although the two new algorithms produce SQNR curves which are similar to that of HCDM, a subjective evaluation of the three systems significantly favors the new ones. In addition, the new algorithms offer simpler implementation in digital hardware.

An investigation of delta modulation of speech for mobile radio

A characteristic of a mobile radio channel is the occurrence of correlated signal fading that results in burst errors. The use of adaptive delta modulation (ADM) based on explicit transmission of the quantizer step size was proposed earlier for speech communication over such a channel. Two other variable step-size delta modulation (VSDM) schemes are presented, and their performance in a mobile radio environment is discussed. One of them is the constant factor delta modulation that uses one-bit memory and produces fast and instantaneous step-size changes. The other is the digitally controlled delta modulation (DCDM) that incorporates a new step-size adaptation strategy using seven bits of memory. In some cases, bit scrambling has been used. This is equivalent to scrambling (spreading out in time) the, clustered errors. Computer simulations providing values of coder parameters for satisfactory signal-to-noise ratios for band-limited speech signals and Gaussian noise are described. New hardware realizations are given that allow those parameters to vary smoothly for a wide range of sampling frequencies. Results of informal listening tests obtained with a mobile radio channel simulator are included. It is shown that for mobile radio, DCDM, as expected, is the better of the two coders. This is because it does not sacrifice its overload performance for the sake of error resistance.

The Space Shuttle Ground Terminal Delta Modulation System

Shuttle voice processing uses a Variable Slope Delta Modulation scheme which is a variant of the ABATE algorithm. This paper summarizes the ground terminal subsystem which processes the multiplexed voice and telemetry data digital sequence in the downlink processing and digitizes the voice signal in the uplink processing. The Delta Modulation System (DMS) performance characteristics are given in terms of an intelligibility test score and in terms of time and frequency responses measured on a production system developed for NASA Goddard Space Flight Center. Implementation details of the encoder and decoder algorithms are given in terms of the circuit logic used to implement them.

Information rates of Wiener processes

Rate distortion functions are calculated for time discrete and time continuous Wiener processes with respect to the mean squared error criterion. In the time discrete case, we find the interesting result that, for <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0 \leq D \leq \sigma^2 /4</tex> , <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R(D)</tex> for the Wiener process is identical to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R(D)</tex> for the sequence of zero mean independent normally distributed increments of variance \sigma^2 whose partial sums form the Wiener process. In the time continuous case, we derive the explicit formula <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R(D) = 2 \sigma^2 / ( \pi^2 D)</tex> , where <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">\sigma^2</tex> is the variance of the increment daring a one-second interval. The resuiting <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R(D)</tex> curves are compared with the performance of an optimum integrating delta modulation system. Finally, by incorporating a delta modulation scheme in the random coding argument, we prove a source coding theorem that guarantees our <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R(D)</tex> curves are physically significant for information transmission purposes even though Wiener processes are nonstationary.

Companded Delta Modulation for Telephony

An experimental delta modulation system that appears to satisfy Bell System telephone requirements in the telephone plant environment is described. A significant improvement in signal-to-noise ratio over a large dynamic range has been achieved with a modification that is akin to syllabic companding. It consists in adapting the modulator quantizing step size to the signal level over part of the dynamic range. The development was stimulated by the suitability of delta modulators for low-cost integrated circuits. The implementation is based on repeated use of two standard monolithic integrated circuits: an RTL logic gate and an operational amplifier. Several laboratory models have consistently satisfied Bell System transmission requirements with a bit rate of 96.5 kHz and a companding range of 26 dB. A series of subjective evaluation tests are being carried out at this time to assess listener reactions and to optimize system parameters accordingly. Indications are that a reduction of the bit rate will result from these tests. The delta modulation scheme is economically more attractive than pulse-code modulation (PCM) in telephone applications that require digital coding of the analog signal close to its source and with a minimum of common equipment.