Fault Pattern Classification Research Articles

Improved wafer map defect pattern classification using automatic data augmentation based lightweight encoder network in contrastive learning

Improved wafer map defect pattern classification using automatic data augmentation based lightweight encoder network in contrastive learning

데이터 클래스 불균형을 고려한 전이학습 기반의 반도체 웨이퍼 빈 맵 결함 패턴 분류

데이터 클래스 불균형을 고려한 전이학습 기반의 반도체 웨이퍼 빈 맵 결함 패턴 분류

Development of a Wafer Defect Pattern Classifier Using Polar Coordinate System Transformed Inputs and Convolutional Neural Networks

Defect pattern analysis of wafer bin maps (WBMs) is an important means of identifying process problems. Recently, automated analysis methods using machine learning or deep learning have been studied as alternatives to manual classification by engineers. In this paper, we propose a method to improve the feature extraction performance of defect patterns by transforming the polar coordinate system instead of the existing WBM image input. To reduce the variability of the location representation, defect patterns in the Cartesian coordinate system, where the location of the distributed defect die is not constant, were converted to a polar coordinate system. The CNN classifier, which uses polar coordinate transformed input, achieved a classification accuracy of 91.3%, which is 4.8% better than the existing WBM image-based CNN classifier. Additionally, a tree-structured classifier model that sequentially connects binary classifiers achieved a classification accuracy of 94%. The method proposed in this paper is also applicable to the defect pattern classification of WBMs consisting of different die sizes than the training data. Finally, the paper proposes an automated pattern classification method that uses individual classifiers to learn defect types and then applies ensemble techniques for multiple defect pattern classification. This method is expected to reduce labor, time, and cost and enable objective labeling instead of relying on subjective judgments of engineers.

Development of a spatial dimension-based taxonomy for classifying the defect patterns in a wafer bin map

A wafer bin map (WBM) represents the locational information of defective chips on the wafer. The spatial correlation of defects on the wafer provides crucial information for the root cause diagnosis of defects in wafer fabrication. The spatial correlation is classified as a defect pattern for efficient diagnostics. A defect pattern taxonomy should be defined in advance for coherent classification of defect patterns. Various taxonomies are used in previous studies, but they share common limitations in that the differentiation among defect patterns is unclear, the set of predefined defect patterns is insufficient, and they cannot accommodate newly-emerged defect patterns. A concept of spatial dimension-based defect pattern taxonomy and its development procedure are proposed. Defect patterns are defined by three spatial dimensions, namely, Shape, Size, and Location. The development procedure is applied to a major NAND flash memory semiconductor manufacturer for two years. Results show that spatial dimension-based taxonomy can improve the performance of the defect pattern classification system by alleviating common existing limitations. Moreover, meaningful defect patterns for diagnostics are retained through the engineers’ involvement in the development procedure.

Interpolation based Semi supervised Contrastive Learning for wafer defect pattern classification

Interpolation based Semi supervised Contrastive Learning for wafer defect pattern classification

Mixed-type defect pattern recognition in noisy labeled wafer bin maps

In semiconductor manufacturing, classification of defect patterns in wafer bin maps (WBMs) helps engineers detect process failures and identify their causes. In recent studies on WBMs, convolutional neural networks (CNNs) have demonstrated effective classification performance based on their high expressive power. However, previous studies have implicitly assumed that the labels of WBMs used for training CNNs are correct, even though labels are often incorrect. When trained on mislabeled data, CNNs with standard cross-entropy loss can easily overfit mislabeled samples, leading to poor generalization for testing data. To overcome this issue, we propose a novel training algorithm called sample bootstrapping. Sample bootstrapping identifies which samples have clean or noisy labels by using a two-component beta mixture model, and measures the uncertainty of each identified label. Then, samples with low uncertainty of their estimated labels are selected to build mini-batches via weighted random sampling. Finally, CNNs are trained on the selected mini-batches with dynamic bootstrapping loss. In this manner, we can correct only the samples that are highly likely to have noisy labels and prevent the risk of false correction of correctly labeled samples. Experiments on simulated and real datasets demonstrate the effectiveness of the proposed method.

Simultaneous classification and out-of-distribution detection for wafer bin maps

Defect pattern classification of wafer bin maps (WBMs) assists in identifying the causes of semiconductor manufacturing process failures, thus contributing to the search for appropriate solutions. However, new previously unobserved defect patterns may be generated in real applications, which require classification methods with out-of-distribution (OOD) pattern detection capabilities. In this paper, we propose a novel method called a spectral-normalized neural radial basis function (SNRBF) network to classify defect patterns in WBMs while simultaneously detecting OOD defect patterns by quantifying the predictive uncertainty of a deep neural network. The SNRBF network adds spectral normalization to the weights in each layer of a deep neural network and replaces the output layer with a radial basis function kernel, facilitating high-quality uncertainty quantification and efficient computation. Additionally, we propose a novel regularization method based on singular values of the representation matrix to improve uncertainty quantification. Furthermore, we propose a new noise-filtering method capable of effectively eliminating random defects in WBMs by considering various defect pattern sizes. The proposed method is evaluated on a real WBM dataset and is demonstrated to outperform other competing methods in OOD detection while presenting competitive classification performance.

Fault diagnosis of analogue circuits based on artificial intelligence algorithms

Abstract The fault diagnosis problem of analog circuits has been paid more and more attention, and the realization of circuit fault feature extraction and pattern classification are two of the key problems. This paper first combines wavelet packet and energy entropy to design a fault feature extraction method based on wavelet packet entropy to solve the problem of analog circuit fault feature extraction. Secondly, the principle of SVM and particle swarm optimization algorithm are combined to design the fault diagnosis process of analog circuits based on an artificial intelligence algorithm. Finally, take the sallen-key circuit as an example to analyze the effectiveness of the wavelet packet entropy algorithm for fault feature extraction and analyze the effectiveness of this paper’s method based on the analog circuit of Wen’s bridge oscillation circuit. The results show that after wavelet packet entropy extraction of the feature vector values is less than 0.001, and the accuracy of the extraction is more than 0.98, the best parameters of the optimization is (182.4, 0.05), the false alarm rate of the fault diagnostic method is 0, the misdiagnosis rate is 0.08, the omission rate is 0, and the correctness rate of the diagnosis of the fault is 0.92. Based on this research is able to carry out the fault diagnosis of the analog circuit.

Shape prior guided defect pattern classification and segmentation in wafer bin maps

Shape prior guided defect pattern classification and segmentation in wafer bin maps

A novel approach for wafer defect pattern classification based on topological data analysis

A novel approach for wafer defect pattern classification based on topological data analysis

Semi-supervised imbalanced classification of wafer bin map defects using a Dual-Head CNN

Wafer Bin Map (WBM) defect patterns are a critical aspect of identifying the root cause of manufacturing defects in the semiconductor industry. Semi-supervised learning (SSL) approaches have gained popularity for this purpose, as they can leverage both labeled and unlabeled data to improve model performance. However, SSL of WBM defect patterns is challenging due to class imbalance, where some defect classes have many more examples than others. Most of the existing SSL approaches assume a balanced dataset and often fail to provide satisfactory results when applied to imbalanced class problems. To address this issue, this work proposes a novel Dual-Head Convolutional Neural Network (CNN) architecture that contains two classifier heads. One classifier head maximizes overall classification scores, while the other aims to maximize per-class classification scores, providing equal attention to both majority and minority classes. The proposed CNN architecture uses pseudo-labels selected based on the outputs of these two classifiers to expand the labeled training set, which is then used to retrain the CNN. In this way, highly confident pseudo-labels are selected even from the minority classes, leading to better model training. Experiments show that the proposed approach is effective in handling class-imbalanced classification of WBM defect patterns, reporting state-of-the-art classification with an F1 score of 0.918, accuracy of 98.2% and a mean per-class accuracy of 91.7% using a lightweight ResNet-10 model as the backbone on the real-world public WBM dataset, WM-811K. The proposed approach’s success suggests that it could be a valuable tool for improving the accuracy and reliability of WBM defect pattern classification in semiconductor manufacturing. The code is available at https://github.com/M-Siyamalan/SSL-DHCNN.

Development of taxonomy for classifying defect patterns on wafer bin map using Bin2Vec and clustering methods

A wafer consists of several chips, and serial electrical tests are conducted for each chip to investigate whether the chip is defective. A bin indicates the test results for each chip with information on which tests the chip failed. A wafer bin map (WBM) shows the locations and bins of the defects on the wafer. WBMs showing spatial patterns of defects usually result from assignable causes in the wafer fabrication process; hence, they should be classified in advance. The existing defect-pattern taxonomies do not consider bins, although useful information can be obtained from them. We propose a taxonomy that consists of the shape, size, location, and bin dimensions. The bin dimension is developed using Bin2Vec method, which determines RGB (red-green-blue) code for each bin according to the spatial similarity between bins. Three levels of the bin dimension are defined by analyzing a large number of WBMs using Bin2Vec and clustering methods. Compared with the existing taxonomies, the proposed taxonomy has the advantage of identifying major bins of defect patterns, new defect patterns, and non-critical defect patterns. A high-quality training dataset was obtained using the proposed taxonomy; consequently, a defect pattern classification model with satisfactory classification performance could be obtained.

SWaCo: Safe Wafer Bin Map Classification With Self-Supervised Contrastive Learning

Defect patterns exhibited in wafer bin maps (WBMs) can provide essential clues about critical process failures to field engineers. In modern manufacturing processes, the automatic WBM defect pattern classification is critical for yield improvement. Although it is difficult to collect sufficient labels while a lot of unlabeled data is given, most existing studies have mainly used only labeled WBM data. Moreover, the unlabeled out-of-distribution (OOD) WBMs are inevitably collected. It degrades the performance of semi-supervised models. To this end, we propose a method for safe wafer bin map classification with self-supervised contrastive learning (SWaCo) to effectively exploit the unlabeled data with OOD. We propose a loss function to utilize label information in the pre-training step to learn more suitable representations for the downstream WBM classification task. The negative labeled examples of the same class as the anchor are used for additional positive examples. Moreover, we investigate proper data augmentation for WBM self-supervised contrastive learning. To evaluate the performance and the applicability of the proposed method, experiments are conducted on a public benchmark WBM dataset, WM-811K. The results demonstrate that the proposed method achieves better classification accuracy than existing methods, especially when only a small amount of class information is given.

Wafer map failure pattern classification using geometric transformation-invariant convolutional neural network

Wafer map defect pattern classification is essential in semiconductor manufacturing processes for increasing production yield and quality by providing key root-cause information. However, manual diagnosis by field experts is difficult in large-scale production situations, and existing deep-learning frameworks require a large quantity of data for learning. To address this, we propose a novel rotation- and flip-invariant method based on the labeling rule that the wafer map defect pattern has no effect on the rotation and flip of labels, achieving class discriminant performance in scarce data situations. The method utilizes a convolutional neural network (CNN) backbone with a Radon transformation and kernel flip to achieve geometrical invariance. The Radon feature serves as a rotation-equivariant bridge for translation-invariant CNNs, while the kernel flip module enables the model to be flip-invariant. We validated our method through extensive qualitative and quantitative experiments. For qualitative analysis, we suggest a multi-branch layer-wise relevance propagation to properly explain the model decision. For quantitative analysis, the superiority of the proposed method was validated with an ablation study. In addition, we verified the generalization performance of the proposed method to rotation and flip invariants for out-of-distribution data using rotation and flip augmented test sets.

Grad-CAM을 활용한 EfficientNetV2 기반 웨이퍼 맵 불량분석 연구

In semiconductors, various defect patterns appear on the wafer map due to problems in the design and manufacturing process. Analysis of generated defect patterns will reduce the rate of defects and enable the production of high-quality semiconductors. Considering the number of semiconductors produced, performing defect analysis by human resources is inefficient. Recently, as hardware performance has improved, high-performance deep learning models have been designed. These models show high performance in image classification and have advantages in terms of processing speed. Therefore, this paper used EfficientNetV2 designed to achieve maximum efficiency with few parameters for semiconductor failure analysis. Identifying the location of defects is a critical element of defect analysis, not just classifying defect patterns. Therefore, in this study, we used Grad-CAM to identify the classification of defect patterns and their approximate location. Wafer map dataset is difficult to collect as data includes defects in manufacturing companies

Color Recurrence Plots for Bearing Fault Diagnosis.

This paper presents bearing fault diagnosis using the image classification of different fault patterns. Feature extraction for image classification is carried out using a novel approach of Color recurrence plots, which is presented for the first time. Color recurrence plots are created using non-linear embedding of the vibration signals into delay coordinate space with variable time lags. Deep learning-based image classification is then performed by building the database of the extracted features of the bearing vibration signals in the form of Color recurrence plots. A Series of computational experiments are performed to compare the accuracy of bearing fault classification using Color recurrence plots. The standard bearing vibration dataset of Case Western Reserve University is used for those purposes. The paper demonstrates the efficacy and the accuracy of a new and unique approach of scalar time series extraction into two-dimensional Color recurrence plots for bearing fault diagnosis.

Fault Diagnosis Method for an Underwater Thruster, Based on Load Feature Extraction

Targeting the problem of fault diagnosis in magnetic coupling underwater thrusters, a fault pattern classification method based on load feature extraction is proposed in this paper. By analyzing the output load characteristics of thrusters under typical fault patterns, the load torque model of the thrusters is established, and two characteristic parameters are constructed to describe the different fault patterns of thrusters. Then, a thruster load torque reconstruction method, based on the sliding mode observer (SMO), and the fault characteristic parameter identification method, based on the least square method (LSM), are proposed. According to the identified fault characteristic parameters, a thruster fault pattern classification method based on a support vector machine (SVM) is proposed. Finally, the feasibility and superiority of the proposed aspects are verified, through comparative simulation experiments. The results show that the diagnostic accuracy of this method is higher than 95% within 5 seconds of the thruster fault. The lowest diagnostic accuracy of thrusters with a single failure state is 96.75%, and the average diagnostic accuracy of thrusters with five fault states is 98.65%.

Bearing Fault Classification Using Improved Antlion Optimizer and Extreme Learning Machine

Bearing is an important part of rotating machinery, and its early fault diagnosis and accurate classification have always been difficult in engineering application. At present, the models based on the fusion of various optimization algorithms and neural networks have become one of the emerging techniques for accurate fault identification. Firstly, an improved antlion optimizer (ALO) algorithm based on estimation of distribution algorithm (EDA) and variable-step Lévy flight strategy, abbreviated as ELALO, is proposed as a new bionic intelligence. During the initialization of population, the individuals with poor fitness are redistributed by the Gaussian probability model. In view of the stagnation of iteration, Lévy flight strategy is introduced and the adaptive change of disturbance step length is controlled. Experimental results on 4 benchmark functions show that the novel ELALO can effectively improve the solution accuracy and convergence speed, compared with the original ALO. Secondly, in order to solve the disadvantage that extreme learning machine (ELM) network is easy to fall into local optimization, this ELALO algorithm is used to initialize the weights and thresholds of its network and to form the new pattern recognition model, ELALO-ELM. Finally, the bearing data of 8 patterns from Western Reserve University are decomposed by local mean decomposition (LMD), and then the symbolic entropy (SE) of the first three product function (PF) components signals is extracted and used as the input eigenvectors. Compared with the standard ELM and ALO-ELM models, the ELALO-ELM model has better generalization and stronger robustness and it can effectively improve the efficiency of network training and the accuracy of early fault pattern classification in bearing fault diagnosis. The new ELALO-ELM model can also be used for other difficult classification problems.

WDP-BNN: Efficient wafer defect pattern classification via binarized neural network

Wafer map defect pattern classification using convolutional neural network (CNN) has gained a lot of attention in recent years but it demands huge computation and memory cost. Therefore, a WDP-BNN framework based on the binarized neural network is proposed to reduce memory requirement by 29.70× and speed up by 1.66×. To overcome the imbalance problem and performance loss due to binarization of network, advanced data augmentation methods including (Chip Reverse, Chip Translate, Chip Combine) along with random under-sampling method have incorporated in the framework. Experimental results on the WM-811K dataset have demonstrated that the WDP-BNN model has outperformed the state-of-the-art works with the highest classification accuracy of 94.83% and the memory reduction of 1.10-25.93×.

Semiconductor Defect Pattern Classification by Self-Proliferation-and-Attention Neural Network

Semiconductor manufacturing is on the cusp of a revolution: the Internet of Things (IoT). With IoT we can connect all the equipment and feed information back to the factory so that quality issues can be detected. In this situation, more and more edge devices are used in wafer inspection equipment. This edge device must have the ability to quickly detect defects. Therefore, how to develop a high-efficiency architecture for automatic defect classification to be suitable for edge devices is the primary task. In this paper, we present a novel architecture that can perform defect classification in a more efficient way. The first function is self-proliferation, using a series of linear transformations to generate more feature maps at a cheaper cost. The second function is self-attention, capturing the long-range dependencies of feature map by the channel-wise and spatial-wise attention mechanism. We named this method as self-proliferation-and-attention neural network. This method has been successfully applied to various defect pattern classification tasks. Compared with other latest methods, SP&A-Net has higher accuracy and lower computation cost in many defect inspection tasks.