Decoder Buffer Size Research Articles

FPGA Investigation on Error-Flare Performance of a Concatenated Staircase and Hamming FEC Code for 400G Inter-Data Center Interconnect

Forward error correction (FEC) performance down to 10−15 bit error rate (BER) of a concatenated staircase and Hamming code (CSHC), which was recently proposed for the first 400G inter-data center interconnect standard, is verified with a 50-piece field-programmable gate array (FPGA) implementation at a record 200-Gb/s throughput. The effect of digital noise tail accuracy on the FEC emulation results is investigated. A converging criterion is proposed and demonstrated for achieving high confidence in artificial digital-noise-source-based FPGA emulations. The CSHC performance as a function of decoding iterations of the outer staircase code is investigated, and emulation results show that six staircase decoding iterations is the optimal choice. The FPGA emulations also reveal the existence of an error flare of the CSHC at 10−10 BER, which corrects the predicted BER threshold from 1.25 × 10−2 to 1.21 × 10−2. Further investigations on the effects of interleaving processes and staircase decoding buffer size show that the error flare behavior of the CSHC depends on the decoding buffer size of the outer staircase code. To remove the CSHC error flare, a proper choice of the staircase decoding buffer size is shown to be 6, which also moves the FEC threshold to 1.27 × 10−2.

MB-based Decoder Buffer Reduction for Multi-view Video Coding

The hierarchical B picture (HBP) coding structure has been developed to improve the coding efficiency of multi-view video coding (MVC). HBP coding structure adopts temporal prediction and inter-view prediction to reduce the residual of the data in motion estimation. Since all the reference frames must be exhaustively searched for inter-view and temporal predictions, the encoder may take high computation time and need a large buffer size for the decoded picture. Hence, this paper proposes an effective reference frames determination method for motion estimation in HBP to reduce the computation time and buffer size. The proposed algorithm uses the relationship between the degree of motion and its predicted direction to select the prediction reference frame in the inter-view or temporal domain. The decoder buffer of the proposed algorithm only stores the reference region MBs instead of the entire reference picture, so that the decoder buffer size is significantly reduced. The experiment results show that the encoding time for the main views and the auxiliary views can be reduced by up to 65.39 % and 66.92 %, respectively. The decoder buffer size and bandwidth can be reduced by up to 70 % and 46.67 %, respectively. The results show that the proposed method not only achieves low computational complexity, but also reduces the decoded buffer size while maintaining high quality.

Reduced complexity compression algorithms for direct-write maskless lithography systems

Achieving the throughput of one wafer layer per minute with a direct-write maskless lithography system, using 22-nm pixels for 45-nm feature sizes, requires data rates of about 12 Tb/s. In our previous work, we developed a novel lossless compression technique specifically tailored to flattened, rasterized, layout data called context copy combinatorial code (C4), which exceeds the compression efficiency of all other existing techniques including BZIP2, 2D-LZ, and LZ77, especially under a limited decoder buffer size, as required for hardware implementation. In this work, we present two variations of the C4 algorithm. The first variation, block C4, lowers the encoding time of C4 by several orders of magnitude, concurrently with lowering the decoder complexity. The second variation, which involves replacing the hierarchical combinatorial coding part of C4 with Golomb run-length coding, significantly reduces the decoder power and area as compared to block C4. We refer to this algorithm as block Golomb context copy code (block GC3). We present the detailed functional block diagrams of block C4 and block GC3 decoders, along with their hardware performance estimates as the first step of implementing the writer chip for maskless lithography.

Convex Programming Formulations for Rate Allocation in Video Coding

A rate control technique for video encoding under complex transmission scenarios is presented. A typical application for this method is the transmission of video over variable bit rate channels while accounting for restrictions on the end-to-end delay and decoder buffer size. That the resulting multiple constraints on the source and channel rates may be relaxed without loss of optimality into a set of linear inequality constraints-though they are usually expressed in nonlinear form-is a key insight of this paper. This allows for a systematic treatment of a large class of rate constraints and leads to a convex programming (CP) formulation for rate control. Approximation of the frame distortion-rate data by piecewise linear functions further facilitates an efficient solution based on linear programming (LP), a special case of CP. The LP method provides bounds for the deviation from optimality. Results for a standard video test set show that the proposed method provides solutions with mean square error (MSE) distortion value within 2% of the global minimum across a range of rates. The proposed technique is also applied in conjunction with a perceived distortion measure. Results exhibit significant reduction in blocking artifacts and flicker compared to the use of MSE

Optimal packet-level fec strategies in connections with large delay-bandwidth products

We study the problem of optimal packet coding for connections with large delay-bandwidth products. Generally, for a given loss rate, using a higher coding redundancy achieves a higher average throughput, but incurs higher transmission costs (e.g. in terms of energy of a wireless device) and creates a higher load on the network. We define an optimal coding strategy as one that minimizes the expected cost/throughput ratio, for a connection that has a cost per unit time and a cost per transmitted packet. We present an algorithm for computing the optimal strategy and study its properties. We demonstrate that the cost/throughput ratio can be significantly better than with simple retransmission schemes, show that it strongly depends on the decoding buffer size, and obtain several asymptotic bounds on the optimal strategy performance for both unlimited and fixed-size decoding buffers

A novel two-pass VBR coding algorithm for fixed-size storage application

We propose a novel variable bit rate (VBR) algorithm that adopts two-pass encoding to implement high-performance coding for fixed-size storage applications. In the first-pass encoding, we use the original frame as the reference for motion estimation. This way, we are able to obtain the exact relationship between the amount of bits generated for each frame (rate) and each possible quantization factor (Q) so that an R-Q function can be built. The corresponding computational expense is virtually the same as a typical VBR encoder. With this R-Q function, we can optimize the quantization factor for each frame throughout the entire sequence based on the constraints in total storage size and decoder buffer size before the second-pass encoding is executed. This procedure not only guarantees full use of the fixed storage size for the compressed bitstream, but also prevents the decoder buffer from underflowing. Unlike a typical constant bit rate (CBR) decoder, this VBR decoder is capable of preventing the buffer from overflowing by introducing the pausing operation at some designated time. Because the quantization factor optimization is a simple table lookup, the computational requirement is minimized. In the second-pass encoding, the estimated quantization factors for all the frames through the above procedures is used to encode the entire video sequence as a free VBR encoder. Experimental results on real video sequences show that the proposed VBR encoding can provide more consistent visual quality and an improved coding efficiency. The application of the proposed VBR coding scheme includes video streaming over the Internet, digital versatile disk, digital library, and video on demand.

End-to-end modeling and simulation of MPEG-2 transport streams over ATM networks with jitter

The operation of MPEG-2 systems is modeled and simulated when an MPEG-2 transport stream is delivered through an ATM network with jitter. End-to-end packet-based analysis is performed for delivery of MPEG-2 transport streams over ATM networks. A novel approach to analyzing the decoder buffer behaviour in the presence of network jitter is presented. The probability density function of the interarrival time of the ATM adaptation layer 5 (AAL5) protocol data unit (PDU) is derived from an MPEG-2 video source model and an ATM network jitter model. Based on a real-time decoding requirement of the MPEG-2 transport stream (TS) system target decoder (T-STD), the decoder buffer behaviour is simulated. In this simulation, the packets' arrivals follow the derived probability density function of the AAL5 PDU interarrival time. The modeling and simulation results show the interactions among packet loss ratio, decoder buffer size, and network jitter level. We found that jitter affects decoder buffer size and packet loss ratio in a significant way.

Jitter smoothing and traffic modeling for MPEG-2 video transport over ATM networks

In this article, we study how to deal with jitter when a variable-bit-rate (VBR) MPEG-2 video is delivered through asynchronous transfer mode (ATM) networks. First, the MPEG-2 system and its timing model are reviewed and difficulties introduced by ATM cell delay jitter are elucidated. Second, approaches to smoothing network jitter for both constant-bit-rate and VBR traffic are reviewed. A novel approach to modeling the end-to-end MPEG-2 packet generation and arrival process in the presence of network jitter is next presented. Based on this model, the buffer behavior of the MPEG-2 transport stream system target decoder is simulated. Simulation results show that jitter significantly affects the required decoder buffer size and packet loss ratio. © 1998 John Wiley & Sons, Inc. Int J Imaging Syst Technol, 9, 332–339, 1998

Optimal trellis-based buffered compression and fast approximations

The authors formalize the description of the buffer-constrained adaptive quantization problem. For a given set of admissible quantizers used to code a discrete nonstationary signal sequence in a buffer-constrained environment, they formulate the optimal solution. They also develop slightly suboptimal but much faster approximations. These solutions are valid for any globally minimum distortion criterion, which is additive over the individual elements of the sequence. As a first step, they define the problem as one of constrained, discrete optimization and establish its equivalence to some of the problems studied in the field of integer programming. Forward dynamic programming using the Viterbi algorithm is shown to provide a way of computing the optimal solution. Then, they provide a heuristic algorithm based on Lagrangian optimization using an operational rate-distortion framework that, with computing complexity reduced by an order of magnitude, approaches the optimally achievable performance. The algorithms can serve as a benchmark for assessing the performance of buffer control strategies and are useful for applications such as multimedia workstation displays, video encoding for CD-ROMs, and buffered JPEG coding environments, where processing delay is not a concern but decoding buffer size has to be minimized.