DC Offset Error Research Articles

DC Offset Error Compensation of Current Sensor for Single-phase Permanent Magnet Synchronous Motor Drives

DC Offset Error Compensation of Current Sensor for Single-phase Permanent Magnet Synchronous Motor Drives

Current Measurement Offset Error Compensation for IFOC Induction Motor Drives

In vector control, the accuracy of the current measurement is crucial for ensuring good control performance. However, current measurement offset error is caused by various reasons in the current sensors, the op-amplifiers, and the A/D conversion circuits, such as thermal drift and nonlinearity. The measurement offset error results in undesired current ripples, which deteriorates the speed and torque control performance of the vector-controlled drive systems. This paper proposes the PI-type observer-based current offset error compensation method for the induction motor (IM). The proposed PI-type observer can estimate the DC offset error during the motor operation, which is designed in the stationary reference frame. This study analyzes the effect of the parameter mismatch and confirms the robustness of the parameter mismatch. Simulation and experimental results are provided to verify the performance of the current measurement offset error compensation method.

A Bidirectional Onboard Charger With Multistep Constant Current Charging Capability

This article realizes a bidirectional onboard charger (OBC) for light electric vehicles (LEVs), with multistep-constant-current (MSCC) charging capability. In this MSCC charging operation, the battery current is reduced during the peak-load hours and resumes the rated charging operation amid the off-peak load hours. Since this MSCC operation is a wide load range operation, the controllers of the front-end converter (FEC) and back-end converter are modified. In this context, a Hermite polynomial-derived functional link neural network (H-FLNN)-based deadbeat predictive current controller (DPCC) is introduced to improve the performance of the FEC of the OBC. Moreover, the HFLNN-based DPCC for the FEC regulates the grid current quality during MSCC and distinct operating conditions such as grid voltage sag and swell, distorted grid voltage, and the presence of dc offset error in the measured grid voltage. A laboratory prototype of a 1.1-kW rating is developed to verify the efficacy of the H-FLNN DPCC to keep the grid current power quality (PQ) within the International Electrotechnical Commission (IEC)-61000-3-2 standard throughout the operation. Moreover, the effectiveness of the design is verified amid the grid voltage sag and swell and distinct operating conditions. The experimental analysis depicts that the rated efficiency of the developed laboratory prototype is 90.18% and the analytical power density is 64.16 W/in3. Furthermore, the vehicle to grid (V2G) operation validates the satisfactory design of OBC for bidirectional operation. At last, the comparison of the presented system with existing systems is given to summarize the advantages of the presented system over the existing systems.

Discrete Multiple Second-Order Generalized Integrator With Low-Pass Filters and Frequency-Locked Loop for DC Rejection

The multiple second-order generalized integrator (MSOGI), which is composed of parallel second-order generalized integrators (SOGI), is widely used in grid synchronization and signal extraction, and it usually suffers from dc offset issue. In continuous domain, low-pass filter (LPF) can be added to SOGI to eliminate the dc offset in its quadrature channel. However, in digital implementation, directly discretized LPF-based methods may not be able to eliminate dc offset and ac discretization error simultaneously, where the steady-state error will also be introduced by the conventional frequency-locked loop (FLL). In this article, a modified impulse invariant method is adopted to discretize SOGIs, which presents zero ac errors and good dynamics, but shows dc offset in both output channels. Then, an LPF is introduced to eliminate the dc offset of the discrete SOGI, forming a discrete SOGI-LPF. And, a discrete MSOGI-LPF (DMSOGI-LPF) is formed by paralleling multiple DSOGI-LPFs, which can extract different frequency components. Furthermore, a discrete FLL is proposed to estimate the frequency of the input signal, which suppresses the influence of the dc offset and achieves good dynamics. Finally, the stability analysis of the proposed method based on discrete linear-time periodic (LTP) model is provided. The effectiveness of the proposed method and its discrete LTP model are validated through experimental results.

Improved Sensorless Control Method and Asymmetric Phase Resistances Determination for Permanent Magnet Synchronous Machines

This article proposes an improved sensorless control method for permanent magnet synchronous machines under phase resistance asymmetry. The proposed method acquires positive sequence current and voltage signals by applying a sequence component extractor and a double synchronous reference frame current control strategy. These signals can, then, be applied to improve the extended electromotive force based sensorless observer to eliminate the undesired second-order fluctuation in position and speed estimation due to asymmetric phase resistances. In addition, the resistance deviations, which may be due to asymmetric resistances and temperature variation, could introduce dc offset error in rotor position estimation. Therefore, a model reference adaptive system based resistance estimation is employed to compensate for inaccuracy of resistances. Moreover, from the information contained in the negative sequence voltages, the specific values of all asymmetric phase resistances can be estimated as well. Experimental and simulation results are provided to validate the proposed method.

ℓp-Norm Proportionate Based Approach With Mode Transition Between Grid Interactive and Standalone of Solar-BES Three Phase Four Wire Microgrid

This article presents an autonomous 3-phase 4-wire solar photovoltaic (PV) battery energy storage based microgrid controlled through ℓp-norm proportionate-normalized least mean square (LP-PNLMS) current control and mode transition approach. The reliability of the supply across household nonlinear load is enhanced through smooth transfer from grid interactive mode to standalone mode and vice-versa. The solar PV array is equipped with the power optimizer for improved utilization. The LP-PNLMS control is tuned to mitigate the dc offset error, harmonics current, neutral current, and to supply mixed (single and three phase) loads on a 3-phase 4-wire microgrid. The ℓp-norm factor optimizes the step size to improve the convergence time and to minimize the steady-state error in the extracted signal of load current. The islanding/synchronization is detected as per the IEEE 1547–2018 revised standard by estimating the rate of change of positive sequence grid voltages, rate of change of frequency, and rate of change of error between the phase angles. These parameters are estimated by utilizing an improved phase locked loop at adverse grid scenarios. The microgrid is modeled in MATLAB and its behavior is analyzed under various operating scenarios, e.g., outage/restoration of grid power, varying nonlinear load, and outage of solar power.

A Type-3 Modified SOGI-PLL With Grid Disturbance Rejection Capability for Single-Phase Grid-Tied Converters

This article presents a type-3 second-order generalized integrator phase-locked loop (SOGI-PLL) algorithm for single-phase system. Disturbances, such as dc offset and harmonics, are present in the practical grid voltages, due to occurrence of faults, sensors, and analog-to-digital converters. The type-3 SOGI-PLL exhibits fast dynamic performance with gain and phase-lead compensation. However, the general type-3 SOGI-PLL introduces fundamental frequency oscillations in the estimated quantities at the output, when grid voltage contains disturbances. The incorporation of filters for suppression of frequency oscillations, due to dc offset, reduces the bandwidth of PLL, which affects the dynamic response of PLL by introducing phase delay. Thus, a modified notch-filter SOGI (MNF-SOGI) based type-3 SOGI-PLL is proposed with frequency adaptive control to eliminate the phase error, without affecting the dynamic performance. A detailed analysis is presented on the effect of dc offset and scaling error. To enhance dynamic response, filtering, and stability designed guideline based on settling time is also discussed. The proposed type-3 MNF-SOGI-PLL has better grid parameter estimation and fast response with inherent dc offset rejection capability. The effectiveness of the proposed type-3 MNF-SOGI-PLL is evaluated under various grid disturbance conditions and experimentally verified.

Sparse quaternion‐valued minimization based technique with pre‐predictive PV control loop of distributed PV power generation system

This paper presents a sparse quaternion-valued minimization (SQVM) based control technique of a two-stage grid supportive photovoltaic (PV) power system with power conditioning capabilities. The grid side converter (GSC) is controlled by utilizing an SQVM control technique. The proposed algorithm enables the GSC to mitigate the load harmonics current and provides reactive power compensation at the point of common coupling (PCC). The proposed control is tuned to mitigate the DC offset error, harmonics current and to improve the frequency response of the proposed system. A DC link pre-predictive is incorporated to improve the dynamic response by reducing the burden on the outer Proportional-Integral (PI) voltage controller loop. Further, it is used to extract the fundamental component of load currents for generating the reference currents. An adjustable DC link voltage loop is incorporated in the proposed control technique to adapt the PCC voltage variation, which helps in minimizing the losses of the PV system. For real-time execution of the adjustable DC link voltage concept, the DC link voltage is adapted with a variation in the PCC voltage. The operation and control of the system topology are validated experimentally under various scenarios.

Fault-Diagnosis and Virtual Flux-Based Tolerant Control for Grid Connected PV System

This article presents easy and robust Measurement Fault Detection and Isolation (MFDI) and Fault Tolerant Control (FTC) technique against grid voltage measurement failure, where scaling and dc-offset errors are considered. The proposed MFDI method is based on grid voltages orientation, which enables to generate two residuals. It does not require an extra hardware and is insensitive to system parameters variation; therefore, the model knowledge is not necessary. FTC technique is applied to overcome the fault. It is focused on Virtual Flux using Second-Order Generalized Integrator with a Frequency Locked-Loop. The estimated quantity is injected into the system control instead of the erroneous measurement. Simulation results prove the effectiveness of the proposed MFDI and FTC methods against different magnitude and type of grid sensor faults, and well identify the occurrence fault in each phase. In addition, it is characterized by a lower software capacity compared with model-based methods. An experimental platform was used to validate the obtained results and to show the reliability of the proposed techniques.

Offset-free DC-coupled analog frontend circuit for high-dynamic-range signals

The analog frontend (AFE) coupling circuit is a crucial processing element for data acquisition systems based on analog-to-digital converters (ADCs). Currently, high-speed and high-resolution ADCs are predominantly designed with differential input stages. Conventional high-speed ADC drivers are mainly AC-coupled by employing transformers (Baluns) or fully differential amplifiers (FDAs) with blocking capacitors. However, the results of this study indicate that a certain degree of DC offset error exists and manifests itself as the baseline error in the presence of power dividers connecting several DC-coupled channels that implement high-dynamic-range (HDR) signal conditioning. The study involves a theoretical analysis and explanation of the baseline offset error. The offset error can potentially lead to unexpected out-of-range issues for sampling devices, including high-speed ADCs and switched capacitor array ASICs. High-performance FDAs are adopted, and an offset-free DC-coupled AFE circuit is proposed to address the aforementioned issue using two-stage amplification and a resistive attenuator. The proposed methodology is verified via circuit simulations and hardware design. Thus, the baseline offset problem can be accurately solved using the proposed circuit by minimizing the neglectable error. The proposed circuit facilitates improvements in the high-precision measurement of HDR signals in many nuclear physics experiments and some applications in the DC-coupling scheme with FDAs involving resistive power dividers.

A Novel Offset and Finite-Gain Compensated Switched-Capacitor Amplifier with Input Correlated Level Shifting

A novel offset and finite-gain compensated differential switched-capacitor(SC) amplifier is presented. Incorporating the correlated double sampling (CDS) technique and input correlated level shifting (CLS) technique together, the DC offset and DC gain error of SC amplifier are further reduced by a factor of op-amp DC gain compared with the conventional offset and finite-gain compensated SC amplifier. The effectiveness of the new scheme has been analyzed and verified by extensive simulations. An SC amplifier with the proposed scheme is designed in 130 nm CMOS technology. Simulated results show that with an op-amp having a low DC gain of 30 dB and an input offset of 10 mV, the proposed SC amplifier achieves an output offset and DC-gain error of 154 µV and 0.05%, respectively, which are significantly improved compared with 1.155 mV and 0.42% achieved in the conventional SC amplifier.

Total error compensation of non-ideal signal parameters for Moiré encoders

Non-ideal encoder signal parameters generally include amplitude imbalance error, quadrature phase error, dc-offset error and harmonic distortion. These non-ideal signal parameters are the main cause of nonlinear interpolation errors for Moiré encoders. In this paper, a total error compensation strategy for correcting these non-ideal signal parameters is presented. The compensation strategy consists of a passive compensation stage and an active compensation stage, which are realized through hardware and software means, respectively. In the passive compensation stage, an optimized scanning grating with specified micro-pattern is employed to suppress the harmonic distortion. In the active compensation stage, an adaptive compensation algorithm is proposed to compensate the remained amplitude imbalance error, quadrature phase error and dc-offset error. In the experiment, a Moiré encoder using the optimized scanning grating is developed, and a digital circuit is designed by implementing the adaptive compensation algorithm into a field-programmable gate array (FPGA). The effectiveness of the total error compensation strategy has been validated by experimental results.

Control Strategy to Compensate for Current and Voltage Measurement Errors in Three-Phase PWM Rectifiers

This paper introduces a compensation strategy to deal with both current and voltage measurement errors in the three-phase pulsewidth modulated rectifier system. The dc offset and scaling errors in the voltage and current measurements cause the injection of undesired dc and unbalanced currents into the three-phase input current and subsequently lead to voltage ripple at the dc output voltage. This paper proposes a compensation scheme for current measurement error where the dc offset and scaling errors in the current measurement are estimated from the characteristic of the dc output voltage ripple combining with simple band-pass and low-pass filters. Meanwhile, an advanced current controller designed with a proportional integral plus two resonant controllers tuned at the fundamental grid frequency $({{\omega _s}})$ and $2{\omega _s}$ in the synchronous ( d–q ) reference frame is suggested to reject the impact of the dc offset and scaling errors in the voltage measurement. The proposed compensation method is developed without the need of extra hardware circuit, sensor, or precise information of system parameters so that it can be considered as more cost-effective and robust solution. The effectiveness of the proposed solution is verified by experimental results.

High-Volume Testing and DC Offset Trimming Technique of On-Die Bandgap Voltage Reference for SOCs and Microprocessors

Since the VLSI chips were invented, as predicted by Moore’s law, the performance, the power, and the cost of the VLSI chips have been improved, which brought a significant benefit to the economy. However, some of the analog circuits do not get a full benefit from the scaling, due to the increased device variability with transistors in smaller dimension. Under such circumstance, the calibration and trimming techniques are essential to overcome the sensitivity to the process variation. This paper presents the trimming technique to correct the direct current (dc) offset error of the bandgap voltage reference circuit, which complies with the high-volume manufacturing (HVM) requirements. The proposed trimming method consists of the combination of two different sequences, the coarse and fine trimming. The accuracy of the dc offset trimming is evaluated by the newly invented method that complies with the HVM requirements. With a compact silicon area of only 700 $\mu \text{m}^{2}$ , the dc offset trimming circuit achieved an accuracy of ±5 mV ( $4\sigma$ ) as a result of the coarse and fine trimming operations.

Compensation of DC Offset and Scaling Errors in Voltage and Current Measurements of Three-Phase AC/DC Converters

The dc offset and scaling errors in the voltage and current measurements cause the injection of undesired dc and unbalanced currents into the three-phase input currents and subsequently lead to voltage ripple at the dc output voltage of the ac/dc converter. This paper proposes a compensation scheme for current measurement error where the dc offset and scaling errors in the current measurement are estimated from the voltage ripple characteristics of the dc output voltage ripple combining with simple band-pass and low-pass filters. Meanwhile, the dc offset and scaling errors in the voltage measurement can be rejected by using an advanced current controller developed with a proportional resonant plus a repetitive controller designed in the synchronous ( d–q ) reference frame. The proposed control algorithm is able to effectively reject the impact of both voltage and current measurement error so that the three-phase input currents are regulated to be balanced and sinusoidal with ultralow dc current component. Meanwhile, the dc output voltage is also well regulated to be pure dc with a negligibly small voltage ripple. The proposed compensation method is developed without the need of extra hardware circuit, sensor, or precise information of system parameters so that it can be considered as more cost effective and robust solution. The effectiveness of the proposed solution is verified by experimental results.

Mitigation of DC and Harmonic Currents Generated by Voltage Measurement Errors and Grid Voltage Distortions in Transformerless Grid-Connected Inverters

The dc offset and scaling errors in the voltage measurements cause the injection of undesired dc and harmonic currents into the three-phase output currents of the grid-connected inverter. This study proposes an enhanced current control scheme to eliminate the dc and harmonic currents caused by voltage distortion and voltage measurement error in three-phase grid-connected inverters. The proposed current controller is designed in the synchronous ( d-q ) reference frame and composed of a proportional resonant (PR) controller and a repetitive controller (RC). The role of the RC is to regulate the grid current follow the reference value as well as compensate all $6{\rm{n}}\omega _{{\rm{s}}}$ and $(6{\rm{n}}\pm 2)\omega_{{\rm{s}}}\,(n= 1,\,2,\,3,\ldots)$ harmonic components caused by distorted grid voltage and scaling errors. Meanwhile, the PR controller helps to compensate the dc current generated by dc offset measurement errors to guarantee that the three-phase grid currents are balanced and sinusoidal with extremely low dc component. Since the RC employed in the proposed current controller reduces to time delay by four times compared to the conventional RC, the proposed control system ensures good steady-state performance of the grid current without deteriorating its fast dynamic response. The effectiveness of the suggested solution is verified by various experimental tests.

A Multipurpose PV System Integrated to a Three-Phase Distribution System Using an LWDF-Based Approach

This paper presents a multipurpose photovoltaic (PV) system using a lattice wave digital filter (LWDF)-based control approach. The multipurpose PV system is developed for integrating the active power to the distribution system with variable PV insolation and compensating the nonlinear loads connected at point-of-common coupling. The PV system is multifunctional; therefore, it serves various purposes. It injects the active power of solar PV array to the grid. It mitigates harmonics of loads and provides grid currents balancing. The PV system incorporates a PV array, a boost converter, a voltage-source converter (VSC), a nonlinear load, and a distribution system. The boost converter is utilized for maximum power extraction from PV array using an incremental-conductance-based maximum power point tracking technique. To control the grid-tied VSC, a LWDF-based control approach is proposed. In addition, this approach is able to produce the desired sinusoidal fundamental component of load current to estimate the grid reference currents. The aim is to implement this control as it has many properties like low-pass band sensitivity, good dynamic response, and reduction in a dc-offset noise error. The varieties of experimental results are presented to validate the control of a PV system.

An Improved Control Strategy of Three-Phase PWM Rectifiers Under Input Voltage Distortions and DC-Offset Measurement Errors

This paper proposes an enhanced current control strategy to reject the impact of dc-offset measurement error and the distortion in the supply voltage on the dc output voltage and the input current performance of three-phase pulse-width modulation rectifiers. The proposed current controller designed in the synchronous reference frame is developed with a proportional integral (PI) and two vector PI (VPI) controllers. The PI controller regulates the fundamental current to follow its reference generated from outer dc-link voltage control, meanwhile two VPI controllers tuned at the fundamental grid frequency ( $\omega _{s}$ ) and $6\omega _{s}$ are employed to eliminate the dc and harmonic components in the input current. Compared with the standard resonant controllers, the proposed VPI controller offers some advantages such as simpler and straightforward tuning process for controller gains and more robust control system against control delay time and frequency variations. Thanks to the effectiveness of the VPI controllers, the dc output voltage is controlled at a stable manner without any ac ripple, and the three-phase input currents are controlled to be balanced, sinusoidal, and extremely low dc component despite the presence of the dc-offset measurement error and distorted supply voltage conditions. Various experimental tests are provided to verify the effectiveness of the proposed control algorithm.

Control Strategy to Eliminate Impact of Voltage Measurement Errors on Grid Current Performance of Three-Phase Grid-Connected Inverters

This study proposes an advanced current control strategy for three-phase grid-connected inverters to reject the impact of the dc offsets and scaling errors in the grid voltage measurement on the grid current performance. The proposed current controller designed in the synchronous ( d-q ) reference frame is developed with a proportional integral (PI) plus three vector PI controllers. The PI controller regulates the fundamental current to follow its reference, meanwhile, three vector PI controllers tuned at the fundamental grid frequency ( ${\omega _s}$ ), $2{\omega _s}$ , $6{\omega _s}$ are employed to eliminate the dc, unbalance, harmonic components in the grid current. As a result, the three-phase grid currents are controlled to be balanced, sinusoidal, and extremely low dc component despite the presence of the dc offset and scaling errors in the grid voltage measurement and distorted grid voltage conditions. The main advantage of the proposed control scheme is that it is developed without the need of additional hardware circuit, dc extraction, and harmonic detection scheme so that it can be integrated into the existing grid-connected inverter system without extra cost. The effectiveness of the suggested solution is verified by experimental results under various grid voltage conditions and the grid voltage measurement errors.

High Precision On‐Line Offset Correction for Motor Angle Sensors

SUMMARYIn this paper, an angle detecting system is proposed that calculates the offset correction values for the sine and cosine signals of angle sensors. The offset correction values are calculated not from the offset errors of the sine and cosine signals but from the 1f angle error (the fundamental frequency component of the sine and cosine signals) of the angle signals. Therefore, the system can correct the 1f angle error even when the sine and cosine signals contain the double‐frequency components of the sine and cosine signals, as well as the dc offset errors. Moreover, it is possible to use low‐cost microcomputers with low computing speed, because the offset correction values are dc quantities.