DC-DC Buck Converter Research Articles

Four‐phase interleaved TCM DC‐DC buck converter with matrix inductor in battery charging application

In this paper, a 1-kW DC-DC buck converter with a four-phase interleaved matrix inductor is proposed for battery charging applications. It is well-known that the DC bias on the inductor will cause high core loss as it changes the B–H characteristic. Typically, the transient conduction mode employed in high voltage applications for zero-voltage-switching of devices would cause higher inductor current ripple. The conventional approach to reduce the effect of DC bias and inductor current ripple is employing multi-phases. However, the cost and size of the converter will increase significantly. This paper proposes the matrix inductor which has a small volume and reduces the effect of the DC bias by flux sharing and flux cancellation at the same time, results in low inductor core loss. With the interleaved operations the output current ripple can be lower which is suitable for battery charging application. Besides, the comparison of the synchronous and interleaved operation is presented. A 1-kW prototype is built and the experimental results show that the peak efficiency is 99.1% and 99.2% for synchronous and interleaved control, respectively. Additionally, the output current ripple of the interleaved operation is reduced by 85% in comparison with the synchronous operation.

Photovoltaic array maximum power point tracking via modified perturbation and observation algorithm

One drawback of PVs is their low efficiency. As the PVs have a unique maximum Power Point for a specified irradiation level, there must be an effective method for extracting maximum power from the PV module to raise the efficiency. Conventional Perturbation and Observation (P&O) is a simple algorithm for maximum power point tracking (MPPT) but it suffers from oscillation during steady state conditions and is deviated from the maximum power point during slow and rapid irradiation level change. This paper presents a modified P&O by adding variation in PV current as a third in addition to the voltage and power variation parameters. This new algorithm is capable of eliminating the MPPT deviation. To increase the perturbation speed, a double step is taken as the tracking is deviated from the MPP. The modified P&O algorithm is used to control the duty cycle of DC-DC buck converter. The simulation shows that the modified P&O is faster than the conventional. The power loss due to oscillation before attaining the steady state is less for modified P&O. For slow irradiation level change (ramp up 600 to 1000 and ramp down 1000-800) W/m2, the modified P&O shows less tracking diverge. As the irradiation level changes rapidly from 800 to 200 W/m2, it's shown that the modified algorithm attains the steady state faster than the conventional P&O and the average efficiency increased by 4.34%.

Design of DC-DC Buck Converter for Smartphone Applications Based on FPGA Digital Voltage Controller

This paper presents an enhancement of the output performance of a linear buck converter system for the mobile (smartphone) devices using an adaptive digital Proportional–Integral–Derivative (PID) controller with off-line swarm optimization algorithm. The work focuses on improving the use of using single-input single-output (SISO) digital Field Programmable Gate Array (FPGA)-PID to control the linear buck converter system. The goal of the proposed adaptive SISO-FPGA-PID voltage-tracking controller is to rapidly and precisely identify the optimal voltage control action (optimal on-off duration time) that is used to control the buck converter output voltage level in order to avoid the troubleshooting hardware problem issues on mobile devices. The Particle Swarm Optimization (PSO) algorithms are used to find and tune the three weights of the SISO-FPGA-PID controller. The numerical simulation results and the experimental work using Spartan-3E xc3s500e-4fg320 board with Verilog hardware description language (HDL) show that the proposed controller is more accurate in terms of voltage error and the number of function evolutions are of high reduction. As well as to generate a smooth voltage control response without voltage oscillation in the output by investigating under mobile applications variations such as using Bluetooth, WI-FI, and CPU operating voltage when these results are compared with other controllers.

Simulation and Analysis of Complex Behaviors in a DC-DC Buck Converter

A new study of the Buck converter controlled by a smooth signal -changing the widely used non-smooth ramp signal by a smooth sine signal- operating in continuous conduction mode (CCM) is carried out in this paper, focusing on the analysis of bifurcation diagrams of relevant parameters that govern the system. Unexpectedly and contrary to what one would intuitively contemplate, new phenomena or complex dynamics of the non-smooth nature appear. Mainly border collisions and other non-smooth bifurcations are the main causes of the chaotic attractors and complex behaviors' emergence, even though the signal that controls the system is smooth. More importantly, a cascade of border collision bifurcations was discovered in the Buck converter controlled by a sine waveform, a kind of non-sooth bifurcation only reported in specific type of power inverters

Quadrilateral Current Mode Paralleling of Power MOSFETs for Zero-Voltage Switching

This article proposes a generic zero-voltage switching (ZVS) scheme for parallel power MOSFETs. Uncoupled or inversely coupled differential-mode commutation inductors are added to the midpoints (ac terminals) of parallel MOSFET half-bridges, and a time-delay-based control scheme is applied, generating a circulating current flowing through these commutation inductors. Thus, the inductor currents are reshaped as quadrilaterals, which enable all the parallel transistors to achieve ZVS. The mode of operation of the proposed paralleling technique is entitled quadrilateral current mode (QCM) due to the quadrilateral-shaped commutation inductor currents. The operating principle of the QCM-paralleling technique is detailed mathematically, yielding accurate closed-form analytical expressions for modulation parameters. Finally, simulations and experimental results of a QCM-enabled synchronous buck dc-dc converter are presented to validate the theoretical considerations.

Z-domain modeling of peak current mode control for full-bridge DC-DC buck converters

Traditional local-averaged state-space modeling for peak current mode (PCM) controls fails to explain the subharmonic oscillation phenomenon when the spectrum is higher than half of the switching frequency. To address this problem, this paper presents a small-signal modeling method in the z-domain, and builds a discrete linear model for the current loop of a full-bridge DC-DC converter. This discrete model is converted into a second-order continuous model that is able to represent the system performance with a wider frequency range. A frequency-domain analysis shows that this model can be used to explain the subharmonic oscillations and unstable characteristics. This provides an engineering guideline for the practical design of slope compensation. The effectiveness of the proposed modeling method has been verified by simulation and experimental results with a prototype working in the Buck mode.

Global Practical Stabilization of Discrete-time Switched Affine Systems via Switched Lyapunov Functions and State-dependent Switching Functions

This paper addresses the problem of global practical stabilization of discrete-time switched affine systems via switched Lyapunov functions with the objectives of achieving less conservative stability conditions and less conservative size of the ultimate invariant set of attraction. The main contribution is to propose a state-dependent switching controller synthesis that guarantees simultaneously the invariance and global attractive properties of a convergence set around a desired equilibrium point. This set is constructed by the intersection of a family of ellipsoids associated with each of switched quadratic Lyapunov functions. The global practical stability conditions are proposed as a set of Bilinear Matrix Inequalities (BMIs) for which an optimization problem is established to minimize the size of the ultimate invariant set of attraction. A DC-DC buck converter is considered to illustrate the effectiveness of the proposed stabilization and controller synthesis method.

Monolithic Integrated High Frequency GaN DC-DC Buck Converters with High Power Density Controlled by Current Mode Logic Level Signal

Integration is a key way to improve the switching frequency and power density for a DC-DC converter. A monolithic integrated GaN based DC-DC buck converter is realized by using a gate driver and a half-bridge power stage. The gate driver is composed of three stages (amplitude amplifier stage, level shifting stage and resistive-load amplifier stage) to amplify and modulate the driver control signal, i.e., CML (current mode logic) level of which the swing is from 1.1 to 1.8 V meaning that there is no need for an additional buffer or preamplifier for the control signal. The gate driver can provide sufficient driving capability for the power stage and improve the power density efficiently. The proposed GaN based DC-DC buck converter is implemented in the 0.25 μm depletion mode GaN-on-SiC process with a chip area of 1.7 mm × 1.3 mm, which is capable of operating at high switching frequency up to 200 MHz and possesses high power density up to 1 W/mm2 at 15 V output voltage. To the authors’ knowledge, this is the highest power density for GaN based DC-DC converter at the hundreds of megahertz range.

Design criterion and guidelines for three‐phase asymmetric coupled inductors in interleaving DC/DC converter for VRM in data centres and POL

Multiphase interleaving buck DC/DC converters (BCs) with magnetically coupled inductors (CIs) have been researched to improve the performance of voltage regulator module (VRM) and point-of-load (POL). Commercial three or more phase CIs are asymmetric CIs (ACIs) offering unequal phase self-inductance and unequal coupling between phases. By analysing the steady-state current ripple and transient current response speed of three-phase interleaving BCs with three-phase ACIs, the design criterion and design guidelines for three-phase ACIs are presented to simultaneously improve the steady-state performance and transient performance of three-phase interleaving BC with three-phase ACIs. A three-phase interleaving BC prototype with three-phase ACIs is constructed. The experimental results show that three-phase interleaving BC's steady-state phase current ripple can reduce 45%, and its transient output current response speed can increase 63.9% simultaneously by using three-phase ACIs instead of three-phase discrete inductors, and with a smaller total core volume and higher efficiency. The results of this study can be used to design VRM in data centres and POL with smaller steady-state phase current ripple, faster transient output current response speed, and higher efficiency.

Robust Estimator-Based Dual-Mode Predictive Fault-Tolerant Control for Constrained Linear Parameter Varying Systems

This article presents a novel robust estimator-based dual-mode predictive fault-tolerant control (FTC) design scheme for linear parameter varying systems with state/input constraints. The overall FTC is composed of an unconstrained robust fixed FTC component and a constrained robust predictive FTC component. The former is determined by solving an offline integrated design of generalized unknown input observer and fault compensation control law. It is mainly used to compensate the influence of faults and stabilize the tracking error system. The robust predictive FTC is formulated based on the tightened invariant set constraint and quadratic programming. It is used to guarantee the recursive feasibility of the overall FTC under constraints, so its optimal value should be determined by solving the programming problem in real time. An algorithm is also provided to summarize all the involved steps of offline design and online implementation. Finally, the effectiveness of the proposed results is verified in a practical dc-dc buck converter.

Design and experimental implementation of a new robust observer-based nonlinear controller for DC-DC buck converters

DC-DC buck converters are extensively used in many industrial and end-user applications where significant attention highlights their power-conversion efficiency and robustness to load and source disturbances. This paper considers the problem of DC-DC buck converter control for Maximum Power Point (MPP) and voltage trajectory tracking applications in renewable energy systems. A new nonlinear robust controller is proposed for fast and robust output voltage tracking in the DC bus of the power source. New states are augmented in the design of a novel composite sliding mode controller. Furthermore, a nonlinear state observer is incorporated in the design for current estimation. Parameters of the overall approach are tuned using Particle Swarm Optimization (PSO) algorithm with an objective to ensure a good balance between fast transients, robustness, and dynamic performance in practical implementations. This novel strategy is cost-efficient and accounts for the switched and nonlinear aspects of the problem in addition to disturbances. The stability of the closed-loop system is analyzed and guaranteed through Lyapunov stability theory. The low complexity of the presented controller grants it a remarkable advantage for higher reliability in physical realization. Moreover, comparative simulation tests and experimental results from multiple scenarios show significant trajectory-tracking improvements in terms of faster convergence rate with short transients and effective disturbance rejection performance compared to the optimally tuned Proportional Integral (PI) controller that is widely adopted in industrial applications.

Closed loop control of DC-DC converters using PID and FOPID controllers

Fractional order controllers are nowadays used in various power electronic converters as it is giving superior control performance compared with conventional PID controllers. This paper presents the closed loop control of different DC-DC converters using PID controllers and Fractional Order PID (FOPID) controllers. The closed loop control of the basic converters such as buck, boost, buck-boost converters and dual input single output DC-DC converters were designed, modeled and analyzed using conventional PID controller and FOPID controllers. The performance of the controllers are compared in terms of the different time domain specifications like overshoot, rise time, settling time, etc. and simulated in MATLAB Simulink platform. For all types of the DC-DC converters, FOPID controller gives far better performance compared with conventional PID controllers.

A SAR-ADC-Assisted DC-DC Buck Converter With Fast Transient Recovery

This brief presents a successive-approximation-register (SAR) analog-to-digital converter (ADC) assisted DC-DC buck converter, which operates in discontinuous conduction mode (DCM) and achieves fast load transient recovery characteristics. The power inductor of the buck converter uses the bondwire inductance. During the load transient, the dynamic low-power SAR ADC samples the converter's undershoot/overshoot output voltage and controls the programmable current pump circuit to charge/discharge the output capacitor, thus speeding up and smoothing the load transient response. An additional compensation circuit is also designed to ensure the stability of the voltage mode control loop and the current pump. The chip fabricated in a 65-nm CMOS technology occupies an area of 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The converter, switching at 100 MHz, achieves a peak power efficiency of 81% when V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</sub> = 1.2 V, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT</sub> = 1 V and I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Load</sub> = 50 mA. When the load current steps from 2 mA to 50 mA, the measured undershoot/overshoot voltage is 101/92 mV, and the recovery time is 175/406 ns.

Single-Switching Reachable Operation Points in a DC-DC Buck Converter: An Approximation from Time Optimal Control.

In this paper, we study the time optimal control problem in a DC-DC buck converter in the underdamped oscillatory regime. In particular, we derive analytic expressions for the admissible regions in the state space, satisfying the condition that every point within the region is reachable in optimal time with a single switching action. We then make use of the general result to establish the minimum and maximum variation allowed to the load in two predefined design set-ups that fulfills the time optimal single switching criteria. Finally, we make use of numerical simulations to show the performance of the proposed control under changes in the reference voltage and load resistance.

Advancements in VLSI Technology for Enhanced Signal Processing and Power Management in Electronic Systems

This research investigates the application of Delta-Sigma Modulator controlled switch-mode power supplies to address the challenges associated with conventional PWM-controlled DC-DC Buck Converters. By exploiting the noise-shaping capabilities of Delta-Sigma modulation, in-band tones in the output are mitigated. The study encompasses three phases: initial design and performance evaluation of PWM-controlled converters, transition to Delta-Sigma Modulator control, and refinement of the design to enhance efficiency and noise performance. Notable achievements include reducing inductor values and integrating on-chip capacitors, leading to a peak efficiency of 91% at a 200MHz sampling frequency. Post-layout simulations further validate the superiority of Delta-Sigma Modulator controlled switch-mode power supplies over PWM-controlled counterparts.

Robust Control of Interconnected Power Electronic Converters to Enhance Performance in DC Distribution Systems: A Case of Study

This article presents the design and evaluation of robust controllers, based on linear programming, Kharitonov's theorem and Chebyshev's theorem, in order to enhance the performance of a typical structure of multistage converters present in direct current (dc) systems. In such electric power distribution systems, point-of-load converters act as a constant power load (CPL), which introduces a destabilizing nonlinear effects to their supply bus voltage. The multistage converter system uses a simplified scheme based on a cascaded converter, which is comprised of two dc-dc buck converters in a series connection. The robust controllers evaluated overcome the negative incremental impedance instability problem due to CPL, which causes a high risk of instability in interconnected converters. Thereby, the robust controllers evaluated ensure robust control performance and stability with a minor performance degradation compared to a conventional controller when the cascaded converter system is subjected to parametric uncertainties. The control methodologies evaluated are applied in both dc-dc buck converters. Assessments on the performance of the control methodologies evaluated are conducted. Experimental validations on a 160-W dc-dc cascaded converter system test board are carried out to verify the theoretical claims.

Robust Constrained Predictive Fault-Tolerant Control With Generalized Input Parameterization and Event-Triggered Regulation: Design and Experimental Results

This article proposes some new improvements to the traditional constrained predictive fault-tolerant control (FTC) method by enlarging the maximal fault-tolerant admissible region and reducing the online computational complexity. In general, the generalized parameterization of predictive input and event-triggered predictive regulation are integrated into a framework of fault compensation-based dual-mode tube predictive FTC. This predictive FTC scheme has three notable characteristics: 1) The dual-mode FTC consisting of fixed-mode fault compensation and freely predictive adjustments allows most of the calculations to be predetermined offline, while only a simple optimization problem requires to be solved online; 2) the fault-tolerant ability is enhanced by utilizing generalized parameterization of predictive inputs to enlarge the region of attraction of a faulty system; 3) the real-time computational effort of predictive FTC is further reduced by constructing an event-triggered condition to avoid unnecessary online predictive optimization. A case study of a practical synchronous dc-dc Buck converter is given to validate the effectiveness of the proposed predictive FTC method.

Triple-Mode Switched-Inductor-Capacitor DC-DC Buck Converter with Reusable Flying Capacitor and Bang-Bang Zero-Current Detector for Wide Load Current Range

Although the capacity of a battery with a small form factor is extremely low, demand for long usage time of Internet of Things (IoT) products is increasing. Owing to this limitation of the battery, power management integrated circuits (PMICs) are used for extending the battery usage time with high efficiency. In particular, since IoT devices are mostly in the sleep mode in the idle state, PMICs should achieve high efficiency for ultralight loads in the sleep mode as well as for heavy loads in the active mode. In this paper, an accurate bang-bang zero-current detector (to prevent a reverse inductor current) and a triple-mode switched inductor-capacitor dc-dc buck converter with a reusable flying capacitor are presented; these techniques can maintain high efficiency over a wide load current range. The proposed buck converter was fabricated in a 0.18-μm 1P4M CMOS process. A power conversion efficiency exceeding 85% was achieved in the load range of 100 µA to 300 mA.

Advanced Control Strategies for DC–DC Buck Converters With Parametric Uncertainties via Experimental Evaluation

In this paper, four control strategies for DC-DC buck converters are proposed, compared and analyzed: a single-loop adaptive control strategy (SA), a double-loop adaptive control strategy (DA), a single-loop disturbance observer-based control strategy (SDOB) and a double-loop disturbance observer-based control strategy (DDOB). First, the nominal system without considering the parametric uncertainties of the DC-DC buck converter is built to help develop the SA and DA. The SA is built by adaptive and backstepping control approaches, and the DA is set up by adaptive and sliding mode control approaches. Additionally, a model considering parametric uncertainties is introduced, giving the opportunity to develop the SDOB and DDOB. The SDOB is developed using a designed disturbance observer and backstepping control technique, and the DDOB is synthesized using a designed disturbance observer and sliding mode control method. Finally, the advantages and disadvantages of the four proposed control strategies are compared and analyzed through experiments.

Direct Form Digital Robust RST Control Based on Chebyshev Sphere Optimization Applied in a DC-DC Power Converter

This paper presents a novel direct form to design a digital robust control using RST structure (i.e., name given because of the R, S and T polynomials computed) based on convex optimization such as Chebyshev sphere; this approach was applied to a DC-DC Buck converter. This methodology takes into account parametric uncertainties and a Chebyshev sphere constraint in order to ensure robust performance and stability of the system in the discrete domain. For this purpose, a mathematical model for the DC-DC Buck converter is presented when considering uncertainties in electrical variables, such as load resistance, inductance, capacitance, and source voltage variation, also to obtain the discrete model of the system by using the bilinear transformation. The proposed methodology is compared with two other approaches designed in a discrete domain: the classical pole placement and the robust methodology based on the Kharitonov theorem. Wide-ranging experiments are performed in order to evaluate the behavior of the control methodologies when the system is subject to parametric variations of the load resistance and voltage setpoint variation. The results show that the proposed methodology outperforms the other approaches in 90% of the tests and ensures robust stability and robust performance when the system is subjected to a parametric uncertainties family.