dB Image Rejection Ratio Research Articles

Filter-Less Photonic RF Image-Reject Mixing With Simultaneous Self-Interference Cancellation and Fiber Transmission

A filter-free photonic method to simultaneously realize radio frequency (RF) image-reject mixing, self-interference cancellation (SIC), and fiber transmission for in-band full-duplex (IBFD) radio-over-fiber (RoF) link is reported. The key to achieving multi-functions is the joint manipulation of fiber dispersion-induced intermediate frequency (IF) amplitude and time delay changes, which is implemented by sideband phase-shifted optical carrier suppression (SPS-OCS) modulation and frequency tuning of the optical carrier. Owing to the control of IF amplitude and delay variation introduced by fiber dispersion, simultaneous deep image rejection and SIC over wide bandwidth can be realized after fiber transmission. Since no optical filter is required, the proposed system can work at a lower frequency, featuring a large frequency tuning range. For 25 km single-mode fiber (SMF) transmission, simultaneous 20 dB SIC within 1 GHz bandwidth and 29 dB image rejection ratio (IRR) at 6.6 GHz RF frequency in the C band, 21 dB SIC and 19 dB IRR within 1 GHz bandwidth in the X band, 24 dB SIC within 1 GHz bandwidth and 20 dB IRR at 16 GHz RF frequency in the Ku band are experimentally demonstrated. Furthermore, weak SOI with various modulation formats are well recovered after the cancellation of strong interference and fiber transmission.

Coupling Effects Analysis and Suppression in a Highly Integrated Ka-Band Receiver Front-End MMIC for a Passive Millimeter-Wave Imager System

This paper presents the coupling effects analysis and suppression of a highly integrated receiver front-end MMIC for a passive millimeter-wave imager system. The receiver MMIC consists of a low-noise amplifier, double-balanced image-reject mixer, frequency quadrupler, and analog phase shifter. In order to integrate these devices into a compact single chip without affecting the core performance, coupling problems need to be solved. We analyze the influence of coupling effects on the image rejection ratio, and propose corresponding solutions for three different coupling paths. (1) The coupling in the LO-RF path of the mixer is solved by designing a double-balanced mixer with high isolation characteristics. (2) The coupling between the LO chain and the LNA from space and dielectric is suppressed by optimizing the two main transmission lines spacing and adding isolation vias. (3) The coupling caused by the line crossing is restrained by designing a differential line crossover structure. The design and implementation of the MMIC are based on 0.15 µm GaAs pHEMT process. The receiver chip has 6.1~8.7 dB conversion gain in 32~36 GHz, less than 3.5 dB of noise figure, and more than 35 dB of image rejection ratio. The measurement results show that the receiver MMIC is especially suitable for high-sensitivity passive millimeter-wave imaging systems.

A V-Band Integrated Receiver Front-End Based on 0.15 μm GaAs pHEMT Process for Passive Millimeter-Wave Imaging

The design, analysis, implementation and measurement of an integrated V-band receiver front-end based on 0.15 μm GaAs pHEMT process are presented in this paper. The front-end chip uses the super-heterodyne topology which consists of a low noise amplifier, an image reject mixer, and a multiply-by-four (×4) LO chain. In order to minimize the power consumed by LO chain, an active single-ended mixer is designed which requires extremely low LO power of -5 dBm. Meanwhile, the effect of signal coupling in the integrated chip is analyzed and solutions are proposed. By introducing appropriate filters into the circuit and optimizing the overall layout, the imbalance of in-phase and quadrature signals caused by unwanted coupling can be effectively mitigated, thus enhancing the image rejection of the chip. Probe and module tests are applied to the receiver front-end, and the measurement results reveal that the chip achieves -3 ± 0.7 dB conversion gain, 7 dB noise figure and more than 25 dB image rejection ratio in the RF frequency range of 52-56 GHz. Only one supply voltage of 3 V is required for the chip, and total power consumption is 312 mW. Moreover, with a continuously adjustable phase control of 360° and very broadband IF characteristics, the front-end chip is suitable for passive millimeter-wave imaging applications.

All-Optical In-Phase/Quadrature Microwave Mixer for Antenna Remoting Applications

A new microwave photonic signal processing structure for realising in-phase/quadrature (I/Q) mixing is presented. It is based on a dual-drive Mach Zehnder modulator (DDMZM) and an optical phase modulator inside a Sagnac loop interferometer. Two output IF signals with a quadrature phase difference are obtained by using two photodetectors to detect the upper and lower sidebands of the optical signal at the Sagnac loop output. A quadrature phase difference in the two IF signals is realised by biasing the DDMZM at the quadrature point. This has the advantage of very little quadrature phase errors as a standard modulator bias controller can accurately lock the DDMZM bias point. The optical phase modulator driven by an RF signal can be placed in a remote location for antenna remoting. Theoretical analysis and simulation show using the proposed I/Q mixer for image rejection can overcome the modulation index dependent image rejection ratio problem in the reported I/Q mixers based on a cascaded modulator structure. The Sagnac loop based I/Q mixer is experimentally verified with results show only ±1° quadrature phase error and more than 50 dB image rejection ratio over the operating frequency range of 6 to 20 GHz.

Analysis of Non-Idealities on CMOS Passive Mixers

In the current state of the art, WiFi-alike standards require achieving a high Image Rejection Ratio (IRR) while having low power consumption. Thus, quadrature structures based on passive ring mixers offer an attractive and widely used solution, as they can achieve a high IRR while being a passive block. However, it is not easy for the designer to know when a simple quadrature scheme is enough and when they should aim for a double quadrature structure approach, as the latter can improve the performance at the cost of requiring more area and complexity. This study focuses on the IRR, which crucially depends on the symmetry between the I and Q branches. Non-idealities (component mismatches, parasitics, etc.) will degrade the ideal balance by affecting the mixer and/or following/previous stages. This paper analyses the effect of imbalances, providing the constraints for obtaining a 40 dB IRR in the case of a conversion from a one-hundred-megahertz signal to the five-gigahertz range (upconversion) and vice versa (downconversion) for simple and double quadrature schemes. All simulations were carried out with complete device models from 65 nm standard CMOS technology and also a post-layout Monte Carlo analysis was included for mismatch analysis. The final section includes guidelines to help designers choose the most adequate scheme for each case.

Improvement on the image rejection ratio via phase error equalization and adaptive DC tuning in Hartley receivers: A practical approach

This paper presents a novel tunable method to improve the image rejection ratio in image-reject down-converters. The proposed technique is based on the phase equalization and amplitude error mitigation through proper biasing of mixers. With the aid of the proposed technique, amplitude, and phase imbalances, resulting in unwanted images, were minimized. Therefore, significant improvement in the image rejection ratio was attained without using complex filter banks. Phase equalization is accomplished by introducing a delay line to force the phase error to be zero at the center of the frequency band.A frequency down-converter was designed and built with discrete components for an L-band Hartley receiver, which operates over 950–1450 MHz. Image rejection performance of the proposed technique was shown by simulation and prototype-measurements. It is exhibited that the proposed easy to apply technique provides a considerable improvement in the entire band without disturbing the system. Consequently, an average of 50 dB and a maximum 77 dB image rejection ratio can be obtained in Hartley image rejection and dual-IF receivers without using traditional filters.

A 35‐GHz high image rejection resistive mixer using a tunable resonator and a narrowband bandpass filter

AbstractA 35‐GHz high image rejection resistive mixer (IRM) is implemented using a tunable resonator and a narrowband bandpass filter (BPF). To obtain a high image rejection ratio (IRR) of more than 40 dB, a tunable resonator, which consists of inductive lines and varactors, is integrated inside a mixer. It can not only mitigate the mismatch of the resonating frequency through process variation and the parasitic effect but also be used as a radio frequency input matching circuit. A narrowband BPF based on coupled slow‐wave resonators is inserted before a mixer. The proposed IRM is fabricated by a commercial 0.15 μm gallium arsenide (GaAs) pseudo high electron mobility transistor (pHEMT) monolithic microwave integrated circuit process. The proposed IRM represents 42.2 dB IRR, a conversion loss of 11.6 dB, an input 1‐dB compression point (P−1dB) of more than 8 dBm, and a 35 dB local oscillator‐radio frequency isolation at 35 GHz.

A Compact I/Q Upconversion Chain for a 5G Wireless Transmitter in 65-nm CMOS Technology

A compact in-phase/quadrature (I/Q) upconversion chain with high linearity is presented for an integrated transceiver for 5G mobile communications. The upconverter includes 10–11.5-GHz upconversion chains, a quadrature signal generator (QSG) consisting of the two coupled current-mode logic latches, and inverting amplifiers to provide the rail-to-rail local oscillator (LO) swing with a 25% duty cycle for I/Q mixers which achieved 46.9 dB of image rejection ratio. A cross-coupled pair operating at weak inversion was used at the output of the upconverter and it improved the output of the third-order intercept point (OIP3) by 2.58 dB. The upconverter achieved a transmitter gain of 9.12 dB and an OIP3 of 14.45 dBm. The implemented I/Q upconverter with the QSG consumes 48.7 mW under a 1-V supply, and it occupies only 0.57 mm2 of chip area including pads.

A CMOS RF BeiDou-1 Transceiver for Regional Positioning and Short Message Service Applications

This paper presents a fully integrated CMOS radio-frequency (RF) transceiver for BeiDou-1, a radio determination satellite service system which can provide regional positioning and short message service. The proposed transceiver incorporates a low-IF receiver and a BPSK transmitter to realize a dual-way communication between users and the central control station via satellites. The receiver (RX) RF front-end down-converts the 2491.75 MHz RF signals to a 12.24 MHz IF band with a bandwidth of 8.16 MHz. The complex band-pass filter utilizes passive compensation technique to compensate the phase lag and achieve in-band flatness. The 4.08 Mchip/s baseband signal alternatively selects one of the differential 1615.68 MHz local signals to achieve BPSK modulation for the transmitter (TX). Besides, on-chip low dropout regulators adopt improved power supply rejection ratio techniques by integrating active filtering to obtain stable 1.5 V supply voltages. The transceiver is fabricated in a 130 nm CMOS technology and occupies an area of 5.88 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with electrostatic discharge circuitry and pads included. The RX channel achieves a 106 dB maximum voltage gain with a 65 dB dynamic range, a 4.95 dB noise figure and a 46 dB image rejection ratio. The output power for the TX ranges from -10 dBm to 5 dBm, with a phase error less than 1.5 degree.

A Fully Integrated K-Band Dual Down-Conversion Receiver for Radar Applications in 90 nm CMOS

A fully integrated K-band dual down-conversion receiver for phased array radar applications in 90 nm CMOS is presented. The receiver utilizes the dual down-conversion architecture to achieve superior performance. The integrated 1.15 GHz image-rejection filter (IRF) provides enough wideband (22 MHz) image rejection ratio at 140 MHz offset before the second down-conversion by utilizing the Q-enhancing and frequency staggering techniques to compensate the component loss. The low noise amplifier realizes the single-to-differential-ended conversion at the input with a transformer and achieves good common-mode rejection. The 70 MHz intermediate frequency baseband consists of two cascaded 3rd-order band-pass active RC filters (BPFs) and one automatic gain control (AGC) loop, with the integrator frequency compensation technique to lower down the requirements on the embedded Op-Amps. Two phase-locked loop (PLL) frequency synthesizers are integrated to provide the local oscillation (LO) signals for the down-conversions, where the matching of the charge-pump is improved by adding one extra current compensation branch. The measurements of the prototype show that the receiver converts the targeted mm-wave signal to 70 MHz intermediate frequency while achieving 8.3 dB noise figure (NF), 51-95 dB variable gain range and >45 dB image rejection ratio at 140 MHz offset with >22 MHz signal bandwidth. The receiver draws 74 mA current (excluding 2 PLLs) from the 1.2 V power supplies and occupies a core area of 4.58 × 0.53mm 2 (excluding 2 PLLs).

1.15 GHz image rejection filter with 45 dB image rejection ratio and 8.4 mW DC power in 90 nm CMOS

A 1.15 GHz image rejection filter in 90 nm CMOS is presented. It consists of two band-pass filter stages and one band-stop filter stage, with the Q-enhancing and frequency stagger-tuning techniques to compensate the loss of low quality factor on-chip passive components and maintain enough bandwidth, respectively. The presented filter has been integrated in one K-band dual down-conversion super-heterodyne receiver and achieves 45 dB image rejection ratio at 140 MHz offset with >22 MHz signal bandwidth. The DC power consumption is 8.4 mW.

A new passive compensation structure for Chebyshev complex band‐pass filter design

AbstractA new passive compensation structure for Chebyshev‐I complex band‐pass filter is presented. The proposed method aims to cancel the excess phase lag of the integrators caused by the limited gain‐bandwidth product (GBW) of the amplifier, thus ensuring the in‐band flatness of the magnitude‐frequency response. A fifth‐order Chebyshev‐I active‐RC complex band‐pass filter (CBPF) is implemented in TSMC 0.13 μm CMOS technology with a center frequency of 12.24 MHz and a bandwidth of 9 MHz for low‐IF receivers. The CBPF achieves a 46 dB image rejection ratio, a 0.7 dB ripple in the passband and consumes 14.6 mA current from a 1.5 V power supply.

A 1024-QAM Capable WLAN Receiver with -56.3dB Image Rejection Ratio Using Self-Calibration Technique

A 1024-QAM Capable WLAN Receiver with -56.3dB Image Rejection Ratio Using Self-Calibration Technique

A novel CMOS G $$_{m}$$ m -C complex filter design for multi-mode multi band wireless receiver applications

This paper presents a new approach of $$G_m$$GmC complex filter for multi standard wireless receiver applications. In order to get high IRR with low power consumption a novel architecture of $$G_m$$GmC complex filter has been proposed with the combination of first order left shifting and right shifting notch filters. The filter is designed in 180 nm CMOS technology and it has a power consumption of 580 μW from 1.8 V supply voltage. This novel approach can be used for multiband multi standard wireless receiver applications, because this filter can be tuned to operate in different frequency bands with different centre frequencies like bluetooth, UMTS, WLAN, GPS etc. In this paper the complex filter for bluetooth applications with a bandwidth of 2 MHz has designed and results are compared with the previous filter topology. The proposed filter achieves around 51 dB image rejection ratio at the center frequency of 4 MHz with using just a third order filter. The power consumed by the proposed filter is 52$$\,\%$$% less than the existing topology.

High Performance Millimeter-Wave Image Reject Low-Noise Amplifier Using Inter-stage Tunable Resonators

A Q-band pHEMT image-rejection low-noise amplifier (IR-LNA) is presented using inter-stage tunable resonators. The inter-stage L-C resonators can maximize an image rejection by functioning as inter-stage matching circuits at an operating frequency () and short circuits at an image frequency (). In addition, it also brings more wideband image rejection than conventional notch filters. Moreover, tunable varactors in L-C resonators not only compensate for the mismatch of an image frequency induced by the process variation or model error but can also change the image frequency according to a required RF frequency. The implemented pHEMT IR-LNA shows 54.3 dB maximum image rejection ratio (IRR). By changing the varactor bias, the image frequency shifts from 27 GHz to 37 GHz with over 40 dB IRR, a 19.1 dB to 17.6 dB peak gain, and 3.2 dB to 4.3 dB noise figure. To the best of the authors' knowledge, it shows the highest IRR and of the reported millimeter/quasi-millimeter wave IR-LNAs.

460 μW 32 dB image rejection ratio second‐order active‐RC complex filter with improved power efficient opamp

An ultra-low-power second-order Chebyshev active-RC complex filter for a low-IF ultra-low-power receiver is presented. By utilising a pole-cancellation push-pull buffer with feedforward phase compensation technology, the operational amplifier (opamp) realises superior stability while maintaining high gain bandwidth and ultra-low power consumption. A second-order complex filter with four proposed opamps and an adaptive bias fabricated in standard 180 nm CMOS process consumes only 460 μW at 1.8 V power supply. The measured centre frequency is 3 MHz and bandwidth is 2 MHz, while it achieves 32 dB image rejection ratio at the centre frequency.

A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration

A fully integrated dual-channel reconfigurable GNSS receiver supporting Compass/GPS/GLONASS/Galileo systems is implemented in 65 nm CMOS. The receiver incorporates two independent channels to receive dual-frequency signals simultaneously. GNSS signals located at the 1.2 GHz or 1.6 GHz bands are supported, with their bandwidths programmable among 2.2 MHz, 4.2 MHz, 8 MHz, 10 MHz, and 18 MHz. By implementing a flexible frequency plan with a low/zero-IF architecture and reconfigurable analog baseband circuits, only one frequency synthesizer is required to provide the local oscillator (LO) frequency for two channels, thereby avoiding any LO crosstalk. Analog baseband circuits employ operational amplifiers that are capable of power scaling, in order to minimize power consumption across different operating modes. An I/Q mismatch calibration module placed prior to the complex-IF bandpass filter is implemented to improve the image rejection ratio. The receiver achieves a minimum 1.88 dB noise figure, an average 50 dB image rejection ratio, and a 64 dB dynamic range with 1 dB steps of gain-adjustment, with a total power consumption of 31-44 mW. Finally, experimental verification combining both the receiver and a digital baseband shows a positioning result comparable to commercial chips.

한국우주전파관측망 129 GHz 초전도 믹서 수신기

We have developed superconducting mixer receivers for 129 GHz VLBI observation in Korean VLBI Network (KVN). The developed mixer has a radial waveguide probe with simple transmission line L-C transformer as a tuning circuit to its 5 series-connected junctions, which can have 125 - 165 GHz as the operation radio frequency (RF). For intermediate frequency (IF) signal path a high impedance quarter-wavelength line connects the probe to one end of symmetric RF chokes. The double side band (DSB) receiver noise of the mixer was about 40 K over 4 - 6 GHz IF band, whereas we achieved the uncorrected single side band (SSB) noise temperature of about 70 K and better than 10 dB image rejection ratio in 2SB configuration with 8 - 10 GHz IF band. Insert-type receiver cartridges employing the mixers have been under commission for KVN stations.

A CMOS adaptive RF front-end receiver for wireless applications

Design and implementation of an image-rejection double-quadrature radio frequency front-end receiver based on tunable polyphase filters (PPF) are presented in this article. The front-end consists of two sets of PPFs and a double-quadrature down-converter. The design contains devices that allow process spread and frequency drift control, making it suitable for multi-standard applications. Formal analysis and statistical method leading to the polyphase filter optimal sizing have been dealt with in this article. The effects of parasitic capacitances and component mismatch are also considered and discussed. Steps within CMOS polyphase filter design flow are then provided to guarantee high image rejection ratio (IRR) performance. The front-end receiver exhibits more than 60 dB IRR and good linearity in high-frequency applications.

Analysis of the behaviours of phase and amplitude mismatch compensators to achieve 82.5 dB image rejection ratio

This article presents an experiment to analyse the behaviour of phase and amplitude mismatch compensators in quadrature receivers. The experiment shows that the input signal level and convergence time affect image rejection ratio (IRR) and signal to noise and distortion ration (SNDR). Based on the findings, design guidelines are suggested and an exceptionally high 82.5 dB IRR is demonstrated in a digital low intermediate frequency (low-IF) Weaver receiver constructed using off-the-shelf components, whereas existing mismatch compensation techniques can only achieve 50 to 65 dB IRR.