Data Transfer Operations Research Articles

A novel trusted hardware-based scalable security framework for IoT edge devices

The Internet of Things (IoT) devices are pervasively deployed and embedded into our daily lives. Over several years, the massive assimilation of IoT devices has given rise to smart cities, smart factories, smart farms, etc. While IoTs can collect immense amounts of user and environmental information, the lack of adequate security measures is among the major concerns about information security and privacy. With the ever-increasing presence of IoTs, information flow between IoT devices in a single or multi-layered network is becoming increasingly vulnerable to attacks. Although several software-based solutions have been developed over the years that improve the security of resource-constrained IoT devices, there are limited efforts on hardware-oriented IoT security solutions. This paper proposes a Trusted HArdware-based Scalable Secure Architecture (THASSA) for IoT Edge systems. Leveraging standard cryptographic algorithms, THASSA provides a secure mechanism for data transfer and off-loads cryptography operations to trusted hardware. The modularized THASSA architecture allows devices to be added or removed without user intervention. Also, THASSA could be scaled to multiple subsystems using multiple trusted hardware to form IoT clusters with secure data path(s) for mission-critical applications. An experimental study has verified the correctness and effectiveness of THASSA.

File Packer-Un packer System

The File Packer/ Un packer Application is a software designed to streamline the process of compressing and decompressing files and folders. In the digital age, the need for efficient data storage and transfer is paramount. This Application aims to address this need by providing a versatile and user-friendly tool for packing multiple files and directories into a single compressed archive, as well as extracting them when required. The application features a robust user interface that allows users to select files and folders for packing and specify compression settings. It supports various compression algorithms, such as ZIP, GZIP, and RAR, offering flexibility to accommodate different user preferences and requirements. Additionally, the application provides options for password protection and encryption to enhance data security [1]. In a world where data management and security are of paramount importance, Our File Packer/Unpacker Application aims to simplify and enhance the process of file compression and decompression. This Application offers a versatile and secure solution for individuals and organizations seeking to optimize their data storage and transfer operations. Key Word: File Management, Lempel-Ziv-Welch (LZW), Data security, Data storage, Achive Files

Efficient GPU implementation of the multivariate empirical mode decomposition algorithm

An efficient GPU implementation of the Multivariate Empirical Mode Decomposition (MEMD) method is presented for speeding up the process of decomposing non-stationary multi-channel bioelectric signals into different oscillation modes. Each step of the MEMD algorithm is designed with performance in mind and implemented to remove all unnecessary overheads caused by CPU-GPU communication, data transfer operations and synchronisation. The implementation is validated with synthetic and real EEG signals of different lengths and channels (up to 128 channels) on different GPU cards, and compared to existing serial MEMD implementations. The final implementation achieved between 180x-430x speedup compared to MATLAB and a 10x improvement over the only known existing GPU implementation. The average decomposition error of our implementation is below 1.2 %. Our GPU program is the fastest known GPU implementation of the MEMD algorithm that reduces execution time from hours to seconds and as such makes it possible to perform MEMD time-frequency analysis of high-density EEG (MEG) or similar multi-channel signals in a fraction of time and opens the road towards its practical applicability.

Efficient in-situ workflow planning for geographically distributed heterogeneous environments

In-situ workflows are a particular class of scientific workflows where different components (such as simulation, visualization, machine learning, and data analysis) run concurrently. In an in-situ workflow, data continuously flows between components during the whole workflow lifetime in a pipeline fashion. The overall throughput of an in-situ workflow is limited by the slowest moving part of the workflow: either a time-consuming computation component or an expensive data transfer operation between different components. Given geographically distributed heterogeneous computing environments and an in-situ workflow comprising various component applications, it is challenging to produce optimized deployment plans to decide where to launch each component application and how much computing resources to allocate for each component. In this work, we first formulate and define the in-situ workflow planning problem and then discuss the uniqueness of the problem. We design a heuristic-based solver based on our new “Scheduled-Neighbors-Lookup” (SNL) algorithm, which produces effective deployment plans with much less time, compared with the mathematical-optimization-based solver using CPLEX. Our experiments with both synthetic and real-world workflows show that the SNL algorithm can find optimized solutions whose qualities are comparable to that of the CPLEX optimization method with significantly reduced problem-solving time (e.g., more than 20,000 times faster on average for in-situ workflows with 14 components). Compared with existing methods such as HEFT, R-Storm, and T3 schedulers, the SNL algorithm can generate resource plans with higher throughput, with increased time and resource efficiency.

Accurate and Energy-Efficient Bit-Slicing for RRAM-Based Neural Networks

<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Computation-in-memory</i> (CIM) paradigm leverages emerging memory technologies such as resistive random access memories (RRAMs) to process the data within the memory itself. This alleviates the memory-processor bottleneck resulting in much higher hardware efficiency compared to von-Neumann architecture-based conventional hardware. Hence, CIM becomes an attractive alternative for applications like neural networks which require a huge number of data transfer operations in conventional hardware. CIM-based neural networks typically employ bit-slicing scheme which represents a single neural weight using multiple RRAM devices (called slices) to meet the high bit-precision demand. However, such neural networks suffer from significant accuracy degradation due to non-zero G <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$_{\min }$</tex-math></inline-formula> error where a zero weight in the neural network is represented by an RRAM device with a non-zero conductance. This paper proposes an unbalanced bit-slicing scheme to mitigate the impact of non-zero G <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$_{\min }$</tex-math></inline-formula> error. It achieves this by allocating appropriate sensing margins for different slices based on their binary positions. It also tunes the sensing margins to meet the demands of either high accuracy or energy-efficiency. The sensing margin allocation is supported by 2’s complement arithmetic which further reduces the influence of non-zero G <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$_{\min }$</tex-math></inline-formula> error. Simulation results show that our proposed scheme achieves up to 7.3× accuracy and up to 7.8× correct operations per unit energy consumption compared to state-of-the-art.

Топологічні аспекти моделювання паралельних обчислень при розв’язанні динамічних задач на базі інтерфейсу передачі повідомлень

The article deals with the development, substantiation and research of analytical models of data transmission when solving complex multidimensional dynamic problems. Models of interprocessor exchange are obtained for computing systems with distributed memory and topological architectures: ring, 2D-torus, hypercube, etc. The application of double arithmetic based on the GMP-library and its effect on the temporal characteristics of parallel applications are considered. The dependence of the parallelism characteristics of numerical algorithms when using the streaming SIMD-extension is analyzed. The modern stage of development of computer and information technologies has one of its directions - the use of the idea of parallelism in order to reduce the time of solving multidimensional problems that have a high temporal complexity or are even NP-complete. Despite the significant increase in the productivity of existing parallel systems, reducing the cost of components for their construction, development and implementation of parallel methods remains the most difficult problem due to the lack of study of the internal structure of algorithms and their properties. Thus, the introduction of parallel computing requires not so much the mastering of parallel data processing as the development of parallel algorithms based on the parallelization of sequential ones or the construction of fundamentally new, more efficient parallel methods. That is why the analysis of existing parallel algorithms, studying the possibilities of improving their characteristics is an important, promising and practically demanded task. The purpose of the work is to increase the efficiency of solving complex multidimensional dynamic problems implemented on parallel architectures of distributed memory using the message passing interface (MPI) due to the reduction of communication time. Tasks of the work: firstly, it is the development of analytical models of multiple data transfer operations for different topologies of connection of processors, substantiation of the models and research of the quality of parallel calculations of various classes of numerical methods for cluster systems. The possibility and effectiveness of using double arithmetic (GMP-library) and its influence on the temporal characteristics of parallel implementation are separately investigated. Additionally, the paper analyzes the dependence of the parallelism characteristics of the methods on the use of Streaming SIMD-Extension (SSE). The scientific novelty of the field lies in the development and development of analytical models for processes of interprocessor exchange given by cluster systems, which allow to increase the efficiency of parallel implementations of numerical methods in rich dynamic tasks for a short period of time on a communication warehouse. The practical significance of the field is in the development of split models for the analysis of the efficiency of collective operations of multiple data transfer within the MPI interface, which is the current standard for software implementation of robots with shared memory. Possibility of arranging floating arithmetic based on the GMP library was added, which is especially important for the development of folding problems of dynamic problems with singularities.

Analysis of Non-Cash Payments in Kazakhstan and Impact on the Development of Entrepreneurship

The purpose of the study is to cashless payments in the Republic of Kazakhstan and their impact on the development of households and entrepreneurship. Improving cashless payments is closely related to the overall development of technology. The speed, convenience, and security of non-cash payments are growing from year to year. Cashless payment is a relevant and convenient form of payment in the life of every citizen, due to its availability for all legal entities and individuals. This trend is widespread and qualitatively increasing. There is also a trend of rapid penetration of non-cash payments into the financial market. This is due to convenience, the developing market of digital services, and payments, as well as the growing competitiveness of banks. The main research methods were general theoretical methods, as well as special economic and mathematical methods. Based on the study of the organization of cashless settlement in the Republic of Kazakhstan and the analysis of the work with the cashless settlement, the following recommendations were made to improve the system of cashless settlement to Kazakhstani enterprises: introduction of Enterprise Resource Planning (ERP) and Customer Relationship Management (CRM) into the economic activities of enterprises; improvement of the electronic money system by creating platforms for seamless operation of data transfer. The practical significance of the study is determined by the fact that the proposals made by the authors on the improvement of the cashless payment system can be used to improve this system.

Declarative Data Flow in a Graph-Based Distributed Memory Runtime System

Runtime systems can significantly reduce the cognitive complexity of scientific applications, narrowing the gap between systems engineering and domain science in HPC. One of the most important angles in this is automating data migration in a cluster. Traditional approaches require the application developer to model communication explicitly, for example through MPI primitives. Celerity, a runtime system for accelerator clusters heavily inspired by the SYCL programming model, instead provides a purely declarative approach focused around access patterns. In addition to eliminating the need for explicit data transfer operations, it provides a basis for efficient and dynamic scheduling at runtime. However, it is currently only suitable for accessing array-like data from runtime-controlled tasks, while real programs often need to interact with opaque data local to each host, such as handles or database connections, and also need a defined way of transporting data into and out of the virtualised buffers of the runtime. In this paper, we introduce a graph-based approach and declarative API for expressing side-effect dependencies between tasks and moving data from the runtime context to the application space.

GPU Acceleration of Large-Scale Full-Frequency GW Calculations.

Many-body perturbation theory is a powerful method to simulate electronic excitations in molecules and materials starting from the output of density functional theory calculations. By implementing the theory efficiently so as to run at scale on the latest leadership high-performance computing systems it is possible to extend the scope of GW calculations. We present a GPU acceleration study of the full-frequency GW method as implemented in the WEST code. Excellent performance is achieved through the use of (i) optimized GPU libraries, e.g., cuFFT and cuBLAS, (ii) a hierarchical parallelization strategy that minimizes CPU-CPU, CPU-GPU, and GPU-GPU data transfer operations, (iii) nonblocking MPI communications that overlap with GPU computations, and (iv) mixed precision in selected portions of the code. A series of performance benchmarks has been carried out on leadership high-performance computing systems, showing a substantial speedup of the GPU-accelerated version of WEST with respect to its CPU version. Good strong and weak scaling is demonstrated using up to 25 920 GPUs. Finally, we showcase the capability of the GPU version of WEST for large-scale, full-frequency GW calculations of realistic systems, e.g., a nanostructure, an interface, and a defect, comprising up to 10 368 valence electrons.

Total ionizing dose effect on 2-D array data transfer ICs designed and fabricated by 0.18 μm CMOS technology

Circuits for CMOS two-dimensional (2-D) array data transfer are indispensable for applications such as space and nuclear fields. Issues include being operated with higher speed, lower power, fewer size penalties, and radiation hardness. To meet these requirements, two kinds of CMOS 2-D array data transfer circuits, such as a shift register type and a memory access type, are proposed and fabricated by the standard 0.18 μm CMOS process technology. In both types, 16 μm pitch, 8 × 128 array data transfer operations were realized with a data rate of more than 1 Gb/s. Furthermore, we conducted 60Co γ-ray irradiation experiments on those circuits. The current consumption ratio of the shift register type to the memory access type ranges from 150 to 200% as the dosage increases. The result indicates that the memory access type has better radiation hardness at 1 Gb/s than that of the shift register type.

Resident autonomous underwater vehicles for persistent mobile ocean observing

Whether near shore or in the open ocean, stationary ocean observing systems lack the ability to respond spatially to transient and difficult-to-predict phenomena, such as mid-ocean ridge eruptions, instabilities in methane hydrate deposits, turbidite flows, sea–ice interactions, mass wasting events, or changes in coastal currents. Detecting and characterizing these types of events and the processes driving them requires mobile systems available at the time of the event onset. Ideally, mobile autonomous underwater vehicles (AUVs) would permanently be stationed in or near areas where events of interest are likely to occur. Traditionally, due to their dependence on batteries, AUV mission durations are often measured in hours and require costly on-water support vessels and human intervention, making it impractical to sustain a mobile observing presence. However, advances in cabled power/comms and renewable marine energy technologies present significant opportunities for developing persistent mobile subsea systems able to recharge their batteries from fixed underwater infrastructure. In addition to power, these “resident” AUVs will require navigation and data transmission support. Acoustic systems will play key roles as sensing systems, navigation, vehicle homing, data transfer, and advanced robotic operations. This talk will present an overview of the systems and concepts relevant to subsea mobile ocean observing systems along with example applications.

Skyrmion ratchet in funnel geometries

Using a particle-based model, we simulate the behavior of a skyrmion under the influence of asymmetric funnel geometries and ac driving at zero temperature. We specifically investigate possibilities for controlling the skyrmion motion by harnessing a ratchet effect. Our results show that as the amplitude of a unidirectional ac drive is increased, the skyrmion can be set into motion along either the easy or hard direction of the funnel depending on the ac driving direction. When the ac drive is parallel to the funnel axis, the skyrmion flows in the easy direction and its average velocity is quantized. In contrast, when the ac drive is perpendicular to the funnel axis, a Magnus-induced ratchet effect occurs, and the skyrmion moves along the hard direction with a constant average velocity. For biharmonic ac driving of equal amplitude along both the parallel and perpendicular directions, we observe a reentrant pinning phase where the skyrmion ratchet vanishes. For asymmetric biharmonic ac drives, the skyrmion exhibits a combination of effects and can move in either the easy or hard direction depending on the configuration of the ac drives. These results indicate that it is possible to achieve controlled skyrmion motion using funnel geometries, and we discuss ways in which this could be harnessed to perform data transfer operations.

RapidXfer - data transfer framework for square kilometre array

Data Management of Astronomy Data is often a laborious task and it is even more challenging for the extraordinary amounts of data expected from the world’s largest radio telescope, Square Kilometre Array. There are overt issues in transferring the voluminous SKA data and the traditional data transfer methods are fragile especially for the data transfer between two continents. To address this, a new data transfer framework RapidXfer is proposed and the data transfer is achieved using two steps: international and local transfers. The efficiency of different end-to-end data transfer tools used in RapidXfer is evaluated on different dataset sizes. Further, a comparative study of two IRIS grid data transfer methods is made to understand each methods’ advantages and disadvantages. This study can be used as a reference for the development of future SKA’s data transfer operations.

Text Encryption Based on Huffman Coding and ElGamal Cryptosystem

Background: Data that are in the form of text, audio, image, and video are used everywhere in our modern scientific world. These data are stored in physical storage, cloud storage and other storage devices. Some of these data are very sensitive and require efficient security while storing as well as in transmitting from the sender to the receiver. Objective: With the increase in data transfer operation, enough space is also required to store these data. Many researchers have been working to develop different encryption schemes, yet there exist many limitations in their works. There is always a need for encryption schemes with smaller cipher data, faster execution time and low computation cost. Methods: A text encryption based on Huffman coding and ElGamal cryptosystem is proposed. Initially, the text data is converted into its corresponding binary bits using Huffman coding. Next, the binary bits are grouped and again converted into large integer values which will be used as the input for the ElGamal cryptosystem. Results: Encryption and Decryption are successfully performed where the data size is reduced using Huffman coding and advance security with the smaller key size is provided by the ElGamal cryptosystem. Conclusion: Simulation results and performance analysis specify that our encryption algorithm is better than the existing algorithms under consideration.

A Low-Cost Multi-Parameter Water Quality Monitoring System.

Multi-parameter water quality monitoring is crucial in resource-limited areas to provide persistent water safety. Conventional water monitoring techniques are time-consuming, require skilled personnel, are not user-friendly and are incompatible with operating on-site. Here, we develop a multi-parameter water quality monitoring system (MWQMS) that includes an array of low-cost, easy-to-use, high-sensitivity electrochemical sensors, as well as custom-designed sensor readout circuitry and smartphone application with wireless connectivity. The system overcomes the need of costly laboratory-based testing methods and the requirement of skilled workers. The proposed MWQMS system can simultaneously monitor pH, free chlorine, and temperature with sensitivities of 57.5 mV/pH, 186 nA/ppm and 16.9 mV/°C, respectively, as well as sensing of BPA with <10 nM limit of detection. The system also provides seamless interconnection between transduction of the sensors’ signal, signal processing, wireless data transfer and smartphone app-based operation. This interconnection was accomplished by fabricating nanomaterial and carbon nanotube-based sensors on a common substrate, integrating these sensors to a readout circuit and transmitting the sensor data to an Android application. The MWQMS system provides a general platform technology where an array of other water monitoring sensors can also be easily integrated and programmed. Such a system can offer tremendous opportunity for a broad range of environmental monitoring applications.

Compiler-directed scratchpad memory data transfer optimization for multithreaded applications on a heterogeneous many-core architecture

The heterogeneous many-core architecture plays an important role in the fields of high-performance computing and scientific computing. It uses accelerator cores with on-chip memories to improve performance and reduce energy consumption. Scratchpad memory (SPM) is a kind of fast on-chip memory with lower energy consumption compared with a hardware cache. However, data transfer between SPM and off-chip memory can be managed only by a programmer or compiler. In this paper, we propose a compiler-directed multithreaded SPM data transfer model (MSDTM) to optimize the process of data transfer in a heterogeneous many-core architecture. We use compile-time analysis to classify data accesses, check dependences and determine the allocation of data transfer operations. We further present the data transfer performance model to derive the optimal granularity of data transfer and select the most profitable data transfer strategy. We implement the proposed MSDTM on the GCC complier and evaluate it on Sunway TaihuLight with selected test cases from benchmarks and scientific computing applications. The experimental result shows that the proposed MSDTM improves the application execution time by 5.49times and achieves an energy saving of 5.16times on average.

Detection of compromising radiation from modern data transfer interfaces using the example of high definition multimedia interface

Recently the technical channel of information leakage from electromagnetic emanation more and more interesting for specialists in the field of information security. At the same time, new versions of data transfer interfaces are being developed, that quickly distribute around the world. The use methods to detecting informative frequencies are based on the principles of operation of old data transfer interfaces, consider only the harmonics of the signal, excluding information about its type and interfaces that transmit information to. Accordingly, these methods to detecting informative frequencies of modern data transfer interfaces, such as high definition multimedia interface, do not reflect the completeness and may contain errors, which negatively affects the measurement stage. The article suggests a method to detecting informative signals of compromising emanation from modern data transmission interfaces, such as high definition multimedia interface, using an anechoic chamber, special test program and control program for measuring equipment. The proposed method will be useful both for educational purposes and for beginners in the field of technical information security.

Fast File Transfers from IoT Devices by Using Multiple Interfaces.

The Internet-of-Things (IoT) is a modern technological revolution that enables communication amongst a plethora of different devices. To date, about 30 billion devices have been connected to the internet and more than 75 billion devices are probably to be connected worldwide by 2025. These can range from small sensors and actuators to larger devices such as smartphones, drones or even buildings and interconnected cars. Devices are often mobile and battery powered thus their communication requires fast and energy efficient solutions. To this end, this paper studies the use of multi-interface communication for fast and energy efficient communication. In particular, we consider the basic operation of data transfer between smartphones in the form of files. This task can be performed for backup purposes, and hence it represents a useful and frequent operation that users perform. Our aim is to provide a new and easy means that optimises file transfers with respect to time and energy consumption. In particular, as smartphones are endowed with various connecting interfaces like Bluetooth, WiFi and 4G, we conduct experimental studies by varying different parameters in order to understand the best setting, including which interface is more appropriate to accomplish file transfer. To this respect, we also implemented an innovative and light app that allows the use of two or more interfaces concurrently. The experimental results show how the coupling of some interfaces might be effective in terms of time, while consuming a negligible amount of energy. Actually, such results become more and more interesting as the size of the file to be transferred grows. The best combination experienced is by making use of WiFi at 5 GHz concurrently with 4G, whereas WiFi at 2.4 GHz caused interference complications.

Reconfigurable hardware implementation of coherent averaging technique for ultrasonic NDT instruments

The paper proposed a novel hardware (FPGA) implementation of the coherent averaging architecture for the reconfigurable ultrasonic NDT system. The proposed hardware architecture uses the addressing based shifting technique for the addition operation and Radix-2 non-restoring algorithm for the division operation. Since the amount of hardware required by the proposed averaging scheme is independent of the number of averages, it supports on-the-fly control on the number of averages. Compared to conventional architecture, it provides 96% reduction in memory storage, 98% reduction in the number of adders, and 32% reduction in the processing time for the case of 64 coherent averages. For the experimentation, the ultrasonic imaging system designed and developed by the authors has been utilized. The developed system further supports dynamic on-line reconfiguration of the analog front-end hardware, real-time data acquisition, real-time hardware based data processing, and data transfer operations. The performance of implemented coherent averaging has been presented by various applications such as removal of RF random false-echoes, smoothing of A-scan waveforms and speckle removal of B-scan images.

NoM: Network-on-Memory for Inter-Bank Data Transfer in Highly-Banked Memories

Data copy is a widely-used memory operation in many programs and operating system services. In conventional computers, data copy is often carried out by two separate read and write transactions that pass data back and forth between the DRAM chip and the processor chip. Some prior mechanisms propose to avoid this unnecessary data movement by using the shared internal bus in the DRAM chip to directly copy data within the DRAM chip (e.g., between two DRAM banks). While these methods exhibit superior performance compared to conventional techniques, data copy across different DRAM banks is still greatly slower than data copy within the same DRAM bank. Hence, these techniques have limited benefit for the emerging 3D-stacked memories (e.g., HMC and HBM) that contain hundreds of DRAM banks across multiple memory controllers. In this paper, we present Network-on-Memory (NoM), a lightweight inter-bank data communication scheme that enables direct data copy across both memory banks of a 3D-stacked memory. NoM adopts a TDM-based circuit-switching design, where circuit setup is done by the memory controller. Compared to state-of-the-art approaches, NoM enables both fast data copy between multiple DRAM banks and concurrent data transfer operations. Our evaluation shows that NoM improves the performance of data-intensive workloads by 3.8X and 75%, on average, compared to the baseline conventional 3D-stacked DRAM architecture and state-of-the-art techniques, respectively.