This letter presents a low-power current-reuse and device-reuse low noise amplifier (LNA) for sub-GHz wideband applications. Based on the shunt-feedback common-gate (SFBCG) hybrid topology and the proposed current/device-reuse shunt-feedback (SFB) technique, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$g_{m}$ </tex-math></inline-formula> restriction is alleviated. Moreover, the degree of design freedom is added by coupling the output to the gate of the in-phase current source transistor to activate positive feedback without extra power burden, thereby achieving a higher gain and lower noise design. Implemented in 90-nm CMOS technology, this LNA prototype has an active area of 0.075 mm2. The measurement results show a peak gain of 21.3 dB with 3-dB bandwidth of 50–800 MHz, noise figure of 4.5 dB, third-order intercept point (IIP3) of −7.1 dBm, and power dissipation of 1.2 mW.