Current Mirror Operational Transconductance Amplifier Research Articles

A novel gain boost and slew rate enhanced CMOTA

Abstract The design of a novel current mirror operational transconductance amplifier is proposed to address the issues of low gain and limited swing rate under conditions of low voltage and power consumption. In order to improve the gain and swing rate of the amplifier, the increase and lift technology and swing rate increase technology are introduced to the traditional op-amp Simulation and verification based on 0.18 μm BCD process and candence. The results show that under 10 pF load capacitance, the gain is increased by 42 dB and the swing rate is increased by 130 times compared with the conventional transconductance op amp.

An Area- and Energy-Efficient 16-Channel, AC-Coupled Neural Recording Analog Frontend for High-Density Multichannel Neural Recordings

We present an AC-coupled modular 16-channel analog frontend with 1.774 fJ/c-s∙mm2 energy- and area-product for a multichannel recording of broadband neural signals including local field potentials (LFPs) and extracellular action potentials (EAPs). To achieve such a small area- and energy-product, we employed an operational transconductance amplifier (OTA) with local positive feedback, instead of a widely-used folded cascode OTA (FC-OTA) or current mirror OTA for conventional neural recordings, while optimizing the design parameters affecting performance, power, and area trade-offs. In addition, a second pole was strategically introduced in the LNA to reduce the noise bandwidth without an in-channel low-pass filter. Compared to conventional works, the presented method shows better performance in terms of noise, power, and area usages. The performance of the fabricated 16-channel analog frontend is fully characterized in a benchtop and an in vitro setup. The 16-channel frontend embraces LFPs and EAPs with 4.27 μVrms input referred noise (0.5–10 kHz) and 53.17 dB dynamic range, consuming 3.44 μW and 0.012 mm2 per channel. The channel figure of merit (FoM) of the prototype is 147.87 fJ/c-s and the energy-area FoM (E-A FoM) is 1.774 fJ/c-s∙mm2.

Low-voltage low-noise gate driven quasi-floating bulk self-cascode current mirror operational transconductance amplifier.

A gate driven quasi-floating bulk self-cascode current mirror operational transconductance amplifier operable at ±0.9 V supply voltage with DC gain (70 dB), gain bandwidth (250 kHz), noise (2.8 µV/√Hz at 1 Hz), and power consumption (2.96 µW) simulated in 0.18 µm technology has been introduced. Results obtained are superior in comparison to gate driven self-cascode current mirror and regular current mirror OTAs, which can be utilized to improve the performance of analog-mixed signal circuits and systems.

Subthreshold biased enhanced bulk-driven double recycling current mirror OTA

This paper presents a single-stage bulk-driven double recycling low-voltage low-power operational transconductance amplifier (OTA) operating in subthreshold region. The proposed OTA utilizes double recycling topology and provides enough open loop voltage gain, slew rate, and unity gain frequency (UGF). The flipped voltage follower-based adaptively biased input differential pair working in class AB mode has ensured dynamic current boosting and increased slew rate. Further, the proposed OTA has utilized partial positive feedback to mitigate some of the performance reduction caused by the bulk-driven topology. The simulation results of the proposed OTA have ensured open loop gain of 79.5 dB, UGF of 37.1 kHz, and phase margin of 64°. It operates with dual power supply of ± 0.25 V and consumes low power of 60 nW. These performance parameters validate its usefulness for LV, LP and low-frequency applications. The process, voltage, and temperature variation effects on low-frequency voltage gain, UGF, and phase margin of the proposed OTA has also been investigated with process corner simulations. The proposed OTA is designed and simulated in UMC 180 nm standard n-tub bulk CMOS process technology utilizing Tanner EDA tools.

Design and analysis of current mirror OTA in 45 nm and 90 nm CMOS technology for bio-medical application

This paper proposed a design and performance analysis of current mirror operational transconductance amplifier (OTA) in 45 nm and 90 nm complementary metal oxide semiconductor (CMOS) technology for bio-medical application. Both OTAs were designed and simulated using Synopsys tools and the simulation results were analysed thoroughly. The OTAs were designed to be implemented in bio-potential signals detection system where the input signals were amplified and filtered according to the specifications. From the comparative analysis of both OTAs, the 45 nm OTA managed to produce open loop gain of 45 dB, with common mode rejection ratio (CMRR) of 93.2 dB. The 45 nm OTA produced only 1.113 μV√Hz of input referred noise at 1 Hz. The 45 nm OTA also consumed only 28.21 nW of power from ± 0.5 V supply. The low-power consumption aspect displayed by 45 nm OTA made it suitable to be implemented in bio-medical application such as bio-potential signals detection system where it can be used to amplify and filter the electrocardiogram (ECG) signals.

CCII+ Cell Based Instrumentation Amplifier Using BD-CM Gain Enhanced OTA

This paper presents the design of an instrumentation amplifier (IA) using second generation positive current conveyor which uses gain enhanced, bulk-driven, balanced current mirror, operational transconductance amplifier (OTA) cascaded with two CMOS inverters. First of all, a CMOS, bulk-driven current mirror OTA is designed and simulated in 180nm technology. For its performance enhancement, besides the current mirror topology, this OTA utilized the current starving technique which apply partial positive feedback (PPF) in active load side of OTA. Secondly, the conversion of this bulk-driven OTA into CCII plus cell is performed using inverters to yield its X and Z nodes. Finally, this CCII plus cell is used to design the IA. The gain of IA in differential input and single ended output configuration can be varied in the range of 10dB to 75dB. The various performance parameters of IA are simulated using Tanner EDA tool of 16.1 version in standard n-tub 180nm CMOS process technology node.

A High Slew-Rate Adaptive Biasing Hybrid Envelope Tracking Supply Modulator for LTE Applications

A linear-switch mode hybrid envelope tracking (ET) supply modulator utilizing adaptive biasing and gain enhanced current mirror operational transconductance amplifier (OTA) with class AB output stage in parallel with a switching regulator is presented. In comparison to a conventional OTA design with similar quiescent current consumption, proposed approach improves positive and negative slew rate from 50 to 93.4 V/ $\mu \text{s}$ and −87 to −152.5 V/ $\mu \text{s}$ , respectively, dc gain from 45 to 67 dB while consuming same amount of quiescent current. The proposed hybrid supply modulator achieves 83% peak efficiency, power-added efficiency (PAE) of 42.3% at 26.2 dBm for a 10-MHz 7.24-dB peak-to-average power ratio (PAPR) long-term evolution (LTE) signal and improves PAE by 8% at 6 dB back off from 26.2-dBm power amplifier (PA) output power with respect to fixed supply. With a 10-MHz 7.24-dB PAPR quadrature-phase shift keying LTE signal the ET PA system achieves adjacent channel leakage ratio (ACLR) of −37.7 dBc and error vector magnitude (EVM) of 4.5% at 26.2-dBm PA output power, while with a 10-MHz 8.15-dB PAPR 64QAM LTE signal the ET PA system achieves ACLR of −35.6 dBc and EVM of 6% at 26-dBm PA output power without digital predistortion. The proposed supply modulator core circuit occupies 1.1-mm2 die area, and is fabricated in a 0.18- $\mu \text{m}$ CMOS technology.

A two-stage rail-to-rail current mirror OTA for ultra-low-power applications

ABSTRACTIn this letter, an ultra-low-power, ultra-low-voltage operational transconductance amplifier (OTA) with full rail-to-rail input/output swing is presented. The proposed two-stage OTA is based on the bulk-driven current mirror (CM) amplifier topology with Gm-C frequency compensation technique. In addition, a transconductance boosting technique is used to enhance performance of the CM input stage structure. Simulation results in 0.18-μm metal-oxide semiconductor technology show the proposed OTA achieves a 85.8-dB DC gain and a gain bandwidth of 21.9 kHz while driving a 15-pF load. The amplifier consumes 292 nW @ 0.5 V, which makes it suitable for low-power applications.

Low Power Operational Transconductance Amplifier (OTA) with Enhanced DC Gain and Slew-Rate

This paper presents a low-voltage differential operational transconductance amplifier (OTA) with enhanced DC gain and slew-rate. Based on the current mirror OTA topology, the optimization techniques are discussed in this work. The proposed structure achieves enhanced DC gain, unit gain frequency (UGF) and slew-rate (SR) with adding four devices. The design of the OTA is described with theory analysis. The OTA operates at the power supply of 1.8V. Simulation results for 0.18μm standard CMOS technology show that the DC gain increases from 60.6dB to 65dB, the UGF is optimized from 2.5MHz to 4.3MHz, the SR is enhanced from 0.88 V/μs to 4.8 V/μs with close power consumption dramatically.

A 20 μW 95 dB dynamic range 4th-order Delta-Sigma modulator with novel power efficient operational transconductance amplifier and resonator

A low power high performance Delta-Sigma modulator for portable measurement applications is presented. To reduce power consumption while maintaining high performance, a fully feedforward architecture with a comprehensive system-level design is implemented. As a key building block, a novel power efficient current mirror operational transconductance amplifier (OTA) with a fast-settling less-error switched-capacitor common-mode feedback (SC CMFB) circuit is introduced, and the effects of both gain nonlinearity and 1/f noise of OTA are discussed. A new method to determine the voltage gain of an OTA is also proposed. The bottom terminal parasitic effect of poly-insulator-poly (PIP) capacitors is considered. About an extra 20% of capacitance is added to the total capacitance load. A power and area efficient resonator is adopted to realize a coefficient of 1/90 for 50% power and 75% area reduction compared with conventional designs. The chip is implemented in a low cost 0.35 μm complementary metal oxide semiconductor (CMOS) process. The total power consumption is 20 μW with a 1.5 V supply, and the measured dynamic range (DR) is 95 dB over a 1 kHz bandwidth. Experimental results show that a high figure-of-merit (FOM) is achieved for the designed modulator in comparison with those from the literature.

A 1-V low power gain boosted self-cascoding current mirror operational transconductance amplifier

A low-voltage, micro-power, low-noise, high-gain, high-output swing current mirror-based operational transconductance amplifier (OTA) is presented. The proposed OTA achieves high DC gain and output swing by the adoption of gain boosted current mirroring and self-cascoding techniques. From the simulation, the proposed OTA implemented on a 0.18 μm CMOS shows the DC gain up to 90 dB with a gain bandwidth of 700 KHz for a load capacitor of 1 pF and an output voltage swing of 600 mV. The OTA dissipates only 750 nW from 1.0 V supply.

A 0.8-V 0.25-mW Current-Mirror OTA With 160-MHz GBW in 0.18-<formula formulatype="inline"><tex>$\mu{\hbox {m}}$</tex></formula> CMOS

A low-voltage low-power CMOS operational transconductance amplifier (OTA) with near rail-to-rail output swing is presented in this brief. The proposed circuit is based on the current-mirror OTA topology. In addition, several circuit techniques are adopted to enhance the voltage gain. Simulated from a 0.8-V supply voltage, the proposed OTA achieves a 62-dB dc gain and a gain-bandwidth product of 160 MHz while driving a 2-pF load. The OTA is designed in a 0.18-mum CMOS process. The power consumption is 0.25 mW including the common-mode feedback circuit