Current-limiting Circuit Research Articles

Study on Coordination of Different Types of DC Superconducting Current Limiter and DC Circuit Breaker for Electric Propulsion Aircraft

Study on Coordination of Different Types of DC Superconducting Current Limiter and DC Circuit Breaker for Electric Propulsion Aircraft

A Novel Fast Contact Operating Mechanism of the Medium and Low Voltage Hybrid DC Current Limiting Circuit Breaker

In order to solve the problem of the slow initial speed caused by the large mass of the bistable permanent magnetic actuator (PMA) in the traditional bistable permanent magnetic–electromagnetic repulsion mechanism (PM-ERM), a novel fast contact operating mechanism is proposed by using the flexible spring system (SS) between the PMA and the ERM. The novel structure can separate the mass of the PMA and the ERM at the initial phase of the interrupting process, improve the initial speed of the contact and increase the initial opening distance of the contact. Firstly, the paper conducts an extensive investigation and analysis of the principle of the existing fast operating mechanism and points out the advantages and disadvantages of the existing mechanism. In order to meet the requirement of fast interrupting and improve the service life of the mechanism, a novel mechanism is proposed. And then, the working principle of the novel mechanism is introduced. The cooperative relationship between the ERM and the PMA and the working principle and performance parameter requirements of the ERM, SS and PMA are analyzed and designed. Finally, the feasibility of the novel mechanism is verified by the experiment. The results show that the opening distance of the novel operating mechanism can reach 2.25 mm in 1 ms. Compared with 1.24 mm of the traditional operating mechanism, it improves the initial opening distance of the contact by 81.5% and is conducive to the rapid interruption of the Hybrid DC current-limiting circuit breaker (HDCCLCB).

Integration of Superconducting Fault Current Limiter and DC Circuit Breaker for Electric Aircraft DC Network

Integration of Superconducting Fault Current Limiter and DC Circuit Breaker for Electric Aircraft DC Network

Design and Development of Automated Solar Grass Trimmer with Charge Control Circuit

The focus of this paper is the design and development of an automatic solar grass trimmer prototype, emphasizing high operational efficiency with renewable energy as the primary power source. This solar-based device not only contributes to reduced air pollution but also aligns with environmental sustainability objectives. The prototype features a charge control circuit and is powered by a rechargeable 12V battery. To address low battery levels, a solar panel is employed for automatic recharging. A DC-DC buck converter is integrated to step down the higher voltage from the solar panel to match the battery requirements. Safety features, such as a current limiter and overcharge protection circuits, have been incorporated into the design. The paper provides a detailed discussion on the conceptual design of the solar grass trimmer, including the placement of sensors and motors. Additionally, the cutting motor force analysis and total weight calculation of the prototype are presented.The solar charge control circuit, along with details on the current limiter and overcharge protection circuit, is thoroughly explored. Successful development of the prototype is reported, and the battery charging circuits are analyzed using a Bench PSU and solar panel. The paper includes plots of voltage, current, and power generated by the solar panel under various weather conditions. A comparison between Bench PSU and solar panel power is also provided. This research contributes to the advancement of automated solar-powered devices, offering sustainable solutions for environmentally friendly grass trimming.

A bi-directional current-limiting hybrid DC circuit breaker with fast-breaking capability

A bi-directional current-limiting hybrid DC circuit breaker with fast-breaking capability

Parameter Optimization Design of the Commutation Circuit of a Hybrid DC-Current-Limiting Circuit Breaker

Aimed at the optimization design of the parameters of the commutation circuit of a hybrid DC-current-limiting circuit breaker (HDCCLCB), a parameter selection model considering the short-time withstand of the thyristor and the volume of the commutation circuit is proposed by simplifying the object, and the commutation circuit parameters were preliminarily obtained. In order to verify the correctness of the method of selecting the commutation circuit parameters, the circuit simulation model of the HDCCLCB was built. The experimental platform was built, and the breaking experiment was completed under the fault condition with the current rising rate of 20 A/μs. The correctness of the simulation model and parameter design method was verified by comparing the circuit model simulation results with the experimental results. In order to further optimize the parameters of the commutation circuit, a mathematical model for optimization design was established. Taking the maximum critical breakdown voltage under unit capacitance energy as the objective function, the arcing time before commutating and the current-limiting inductance and capacitance are enumerated to obtain the optimized commutation circuit parameters. By comparing this result with the result of the preliminary design, the objective function is improved by 20.7%, laying a solid foundation for further research and the development of current-limiting circuit breakers for medium-voltage DC systems.

An Input Up to 100-V High Voltage LDO Based a Novel Pre-Regulation and a Simple Clamp Current Circuit

With the aim of improving the small input voltage range and complex structure of the current-limiting circuit in the traditional LDO, a wide-range high-voltage input LDO was designed, which uses a pre-regulation principle and a diode current-limiting protection scheme. Based on the DB HiTek 0.18 μm BCD process model for circuit simulation, the simulation results showed that this proposed LDO can stably output 7.6 V under the input voltage range from 13 V to 100 V. In addition, the load regulation rate was 0.0256 mV/mA, and the line regulation rate was 0.035 mV/V. When the load current exceeded 30 mA, the output voltage was prohibited and overcurrent protection was performed. The measurement results showed that the maximum input voltage of the designed chip could reach 140 V. When the load current exceeded 19 mA, the LDO had no output voltage, which indicates that the current limiting circuit can work stably. The circuit designed in this paper has a simple structure but good stability. To date, the LDO has been applied to other DC-DC power supply chips.

Multiport Current-Limiting Hybrid DC Circuit Breaker for MTdc Grids

The coordination configuration of current-limiting inductors (CLIs) and hybrid dc circuit breakers (HCBs) is currently the most commonly used fault handling method to ensure fault ride-through of multi-terminal dc (MTdc) grids after the dc-side fault occurs. However, the high cost of HCB limits its large-scale application. In addition, the installation of the large CLIs will adversely affect the HCB performance, such as extending the fault current interruption time and increasing the energy dissipation pressure of the arrester. To solve these problems, a multiport current-limiting hybrid dc circuit breaker (MCL-HCB) is proposed in this paper. Compared with the typical HCBs, the MCL-HCB can achieve full selective protection of all connected dc lines with significantly reduced investment costs. Besides, it can suppress the rising speed of the fault current by embedded CLIs, while eliminating their negative impacts on the fault current interruption. The feasibility and superiority of the proposed MCL-HCB are verified by simulations in the PSCAD/EMTDC software and experiments in the scaled-down experimental setup. Besides, the performance comparison between the MCL-HCB and existing solutions is elaborated.

Multi-port DC circuit breaker based on dual capacitor current limiting and energy sink

The coupling relationship between the removal of the fault current and the dissipation of the residual energy of the fault line during the fault isolation process of the multi-port capacitive current-limiting DC circuit breaker prolongs the breaking time of the fault to a certain extent. In order to solve the above problems, this paper proposes a multi-port DC circuit breaker based on dual-capacitor current limiting and energy sinking on the premise of decoupling the fault current attenuation and removal process and the fault line residual energy discharge process. Further reduce the fault breaking time and equipment withstand voltage requirements of the DC circuit breaker. Firstly, the topology and working principle of the proposed circuit breaker are analyzed, and then the parameters in the topology are designed. Then a simulation model is built in the PSCAD/EMTDC simulation platform to verify the fault breaking performance and breaking time. The effect of decoupling the fault current clearing process and the fault line residual energy discharge process on the effectiveness of shortening the fault breaking time is verified.

A hybrid circuit breaker with fault current limiter circuit in a VSC-HVDC application

A conventional hybrid circuit breaker (HCB) is used to protect a voltage source converter-based high voltage direct current transmission system (VSC-HVDC) from a short circuit fault. With the increased converter capacity, the DC protection equipment also requires a regular upgrade. This paper adopts a novel type of HCB with a fault current limiter circuit (FCLC), and focuses on the responses of voltage and current during DC faults, which are associated with parameter selection. PSCAD/EMTDC based simulation of a three-terminal VSC-HVDC system confirms the effectiveness and value of HCB with FCLC, by using an equivalent circuit modelling approach. Laboratory experimental tests validate the simulation results. The peak fault current is reduced according to the current limiting inductor (CLI) increase, and can be isolated more quickly. By adopting parallel metal oxide arrester (MOA) with the main branch of HCB, voltage stresses across the breaker components decrease during transient and continuous operation, and less energy needs to be dissipated by the MOA. The remnant current for all cases is transmitted to power dissipating resistor (PDR) in the final stage, and the fault current is reduced to the lowest possible value. When the current from the main branch is transferred to the FCLC branch, transient voltage spikes occur, while smaller PDR is required to absorb current in the final stage.

DC fault current approximation and fault clearing methods for hybrid LCC-VSC HVDC networks

The DC-side fault analysis of Line commutated converter based high voltage direct current (LCC-HVDC) and Voltage source converter based high voltage direct current (VSC-HVDC) networks has been studied by most researchers and achieved fruitful results. However, the traditional fault analysis method does not consider in detail the change process of the trigger angle of the LCC converter station and the AC current feeding of the VSC converter station caused by the control strategy. Therefore, this paper proposes a new DC side fault transient analysis method suitable for hybrid multi-terminal HVDC transmission networks. In addition, considering the deficiency that the active fault current suppression method only relying on the control strategy cannot fundamentally clear the DC fault, this paper proposes a new Z-source current-limiting circuit (ZCLC) with reference to the topology of the Z-source dc circuit breaker (DCCB). Then, ZCLC will cooperate with DCCB to improve the fault clearing capacity of the whole system. Firstly, this paper establishes the equivalent Laplace transform model of the three-terminal LCC-VSC-VSC, and analyzes the short-circuit current expression on both sides. Then, the change process of trigger angle is approximately linearized by the least square method, which obtains a new expression of fault transient current on the LCC side. Similarly, the composition of AC current fed to DC side is deduced by using the commonly used inner-loop PI controller model, which also obtains a new expression of fault transient current on the VSC side. Secondly, referring to the traditional crossed-type Z-source DCCB, series-type Z-source DCCB, and parallel-type Z-source DCCB, this paper also proposes a new ZCLC and analyzes its working principle and parameter design. Then, the newly proposed ZCLC is combined with DCCB to be applied to the hybrid multi-terminal HVDC network. Finally, the simulation results based on Matlab/Simulink verify the effectiveness of the fault analysis and passive fault clearing methods, and the semi-physical experimental platform based on PLECS/RTbox verifies the superiority of the new ZCLC.

A novel fault current limiter topology design based on liquid metal current limiter

The liquid metal current limiter (LMCL) is regarded as a viable solution for reducing the fault current in a power grid. But demonstrating the liquid metal arc plasma self-pinching process of the resistive wall, and reducing the erosion of the LMCL are challenging, not only theoretically, but also practically. In this work, a novel LMCL is designed with a resistive wall that can be connected to the current-limiting circuit inside the cavity. Specifically, a novel fault current limiter (FCL) topology is put forward where the novel LMCL is combined with a fast switch and current-limiting reactor. Further, the liquid metal self-pinch effect is modeled mathematically in three dimensions, and the gas-liquid two-phase dynamic diagrams under different short-circuit currents are obtained by simulation. The simulation results indicate that with the increase of current, the time for the liquid metal-free surface to begin depressing is reduced, and the position of the depression also changes. Different kinds of bubbles formed by the depressions gradually extend, squeeze, and break. With the increase of current, the liquid metal takes less time to break, but breaks still occur at the edge of the channel, forming arc plasma. Finally, relevant experiments are conducted for the novel FCL topology. The arcing process and current transfer process are analyzed in particular. Comparisons of the peak arc voltage, arcing time, current limiting efficiency, and electrode erosion are presented. The results demonstrate that the arc voltage of the novel FCL topology is reduced by more than 4.5 times and the arcing time is reduced by more than 12%. The erosions of the liquid metal and electrodes are reduced. Moreover, the current limiting efficiency of the novel FCL topology is improved by 1%‒5%. This work lays a foundation for the topology and optimal design of the LMCL.

Air-Core-Transformer-Based Solid-State Fault-Current Limiter for Bidirectional HVdc Systems

Modular multilevel converter (MMC) high-voltage direct current (HVdc) transmission is a promising method to integrate renewable energies. However, limiting the dc-link fault current and accelerating the fault-current clearance are critical issues for MMC-HVdc systems. In this article, we propose an air-core-transformer-based fault-current limiter (ACT-FCL) in cooperation with the dc circuit breaker to limit fault-current rising and decrease fault-clearing time. Compared with the conventional dc reactor, hybrid current-limiting circuit, current-commutation-based fault-current limiter (FCL), and magnetic coupling FCL, the ACT-FCL can increase the equivalent inductance during the dc fault stage to reduce the rising rate and peak of fault current. The ACT-FCL can also decrease the equivalent inductance during the fault-current-clearing stage to reduce the fault-clearing time. The simulations and laboratory experiments verify the effectiveness of the proposed ACT-FCL in the bidirectional HVdc systems. The ACT-FCL may be extended to more fields, such as dc microgrid and domestic dc transmission.

Research on Latching Current Limiter Circuit of Aerospace Power System

The input terminal of the aerospace power system is connected with surge suppression and overcurrent protection circuits. However, prior art methods have many demerits such as complex circuits, high surge currents, and slow response of overcurrent protection. Hence, this paper proposes a novel latching current limiter (LCL) circuit with both surge suppression and over-current protection functions. When over-current occurs, the circuit snap into the current limiting state within the adjustable time-delay period. When the over-current fault despairs during the time-delay period, the LCL circuit turns into the output lock state and rapidly lock down the output bus wire. Theoretical analysis of LCL circuit including the three operation states (i.e., the normal operation state, current limiting state and output lock state) and basic circuit equation derivation have been carried out. And the experimental platform is set up to validate the superior performance of the proposed LCL circuit. Results show that the proposed LCL circuit can effectively suppress the inrush current and sensitively respond the over-current fault of dc-link bus wire.

A current‐limiting DC circuit breaker with power flow control capability

Power flow controller (PFC), fault current limiter (FCL) and DC circuit breaker (DCCB) are important equipment in the DC grid. There are a large number of power electronic components in these equipment, resulting in high cost. In order to reduce the use of additional components, a current-limiting DC circuit breaker with power flow control capability is proposed here, which integrates the PFC, FCL, and DCCB into one equipment. Further, the main breaker in the proposed circuit breaker is shared by all lines connected to a DC bus to reduce cost. The topology and operating principle of the circuit breaker are introduced. Theoretical analysis and parameter design are carried out. Besides, the proposed circuit breaker is verified in PSCAD/EMTDC. Finally, the performance and cost are compared with existing schemes. The simulation results show that the proposed circuit breaker can effectively realize power flow control, current limiting and fault isolation at a lower cost.

A Fault Current Limiting Hybrid DC Circuit Breaker

Due to the low impedance characteristic of the high voltage direct current (HVDC) grid, the fault current rises extremely fast after a DC-side fault occurs, and this phenomenon seriously endangers the safety of the HVDC grid. In order to suppress the rising speed of the fault current and reduce the current interruption requirements of the main breaker (MB), a fault current limiting hybrid DC circuit breaker (FCL-HCB) has been proposed in this paper, and it has the capability of bidirectional fault current limiting and fault current interruption. After the occurrence of the overcurrent in the HVDC grid, the current limiting circuit (CLC) of FCL-HCB is put into operation immediately, and whether the protected line is cut off or resumed to normal operation is decided according to the fault detection result. Compared with the traditional hybrid DC circuit breaker (HCB), the required number of semiconductor switches and the peak value of fault current after fault occurs are greatly reduced by adopting the proposed device. Extensive simulations also verify the effectiveness of the proposed FCL-HCB.

A distribution network solid-state DC circuit breaker with current limiting function

The Solid-State direct current (DC) circuit breaker (SSCB) is a key equipment to ensure the safe and reliable operation of medium-voltage DC (MVDC) distribution networks. A distribution network solid-state DC circuit breaker with current-limiting function (CLSSCB) topology is proposed in this paper. The CLSSCB adds current-limiting circuit and continuous current branch on the basis of traditional SSCB. The current limiting circuit can significantly reduce the rise rate and peak value of the fault current by using auxiliary current limiting reactance and current limiting impedance. The continuous current branch uses the freewheeling diode to reduce the energy absorption of the non-fault side arrester and effectively shorten the fault clearing time through the input of the freewheeling resistance. In this paper, the working principle of CLSSCB is analyzed in detail and theoretically deduced, and the selection method of key device parameters of CLSSCB is given. The CLSSCB simulation experimental model based on the PSCAD/ EMTDC software is built, and the feasibility and effectiveness of the proposed scheme are verified in the single-end and two-end DC distribution network scenarios, respectively.

Combinatorial Multi-Objective Optimization of Resistive SFCL and DC Circuit Breaker in Hybrid HVDC Transmission System

To cope with the DC fault isolation issue of a hybrid high-voltage direct-current (HVDC) system, a promising option is to coordinate superconducting fault current limiter (SFCL) and DC circuit breaker (DCCB). In this paper, a multi-objective Pareto optimization method is proposed for the combinatorial use of a resistive-type SFCL and a DCCB in a hybrid HVDC. Firstly, theoretical modeling and coordinated action process of the SFCL and DCCB are expounded. Then, a multi-objective function that collaboratively minimizes the SFCL resistance and the breaking capability of the DCCB is established, and a non-dominated sorting genetic algorithm-II (NSGA-II) is utilized to acquire the satisfying Pareto optimal solution set. The optimizing calculation is done in a 320 kV hybrid HVDC for validating the approach efficacy. Besides, transient simulations are implemented by PSCAD/EMTDC, and comprehensive performance analyses are executed to evaluate the rationality of the combinatorial optimal schemes. The findings indicate that the DC fault current is reduced and interrupted with the minimal rating of the resistive-type SFCL and the DCCB, and also, the HVDC system's safe and stable operation will be ensured. Therefore, the proposed approach is adequately verified for its availability and feasibility.

Prototype Current-Limiting Hybrid DC Circuit Breaker Incorporating a Fuse and a Semiconductor Device

Owing to the increased demand for DC interruption, a prototype current-limiting hybrid DC circuit breaker incorporating a fuse and a semiconductor device was developed, based on a completely novel design concept. Recently, hybrid DC breakers have been attracting attention because of their low conduction loss and high-speed current interruption capability. The superiority of this hybrid DC circuit breaker lies in the simultaneous use of the high-speed current-limiting performance of the fuse and the highly reliable current-interruption performance of the semiconductor device. Furthermore, the hybrid DC circuit breaker performs the current interruption without any mechanical contact, thus preventing any delay in operation induced by the mechanical contact. The feasibility of the proposed concept was demonstrated by the successful application of the circuit breaker in a 1 kA fault current interruption procedure. Hence, the current-limiting hybrid DC circuit breaker is suitable for low voltage and medium voltage DC system protection. As the fuses and semiconductor modules progress, the hybrid DC circuit breaker may also adapt to HVDC systems.

Fault Analyzer Circuit Analysis at the Load Line in Hybrid Solar/Wind System

Electric power is generated, transmitted, and distributed via large interconnected power systems. The generation of electric power takes place in a power plant. The main objective reduces the operating time of fault current removal from the load line and senses the fault current quickly to overcome its effects. The system is to be made effective and efficient while dealing with the fault situation, fault removal, and restoration of the normal operating conditions at the loading points. The results conclude the effectiveness of the proposed T-ACO-based Optimization control for the operation of the relay in accordance with the fault current limiter and analyzer circuit. The second model of the hybrid system concludes that the system having fault current limiter and analyzer circuit reduces and fault current rise and prevents the voltage from dropping to zero even if no AI-based technique is used and the operating time remains the same. The AI-based techniques further reduce the operating time also thereby making the system more efficient as the voltage is restored to its normal value in a short interval of time when the test system is simulated for 1 second in a MATLAB/SIMULINK environment.