Crystalline Si Layer Research Articles

Highly oriented crystalline si on epitaxial Gd2O3/Si(111) substrate using low-cost Radio Frequency sputtering for Silicon on Insulator application

Silicon-on-Insulator (SOI) technology has been the center of attraction with the advancement in Radio Frequency (RF) technology and the advent of Internet-of-Things due to its low-power operation with reduced parasitic and short-channel effects. However, the state-of-the-art smart-cut method used for the SOI wafer is costly. Alternatively, the notion of using the Si channel layer on epitaxial rare-earth oxide has been proposed. In literature, the existing techniques used to achieve the same, such as Molecular beam Epitaxy or reduced-pressure chemical vapor deposition technique, are either costly or non-high-volume manufacturable. In this context, we propose a method to fabricate the highly oriented crystalline Si(111) channel layer (Top-Si) on an epitaxial Gd2O3/Si(111) virtual substrate (SOXI) utilizing the solid phase epitaxy using the high-volume manufacturing friendly (HVM), low-cost RF magnetron sputtering technique. First, we have shown the multicrystalline Si and epitaxial Gd2O3 layer grown on Si(111) substrate, as confirmed using high-resolution X-ray diffraction (HRXRD) and Transmission Electron Microscopy (TEM). Second, we investigated the impact of rapid thermal annealing at 850 °C on the heterostructure using HRXRD and TEM. It is observed that the high-temperature annealing transforms the Top-Si layer into the highly oriented crystalline Si(111) layer by fusing smaller grains towards larger grains. Hence, we demonstrate a low-cost, HVM-friendly technique for the fabrication of SOXI wafers.

Metal Sheet of Atomic Thickness Embedded in Silicon.

The controlled confinement of the metallic delta-layer to a single atomic plane has so far remained an unsolved problem. In the present study, the delta-type structure with atomic sheet of NiSi2 silicide embedded into a crystalline Si matrix has been fabricated using room-temperature overgrowth of a Si film onto the Tl/NiSi2/Si(111) atomic sandwich in ultrahigh vacuum. Tl atoms segregate at the growing Si film surface, and the 1.5-3.0 nm thick epitaxially crystalline Si layer forms atop the NiSi2 sheet. Confinement of the NiSi2 layer to a single atomic plane has been directly confirmed by transmission electron microscopy. The NiSi2 delta-layer demonstrates a p-type conductivity associated with the electronic transport through the two hole-like and one electron-like interface-state bands. The basic structural and electronic properties of the NiSi2 delta-layer remain after keeping the sample in air for one year.

Growth of single crystalline Si on graphene using RF-MBE: Orientation control with an AlN interface layer

Graphene integration with commonly used Si is very promising for high-performance devices in the future. The fabrication of Si on graphene has gained more attention to realize promising device design and to develop high-quality Si thin-film technology. Nevertheless, attempts to develop Si on graphene are very few, and films are often of poor-quality. Introducing an AlN atomic layers as an interface layer, this paper reports the growth of single crystalline Si on graphene using radio-frequency plasma-assisted molecular beam epitaxy (RF-MBE). We focus on the initial growth process of Si on graphene and clarify the epitaxial relationship between Si and graphene. It is observed that the initial Si nuclei rotate randomly on the surface if deposited directly on the graphene, which implies that orientation control of the initial Si layers on the epitaxial graphene is very important to obtain high-quality layers. The proposed thin AlN intermediate layer to the graphene surface greatly enhances the orientation of initial Si nuclei and results in a single crystalline Si layer on the epitaxial graphene.

Spectroscopic Studies of Integrated GaAs/Si Heterostructures

The purpose of the study is to investigate the effect of a new type of compliant substrates based on an AlGaAs superstructure layer (SL) and a protoporous Si (proto-Si) layer formed on a crystalline Si (c-Si) layer on the optical properties of an epitaxial GaAs layer grown by metal–organic chemical vapor deposition. It is for the first time shown that the low-temperature growth of high-quality epitaxial GaAs films can be conducted using SL/proto-Si compliant substrates. The introduction of a SL layer in addition to proto-Si into the composition of the compliant substrate makes it possible to mitigate a number of negative effects of low-temperature growth, to reduce the level of strains in the epitaxial layer, to protect it from self-doping with Si atoms, to reduce the number of technological operations of the growth of transition buffer layers, to improve the structural and morphological characteristics of the epitaxial layer, and to attain good optical characteristics of the layer. The GaAs/Si heterostructures are studied by Raman spectroscopy, photoluminescence measurements, and optical transmission–reflection spectroscopy. The data will serve as an important material for understanding the fundamentals of the physics and technology of integrated III–V/Si heterostructures and for facilitating their use in optoelectronic devices.

266-nm ps Laser Ablation for Copper-Plated p-Type Selective Emitter PERC Silicon Solar Cells

Application of 266-nm picosecond (ps) laser ablation and copper (Cu)-plated metallization to p-type selective emitter (SE) passivated emitter and rear cells (PERC) is reported in this paper. Use of a 266-nm ps laser resulted in similar laser-induced periodic surface structures as observed for 355-nm ps laser ablation of a silicon (Si) nitride antireflection coating (ARC) on random-textured Si solar cell surfaces. In addition, it is shown that 266-nm ps laser ablation results in the formation of amorphous Si with an underlying distorted crystalline Si layer at the laser-ablated surfaces. The successful alignment of laser-ablated openings to the heavily doped SE regions resulted in a comparable cell efficiency of Cu-plated SE PERC cells to screen-printed controls, with a maximum cell efficiency of 20.6% being achieved for the Cu-plated cells. The plated cell performance was limited by the recombination losses, and in particular nonideal recombination caused by the use of a shallow emitter, which had been optimized for screen-printed metallization. Engineering of an SE with a junction depth of 0.52 μ m in the heavily doped regions resulted in a 0.3% absolute increase in pseudo fill factor and demonstrated the importance of displacing the p-n junction from the laser-ablated Si surface. Although 355-nm ps laser ablation has been demonstrated to result in strong busbar adhesion in previous reports of Cu-plated cells, significant variability in the busbar adhesion of the fully plated SE PERC cells resulted by 266-nm ps laser ablation. The predicted increased sensitivity of 266-nm laser ablation to the ARC thickness and the possibility that surface oxides were not uniformly removed across wafers before plating may have affected the uniformity of silicide formation and hence the adhesion of the plated busbars.

Interfacial phonon scattering and transmission loss in >1 µm thick silicon-on-insulator thin films

Scattering of phonons at boundaries of a crystal (grains, surfaces, or solid/solid interfaces) is characterized by the phonon wavelength, the angle of incidence, and the interface roughness, as historically evaluated using a specularity parameter $p$ formulated by Ziman [Electrons and Phonons (Clarendon Press, Oxford, 1960)]. This parameter was initially defined to determine the probability of a phonon specularly reflecting or diffusely scattering from the rough surface of a material. The validity of Ziman's theory as extended to solid/solid interfaces has not been previously validated. To better understand the interfacial scattering of phonons and to test the validity of Ziman's theory, we precisely measured the in-plane thermal conductivity of a series of Si films in silicon-on-insulator (SOI) wafers by time-domain thermoreflectance (TDTR) for a Si film thickness range of 1--10 \ensuremath{\mu}m and a temperature range of 100--300 K. The $\mathrm{Si}/{\mathrm{SiO}}_{2}$ interface roughness was determined to be $0.11\ifmmode\pm\else\textpm\fi{}0.04\phantom{\rule{0.16em}{0ex}}\mathrm{nm}$ using transmission electron microscopy (TEM). Furthermore, we compared our in-plane thermal conductivity measurements to theoretical calculations that combine first-principles phonon transport with Ziman's theory. Calculations using Ziman's specularity parameter significantly overestimate values from the TDTR measurements. We attribute this discrepancy to phonon transmission through the solid/solid interface into the substrate, which is not accounted for by Ziman's theory for surfaces. The phonons that are specularly transmitted into an amorphous layer will be sufficiently randomized by the time they come back to the crystalline Si layer, the effect of which is practically equivalent to a diffuse reflection at the interface. We derive a simple expression for the specularity parameter at solid/amorphous interfaces and achieve good agreement between calculations and measurement values.

Varifocal Scanner Using Wafer Bonding

We present a varifocal mirror integrated with a comb-drive scanner (varifocal scanner) fabricated by using a wafer bonding technology. An Au-Au thermocompression bonding technology is utilized for the integration. The bonding technology enables fabricating the multiple single crystalline Si layers on a wafer. The varifocal scanner consists of the three Si layers: 1) the fixed comb layer; 2) the scanner frame layer; and 3) the varifocal mirror layer. The 2-mm-diameter and 10- $\mu \text{m}$ -thick varifocal mirror is fabricated on the $60~\mu \text{m}$ thick comb-drive scanner. The focal length modulation range of the varifocal mirror is from −523 to 139 mm at the frequency of 18.3 kHz. The optical angle is 7° at the resonant frequency of 3.59 kHz. The motion couplings between the varifocal mirror and the scanner are also investigated. [2016-0257]

The microstructure of Si surface layers after plasma-immersion He+ ion implantation and subsequent thermal annealing.

The structural changes in the surface layer of p-type Cz-Si(001) samples after high-dose low-energy (2 keV) He+ plasma-immersion ion implantation and subsequent thermal annealing were studied using a set of complementary methods: high-resolution X-ray reflectometry, high-resolution X-ray diffraction, transmission electron microscopy and atomic force microscopy. The formation of a three-layer structure was observed (an amorphous a-SiO x layer at the surface, an amorphous a-Si layer and a heavily damaged tensile-strained crystalline c-Si layer), which remained after annealing. Helium-filled bubbles were observed in the as-implanted sample. The influence of annealing on the evolution of the three-layer structure and the bubbles is considered. The bubbles are shown to grow after annealing. Their characteristic size is determined to be in the range of 5-20 nm. Large helium-filled bubbles are located in the amorphous a-Si layer. Small bubbles form inside the damaged crystalline Si layer. These bubbles are a major source of tensile strain in the c-Si layer.

(Invited) Heterogeneous Photonic Integration by Direct Wafer Bonding

The silicon photonics platform has emerged as a promising integration technique for use in many applications, particularly datacenter communications, which is expected to produce demand for large numbers of low cost photonic integrated circuits (PICs). Silicon-based PICs are almost universally based on silicon-on-insulator (SOI) wafers, which are enabled by wafer bonding technology. Silicon (Si) is useful as a waveguide material due to its high index contrast, low intrinsic absorption, and mature manufacturing infrastructure. However, it does not strongly interact with light in wavelength ranges of interest for data transmission. Heterogeneous integration of InP-based materials with Si using wafer bonding technology is able to overcome this limitation and has allowed the realization of a wide range of photonic devices on Si1. Beyond integration of InP with Si, wafer bonding enables complex vertical integration with of a wide variety of materials, such as silicon nitride (Si3N4) ultra-low loss waveguides, and magnetic and nonlinear materials. A crystalline Si layer transferred to an ultra-low loss Si3N4 waveguide wafer by bonding allows for integration of highly confined Si photonic waveguide with low-loss passive components in Si3N4. Any device that can be realized on an SOI wafer can be integrated with the Si3N4 waveguide. Multiple die bonding of InP chips on the Si layer can add lasers, amplifiers, modulators, and photodetectors to the circuit. Lateral tapers of the waveguides allows coupling between the layers with loss below 0.5 dB. This technology was used to combine a Si3N4 arrayed waveguide grating (AWG) wavelength multiplexer with high-speed 50 Gb/s heterogeneous Si/InP photodetectors to form a 400 Gb/s wavelength division multiplexing (WDM) receiver2. A cross section of the photodetector is shown in Figure 1. Bonding technology can allow the introduction of additional circuit functions that are unavailable using common semiconductor materials. One such device is an optical isolator, which allows light to experience loss that is dependent on the direction of optical propagation. This optical nonreciprocity can be achieved by bonding a magneto-optic material such as cerium substituted yttrium iron garnet (Ce:YIG) on Si waveguides, and applying a magnetic field through the material. Using this phenomenon, it is possible to fabricate optical isolators as well as circulators for use in optical sensors, amplifiers, and WDM systems. Our design consists of a Si microring with a bonded Ce:YIG die on top, shown schematically in Figure 2. A metallic microstrip is deposited on the backside of the bonded die following substrate removal. By applying a current through this microstrip, we generate a magnetic field, which causes a resonance split between the forward and backwards propagating light. Thus, optical isolators with up to 32 dB of isolation have been demonstrated3. Lithium niobate (LN) is a material of paramount importance for nonlinear optics, thanks to its large nonlinear coefficient and broad transparent window (0.4-5.0 µm)4. It has attracted attention for use in PICs, because the compact scale of integrated waveguides results in high photon densities that effectively enhance nonlinear interaction. Recently, the LN-on-insulator (LNOI) technology has been successfully demonstrated by ion injection and heterogeneous bonding. This allows the implementation of LN thin films with submicron thickness on various material platforms5. We present here a quasi-phase matched, ultra-low-loss S3N4-LN platform, which reduces the loss of integrated LN waveguides down to a value comparable with best results of bulk LN waveguides 6 (Figure 3). Bonding of LN to silicon is also possible, allowing integration of LN-based devices with SOI photonics. Wafer bonding technology allows the realization of complex and highly integrated photonic devices. The ability to combine multiple materials such as multiple-die bonding for integration of lasers, modulators, and detectors enables PICs with a wide variety of functions. Vertical integration through bonding of high-quality thin films, such as silicon nitride, lithium niobate, crystalline silicon, and thermal silicon dioxide can be used to construct integrated waveguides with useful properties and high performance. 1. M. J. R. Heck et al., IEEE J. Sel. Top. Quantum Electron. 19, 6100117 (2013). 2. M. Piels, J. F. Bauters, M. L. Davenport, M. J. R. Heck, and J. E. Bowers, J. Light. Technol. 32, 817–823 (2014). 3. D. Huang et al., Optical Fiber Communications (2016). 4. G. D. Boyd, R. C. Miller, K. Nassau, W. L. Bond, and A. Savage, Appl. Phys. Lett. 5, 234–236 (1964). 5. L. Chen, Q. Xu, M. G. Wood, and R. M. Reano, Optica 1, 112 (2014). 6. K. R. Parameswaran et al., Opt. Lett. 27, 179–181 (2002). Figure 1

High-quality silicon on silicon nitride integrated optical platform with an octave-spanning adiabatic interlayer coupler

Hybrid nanophotonic platforms based on three-dimensional integration of different photonic materials are emerging as promising ecosystems for the optoelectronic device fabrication. In order to benefit from key features of both silicon (Si) and silicon nitride (SiN) on a single chip, we have developed a wafer-scale hybrid photonic platform based on the integration of a thin crystalline Si layer on top of a thin SiN layer with an ultra-thin oxide buffer layer. A complete optical path in the hybrid platform is demonstrated by coupling light back and forth between nanophotonic devices in Si and SiN layers. Using an adiabatic tapered coupling method, a record-low interlayer coupling-loss of 0.02 dB is achieved at 1550 nm telecommunication wavelength window. We also demonstrate high-Q resonators on the hybrid material platform with intrinsic Q's as high as 3 × 10(6) for a 60 μm-radius microring resonator, which is (to the best of our knowledge) the highest Q observed for a micro-resonator on a hybrid Si/SiN platform.

Deposition of O atomic layers on Si(100) substrates for epitaxial Si-O superlattices: investigation of the surface chemistry

Epitaxial Si-O superlattices consist of alternating periods of crystalline Si layers and atomic layers of oxygen (O) with interesting electronic and optical properties. To understand the fundamentals of Si epitaxy on O atomic layers, we investigate the O surface species that can allow epitaxial Si chemical vapor deposition using silane. The surface reaction of ozone on H-terminated Si(100) is used for the O deposition. The oxygen content is controlled precisely at and near the atomic layer level and has a critical impact on the subsequent Si deposition. There exists only a small window of O-contents, i.e. 0.7–0.9 atomic layers, for which the epitaxial deposition of Si can be realized. At these low O-contents, the O atoms are incorporated in the Si-Si dimers or back bonds (-OSiH), with the surface Si atoms mainly in the 1+ oxidation state, as indicated by infrared spectroscopy. This surface enables epitaxial seeding of Si. For O-contents higher than one atomic layer, the additional O atoms are incorporated in the Si-Si back bonds as well as in the Si-H bonds, where hydroxyl groups (-Si-OH) are created. In this case, the Si deposition thereon becomes completely amorphous.

Synthesis and properties of ferromagnetic nanostructures embedded within a high-quality crystalline silicon matrix via ion implantation and nanocavity assisted gettering processes

Integrating magnetic functionalities with silicon holds the promise of developing, in the most dominant semiconductor, a paradigm-shift information technology based on the manipulation and control of electron spin and charge. Here, we demonstrate an ion implantation approach enabling the synthesis of a ferromagnetic layer within a defect free Si environment by exploiting an additional implant of hydrogen in a region deep below the metal implanted layer. Upon post-implantation annealing, nanocavities created within the H-implanted region act as trapping sites for gettering the implanted metal species, resulting in the formation of metal nanoparticles in a Si region of excellent crystal quality. This is exemplified by the synthesis of magnetic nickel nanoparticles in Si implanted with H+ (range: ∼850 nm; dose: 1.5 × 1016 cm−2) and Ni+ (range: ∼60 nm; dose: 2 × 1015 cm−2). Following annealing, the H implanted regions populated with Ni nanoparticles of size (∼10–25 nm) and density (∼1011/cm2) typical of those achievable via conventional thin film deposition and growth techniques. In particular, a maximum amount of gettered Ni atoms occurs after annealing at 900 °C, yielding strong ferromagnetism persisting even at room temperature, as well as fully recovered crystalline Si environments adjacent to these Ni nanoparticles. Furthermore, Ni nanoparticles capsulated within a high-quality crystalline Si layer exhibit a very high magnetic switching energy barrier of ∼0.86 eV, an increase by about one order of magnitude as compared to their counterparts on a Si surface or in a highly defective Si environment.

Photoresponse properties of undoped BaSi2 epitaxial layers on n+-BaSi2/p+-Si(001) by molecular beam epitaxy

We investigated the photoresponse properties of 500-nm-thick undoped BaSi2 epitaxial layers formed on Sb-doped n+-BaSi2/p+-Si heterostructures by molecular beam epitaxy using Si(001) substrates. The external quantum efficiency (EQE) reached approximately 5% when 1 V was applied between the top and bottom electrodes. However, the EQE decreased to approximately 0.2% after inserting a solid-phase-epitaxy crystalline Si (c-Si) layer between the undoped and Sb-doped n+-BaSi2 layers to prevent Sb diffusion during the growth of the undoped BaSi2 overlayer. This result was unexpectedly different from that obtained for BaSi2 layers on Si(111), where the c-Si layer improved the EQE significantly.

In-plane thermal conductivity of sub-20 nm thick suspended mono-crystalline Si layers

We measure the thermal conductivity of a 17.5-nm-thick single crystalline Si layer by using a suspended structure developed from a silicon-on-insulator wafer, in which the Si layer bridges the suspended platforms. The obtained value of 19 Wm−1 K−1 at room temperature represents a tenfold reduction with respect to bulk Si. This design paves the way for subsequent lateral nanostructuration of the layer with lithographic techniques, to define different geometries such as Si nanowires, nanostrips or phononic grids. As a proof of concept, nanostrips of 0.5 × 10 μm have been defined by focused ion beam (FIB) in the ultrathin Si layer. After the FIB cutting process with Ga ions at 30 kV and 100 pA, the measured thermal conductivity dramatically decreased to 1.7 Wm−1 K−1, indicating that the structure became severely damaged (amorphous). Re-crystallization of the structure was promoted by laser annealing while monitoring the Raman spectra. The thermal conductivity of the layer increased again to a value of 9.5 Wm−1 K−1 at room temperature, below that of the single crystalline material due to phonon scattering at the grain boundaries.

Ultrafast Optical Properties of Dense Electron Gas in Silicon Nanostructures.

We investigate the ultrafast dynamics of carriers in a silicon nanostructure by performing spectrally resolved femtosecond spectroscopy measurements with a supercontinuum probe. The nanostructure consists of a 158-nm-thick crystalline Si layer on top of which a SiO2 passivation layer leads to a very high quality of the Si surface. In addition, a dielectric function approach, including contributions from a Drude part and interband transitions, combined with the Transition Matrix Approximation is used to model the photogenerated carrier dynamics. The spectrotemporal reflectivity reveals two mechanisms. First, an electron–hole plasma is created by the pump pulse and lasts for a few picoseconds. Importantly, its spectral signature is either a positive or a negative change of reflectivity, depending on the probe wavelength. This is complementary to the already reported results obtained with degenerate frequency measurements. The second mechanism is a thermal diffusion of carriers which occurs during several hundreds of picoseconds. The overall dynamics at short and long delays in the whole visible spectrum is well explained with our model which shows that the main contribution to the reflectivity dynamics is due to the Drude dielectric function. The observation of this predominance of free carriers requires both a long lived high density of carriers as well as a little influence of surface scattering as provided by our thin crystalline Si layer with passivated Si/SiO2 interface.

Heteroepitaxial reflector for the fabrication of Si thin film photovoltaic devices

Thin film crystalline Si diodes are a viable solution to the goal of fabricating economical photovoltaic (PV) cells. A functional, light trapping, thin film PV was fabricated with a heteroepitaxial (YSZ) reflecting layer which also served as a complaint layer for the growth of crystalline Si or SiGe active layers. X-ray analysis confirmed that the deposited semiconductor layers were crystalline. It was observed that the light trapping PV cell formed with the YSZ reflector layer increased the short circuit current under illumination by 22% over that fabricated without the YSZ reflector layer. It was further observed that the surface texture in the YSZ layer contributed to both the ability to grow crystalline semiconductor layers and to act as an effective light trapping structure.

Structural investigation of ZnO:Al films deposited on the Si substrates by radio frequency magnetron sputtering

ZnO:Al films 400nm thick were prepared on (100) Si substrates by magnetron sputtering. Energy dispersive X-ray spectroscopy and transmission electron microscopy (TEM) revealed that in the initial stage of the deposition, an amorphous silicon oxide layer about 4nm thick formed from damage to the Si substrate due to sputtered particle bombardment and the incorporation of Si atoms with oxygen. Subsequently, a crystalline Si (Zn) layer about 30nm thick grew on the silicon oxide layer by co-deposition of Si atoms sputtered away from the substrate with Zn atoms from the target. Finally, a ZnO:Al film with columnar grains was deposited on the Si (Zn) layer. The sputtered particle bombardment greatly influenced the structure of the object films. The (0001) lattice fringes of the ZnO:Al film were observed in high-resolution TEM images, and the forbidden 0001 reflection spots in electron diffraction patterns were attributed to double diffraction. Therefore, the appearance of the forbidden reflection did not imply any ordering of Al atoms and/or O vacancies in the ZnO:Al film.

Method for Achieving CMOS MEMS Accelerometers with Excellent Built-in Thermal Stability and Reduced Charge Damage

ABSTRACTCapacitive CMOS MEMS sensors are usually defined by anisotropic dry etching processes (RIE and DRIE). These processes can provide clean and vertical sidewall geometry. However, during the dry-etching processes, charges are added to the gate electrodes of the on-chip MOSFET’s through metal pads and micro-structures, and the voltage may be raised to the level of breaking down the gate oxide, which leads to large leakage current and fails the circuit. On another hand, the thin spring beams in capacitive CMOS MEMS accelerometers suffer from in-plane curling and out-of-plane curling caused by stress gradient. Furthermore, the stress in the layers of MEMS structure is a function of temperature. Therefore, the in-plane curling and out-of-plane curling vary with temperature, leading to varying electrode coupling area in the sensing beams. This in turn causes variation in the sensitivity and the DC offset of sensors, meaning that usually the thermal stability of CMOS MEMS capacitive accelerometers is very poor. To cope with these problems, this work develops a new wafer-level post-CMOS process for fabricating thermally stable capacitive accelerometers. The resultant MEMS structures have high aspect ratio (e.g. 2-2.5 μm gaps versus 57 μm depth) and are insensitive to residual stress as well as temperature change. Excellent thermal stability was achieved intrinsically by making the crystalline Si layer in the sensors thick. Moreover, this process totally avoids the charge damage problem during the dry-etching procedure. For demonstration, an accelerometer sensor was fabricated by using the proposed process and was integrated with an on-chip sensing circuit in commercial 0.35 μm 2P4M CMOS process. High detection sensitivity of 595 mV/g and very low thermal variation of 1.68 mg/°C were successfully achieved.

Optimal design of a spectral readout type planar waveguide-mode sensor with a monolithic structure

Optical planar waveguide-mode sensor is a promising candidate for highly sensitive biosensing techniques in fields such as protein adsorption, receptor-ligand interaction and surface bacteria adhesion. To make the waveguide-mode sensor system more realistic, a spectral readout type waveguide sensor is proposed to take advantage of its high speed, compactness and low cost. Based on our previously proposed monolithic waveguide-mode sensor composed of a SiO2 waveguide layer and a single crystalline Si layer [1], the mechanism for achieving high sensitivity is revealed by numerical simulations. The optimal achievable sensitivities for a series of waveguide structures are summarized in a contour map, and they are found to be better than those of previously reported angle-scan type waveguide sensors.

Fast Light-Induced Solid Phase Crystallization of Nanometer Thick Silicon Layers on Quartz

Multi-quantum wells (MQW) with nanometer thick crystalline Si layers are considered among the promising light absorbers for application in the next generation of photovoltaic cells. Proper crystallization of the initially amorphous Si (a-Si) layers in such MQW presents a challenge. Recently it was shown that light-induced solid-phase crystallization (LISPC) leads to almost complete crystallization of Si layers in the MQW. In this report we present and discuss recent results, problems and prospects related to the large-scale LISPC process of MQW structures on glass.