Conventional Voltage Multiplier Research Articles

Multiple Input-Terminal Voltage Multiplier Circuit

Voltage multipliers (VMs) are widely used in applications with the high-voltage-gain rectifiers and dc/dc converters with the capability of increasing voltage conversion ratio. Currently, all the existing VM circuits are designed with two input terminals, while the optimal design on the voltage conversion ratio and voltage stress on the semiconductor devices of the converters with VMs can be achieved by varying the number of basic VM units. However, as the number of its input terminals is fixed and, thus, the current stress on the semiconductor devices are not adjustable at the design stage, such circuits have limited applications in today's high-power energy conversion systems. In order to address such drawbacks of the conventional VMs, a multiple input-terminal VM (MIVM) circuit is proposed in this article. The analysis of the operation principles and the performance characteristics of the proposed MIVM circuit are presented in detail. As an example, the application of the MIVM with the traditional boost converters is presented and discussed, and the efficacy of the theoretical analysis is validated experimentally.

Self-Regulated Reconfigurable Voltage/Current-Mode Inductive Power Management

A reconfigurable power management structure for inductive power delivery has been proposed by adaptively employing either resonant voltage or current mode (VM or CM) to improve the inductive power transmission performance against coils’ coupling distance (d), orientation ( $\phi $ ), and load impedance (R L ) variations. At the presence of these variations, unlike conventional VM and CM power managements with poor voltage- and power-conversion efficiencies (VCE and PCE), respectively, the proposed voltage/current-mode inductive power management (VCIPM) chip can achieve high VCE by automatically switching to CM when the receiver (Rx) coil voltage (V R ) is smaller than the required load voltage (V L ), and achieve high PCE by operating in VM when V R > V L . In addition, since VM and CM are only suitable for small and large R L within the range of hundreds of ohms and above, respectively, the VCIPM chip can extend the R L range. The VCIPM chip also eliminates the need for two off-chip capacitors by performing rectification, regulation, and over-voltage protection (OVP) in one step with one off-chip capacitor. In VM, intentional reverse current is employed for both voltage regulation and OVP, while the Rx coil switching frequency (f sw ) is adjusted for voltage regulation in CM. The theory behind the proposed VCIPM structure has been presented and validated by simulations and measurements. A VCIPM prototype chip was fabricated in a 0.35- $\mu \text{m}$ 2P4M standard CMOS process occupying 0.52-mm2 active area. In measurements, the VCIPM chip, operating at 1 MHz, achieved a high VCE of 4.1 V/V for R L of 100 $\text{k}\Omega $ by operating in CM with fsw = 166.6 kHz, and extended d and $\phi $ from 6 to 13.5 cm (125%) and 30° to 75° (150%), respectively, compared to its VM counterpart by adaptively switching from VM to CM.

A 0.18 $$\upmu$$ μ m CMOS voltage multiplier arrangement for RF energy harvesting

This work presents a two-stage voltage multiplier (VM) useful in RF energy harvesting based applications. The proposed circuit is based on the conventional differential drive rectifier, in which the input RF signal has been level shifted using a simple arrangement. This signal is then used to drive the next stage, which has been formed by using gate cross-coupled transistors. As a result, the load driving capability of the proposed architecture increases. The load in this work has been emulated in terms of a parallel RC circuit. The architecture has been implemented using standard 0.18 $$\mu$$ m CMOS technology. The measurements of the two-stage conventional VM (CVM) and proposed VM circuits were performed at ISM frequencies 13.56, 433, 915 MHz and 2.4 GHz for R $$_L$$ of values 1, 5, 10, 3 and 100 K $$\Omega$$ with a fixed value of C $$_L$$ equal to 20 pF. The performance evaluation has been done in terms of the power conversion efficiency (PCE) and average output DC voltage. The measured results show an improvement in PCE of 5% (minimum) for 13.56, 433 and 915 MHz frequencies, and up to 2% improvement for a frequency value of 2.4 GHz at the targeted load condition of 5 K $$\Omega ||$$ 20 pF, when compared with the measured results of the CVM circuit.

A Matrix-Like Topology for High-Voltage Generation

A new topology for high-voltage (HV) generation is proposed. While conventional voltage multipliers typically consist of a repetitive string of multiplying cells connected in cascade, we organize the multiplying cells in a multisection matrix topology. Thus, the voltage is boosted by voltage multiplication and also by transformer-like action resulting from the matrix configuration. Thanks to the topology variation (while maintaining the component count), the generated HV can be boosted by a factor of 2–4 and the ripple is reduced drastically. For example, under heavy load, we show an increase of the load voltage from 2.15 to 9.06 kV by reconfiguring a 12 link multiplier into a $4\times 3$ matrix. This reconfiguration also resulted in a voltage ripple decrease from 755 to 43 V.

High-voltage portable pulsed power supply fed by low voltage source

ABSTRACTThis article proposes a new structure of voltage multiplier for portable pulsed power applications. In this configuration, which is based on capacitor-diode voltage multiplier, the capacitors are charged by low AC input voltage and discharge through the load in series during pulse generation mode. The proposed topology is achieved by integrating of solid-state switches with conventional voltage multiplier, which can increase the low input voltage step by step and generate high-voltage high-frequency pulsed power across the load. After some discussion, simulations and experimental results are provided to verify the effectiveness of the proposed topology.

Modular switched capacitor voltage multiplier topology for pulsed power supply

Along with rapid advancement of power semiconductors, voltage multipliers have introduced new series of pulsed power generators. In this paper, based on conventional voltage multiplier and by using power electronics switches a new topology in high voltage pulsed power application is proposed. This topology is a modular circuit that can generate a high output voltage from a relatively low input voltage with fast rise time and adjustable frequency, pulse width, and voltage levels using a series connection of switched capacitor cells. A comparative analysis is carried out to show the advantages of proposed topology. Experimental and simulation results are presented to confirm the analysis.

SOI CMOS Voltage Multiplier Circuits with Body Bias Control Technique for Battery-Less Wireless Sensor System

Voltage multiplier (VM) circuits for RF (2.45GHz)-to-DC conversion are developed for battery-less sensor nodes. Converted DC power is charged on a storage capacitor before driving a wireless sensor module. A charging time of the storage capacitor of the proposed VM circuits is reduced 1/10 of the conventional VM circuits, because they have constant current characteristics owing to self-control of body bias in diode-connected SOI MOSFETs. The wireless sensor system composed of the fabricated VM chip and a commercially available sensor module is operated using an RF signal of a wireless LAN modem (2.45GHz) as a power source.

Design and Operation of 1000-fold Voltage Multiplier based on Double-flux-quantum Amplifier

Abstract Rapid-single-flux-quantum digital-to-analogue converters (RSFQ-DACs) are now under development for ac voltage standard applications. The voltage multiplier (VM), which precisely amplifies the input voltage, is a key component for RSFQ-DACs. Because the amount of bias current for a conventional VM increases in proportion to its multiplication factor, we have been looking for a VM device which is operated on a different principle. In this paper, we report our design of a 1000-fold VM comprising double flux quantum amplifiers (DFQAs) of which the amount of bias current is independent of its multiplication factor. Test circuits were fabricated using a 2.5 kA/cm 2 Nb process. We confirm that the experimental results demonstrate the 1000-fold operation up to 13.2 GHz input SFQ pulse repetition frequency.

Rethink the virtual machine template

Server virtualization technology facilitates the creation of an elastic computing infrastructure on demand. There are cloud applications like server-based computing and virtual desktop that concern startup latency and require impromptu requests for VM creation in a real-time manner. Conventional template-based VM creation is a time consuming process and lacks flexibility for the deployment of stateful VMs. In this paper, we present an abstraction of VM substrate to represent generic VM instances in miniature. Unlike templates that are stored as an image file in disk, VM substrates are docked in memory in a designated VM pool. They can be activated into stateful VMs without machine booting and application initialization. The abstraction leverages an arrange of techniques, including VM miniaturization, generalization, clone and migration, storage copy-on-write, and on-the-fly resource configuration, for rapid deployment of VMs and VM clusters on demand. We implement a prototype on a Xen platform and show that a server with typical configuration of TB disk and GB memory can accommodate more substrates in memory than templates in disk and stateful VMs can be created from the same or different substrates and deployed on to the same or different physical hosts in a cluster without causing any configuration conflicts. Experimental results show that general purpose VMs or a VM cluster for parallel computing can be deployed in a few seconds. We demonstrate the usage of VM substrates in a mobile gaming application.

Performance Analysis of Symmetric Multistage Voltage Multipliers

A performance study of a 3-phase symmetric Cockcroft-Walton (CW)-multistage voltage multiplier (VM) is proposed. It consists of 1 smoothing column and 6 oscillating columns. The oscillating columns are connected to a 3-phase power through center-tap transformers. The capacitors of the smoothing column are charged 6 times per cycle by 6 oscillating columns and are discharged 6 times through the load, unlike the conventional symmetric VM in which they are charged and discharged twice per cycle. The 3-phase symmetric structure completely eliminates the first 5 harmonic components of load-generated voltage ripple. Theoretic analysis indicates that the proposed 3-phase symmetric CW-VM has one-third the voltage ripple and voltage drop of the conventional single-phase symmetric CW-VM. Simulation results of the proposed 3-phase symmetric CW-VM as well as those of the conventional single-phase symmetric CW-VM are presented. A comparison shows that the 3-phase symmetric CW-VM has significantly less voltage ripple, half the voltage drop, and a 4-fold increase in the output power over the conventional single-phase symmetric CW-VM.

A Three-Phase Symmetrical Multistage Voltage Multiplier

A three-phase symmetrical Cockcroft-Walton (CW) multistage voltage multiplier (VM) is proposed. It consists of one smoothing column and six oscillating columns. The oscillating columns are connected to three-phase power through center-tap transformers. The capacitors of the smoothing column are charged six times per cycle by six oscillating columns and are discharged six times through the load, unlike the conventional symmetrical VM in which they are charged and discharged twice per cycle. The three-phase symmetrical structure completely eliminates the first five harmonic components of load-generated voltage ripple. Theoretical analysis indicates that the proposed three-phase symmetrical CW-VM has one-third the voltage ripple and voltage drop of the conventional single-phase symmetrical CW-VM. Experimental and simulation results of the proposed three-phase symmetrical CW-VM as well as of the conventional single-phase symmetrical CW-VM are presented. A comparison shows that the three-phase symmetrical CW-VM has significantly less voltage ripple, half the voltage drop, and a fourfold increase in output power over the conventional single-phase symmetrical CW-VM.