Conventional Silicon Nanowire Research Articles

Electrostatically formed nanowire (EFN) transistor—An ultrasensitive VOC and gas sensor

The perpetual need for high-performance volatile organic compound (VOC) sensors remains prevalent across diverse sectors including environmental health monitoring, industrial operations, and medical diagnostics. Within this context, the electrostatically formed nanowire (EFN) sensor, a silicon-on-insulator-based multiple-gate field-effect transistor, is an ultrasensitive and selective VOC and gas sensing platform. Unlike conventional silicon nanowires (also known for their superior sensitivity to chemical species), in EFN, the nanowire is defined electrostatically post-fabrication through appropriate biasing of the surrounding gates. The fabrication of the EFN leverages established CMOS compatible silicon processing technologies, facilitating the production of inexpensive, scalable, and robust sensors. By precisely controlling gate biases, a conductive channel with a tunable diameter is formed, allowing for the formation of nanowire with diameter below 20 nm. The adjustable size and shape of the nanowire offer tunable sensing parameters, including sensitivity, limit of detection, and dynamic range. The multiple parameters also yield a unique fingerprint for each VOC, thus enabling selective detection of VOCs. By simply altering the biasing configuration, a single EFN sensor can achieve high sensitivity and a broad dynamic range, which is limited in the case of physically defined silicon NW sensors. This review provides a comprehensive overview encompassing the EFN sensor's design, fabrication considerations, process flow, electrical characterization methods, sensing performances to VOCs, and gases at room temperature. Moreover, the scope of advanced sensor designs with array of EFN sensors and integrated heaters is also discussed. Finally, some future perspectives of this technology are presented.

Analysis fin field-effect transistor design with high-k insulators

In this article, we integrate a Fin Field Effect Transistor with high-k insulators to investigate the optimal design for chemical field effect transistors in order to give higher inductance (resulting in a higher transmission relationship), improved amplitude, and outcome-based substance. pH sensing was utilised to test the design. We investigated the responsiveness and linearity of silicon dioxide, oxide, and hafnium oxide as pH-sensing electromagnetic materials, as well as their chemical resistance in various acids. The device’s huge component ratio and fin shape allow for high currents and a more dependable planar conducting channel than conventional silicon nanowires. The hafnium oxide Fin Field Effect Transistor architecture delivered the greatest results, with the most linear features of generation and turnover and a broader dynamic range. The chemical stability of hafnium oxide was also the best. As a result, we believe the large component ratio Fin Field Effect Transistors/high-k dielectric combination can provide the optimal process fairness for Field-Effect Transistor-based sensors. The authors propose a novel seamless embedded induction approximation with a quaternary resonator. Only one deleterious modified divergent voltage current conveyor, one of the suggested quaternary synthesisers, uses a Z input, a rectifier, and two crossed capacitive. In the intended unidirectional isolated circuit emulator, just one customised split electrical output feeder with a sole Z electrode, two switches, and the first neutral capacitor are used. The suggested seamless rooted circuit simulation just requires a specific passive constituent compatibility criterion. In addition, the suggested lossless grounded inductor simulator yields a ring filter application. To illustrate the performance of all the circuits, a variety of models using the LTSPICE software, the cadence virtuoso 7nm parameter, and data analyses were performed.

Enhanced thermoelectric properties of cobalt silicide-silicon heterostructured nanowires

Silicon nanowires (SiNWs) have attracted attention as promising high efficiency thermoelectric materials by significantly improving the thermoelectric efficiency of silicon. Here, we have fabricated cobalt silicide/silicon heterostructure on both ends of nanowires using self-aligned silicide (salicide) process. By forming cobalt silicide (CoSi2) layer on SiNWs, the thermal conductivity of SiNWs with diameters of 200, 350, and 500 nm decrease to 25.1, 31.3, and 38.1 W·m−1·K−1, respectively, which is about 8% reduction on average. Since the phonon nanoinclusion scattering is influenced by the density of the nanoinclusions, the thermal conductivity tends to decrease as the volume fraction of CoSi2 in SiNWs increases. The Seebeck coefficient of the heterostructured nanowires increases to 255 μV/K, which is mainly attributed to the low-energy charge carrier filtering effect due to the Schottky barrier at the CoSi2/Si interfaces. The measurements show that the figure-of-merit ZT of the heterostructured nanowires is improved by 10% on average compared with the conventional SiNWs. Consequently, the CoSi2/Si heterostructured nanowires enhance the thermoelectric properties of SiNWs effectively by suppressing phonon transport and improving electron flow.

Fabrication of a Silicon Nanowire Solar Cell on a Silicon-on-Insulator Substrate

This study proposes metal-assisted chemical etching (MAE) as a facile method to fabricate silicon nanowire (SiNW) array structures, with high optical confinement for thin crystalline silicon solar cells. Conventional SiNW arrays are generally fabricated on Si wafer substrates. However, tests on conventional SiNW-based solar cells cannot determine whether the photo-current is derived from SiNWs or from the Si wafer. Herein, SiNW arrays were fabricated on a silicon-on-insulator substrate with a 10-μm-thick silicon layer for measuring the photocurrent of the SiNW only. The 9 μm-long p-type SiNW arrays were applied to a solar cell structure fabricated using an n-type H-doped amorphous Si layer, thereby confirming the photovoltaic effect. However, the device exhibited a conversion efficiency of 0.0017% because of a low short-circuit current (Jsc) and a low open-circuit voltage (Voc). The low Jsc resulted from a high series resistance and high absorption loss from the amorphous Si layer, whereas the low Voc resulted from the high surface recombination velocity of the SiNW array structure. Therefore, reducing the surface recombination of SiNW-based solar cells can improve their conversion efficiency.

Novel approach for improving the performance of Si-based anodes in lithium-ion batteries

Herein, we report successful deposition of aluminum oxide films on the silicon nanowires (SiNWs) to realize core–shell silicon-based lithium-ion battery anodes. By means of reactive ion etching, it has been possible to form an ultra-thin layer of Al2O3 on SiNWs through hydrogen plasma. This deposition technique leads to the formation of tiny holes on the surface of the Al2O3 layer while introducing the pore sites into the inner silicon material without damaging the whole structure. SiNW@Al2O3 core–shell nanostructures were used as the effective anode materials and showed a superior electrochemical performance compared to conventional SiNWs. Our electrode exhibited the high first cycle specific discharge capacity of 3936 mAh g−1 at a rate of C/16 as well as high rate capability. Furthermore, this anode electrode showed less than 6% degradation of specific capacity over 120 cycles at high rate density of 2C and it delivers high reversible capacity of 965 mAh g−1. The improvement in the electrochemical properties of our electrode is achieved due to both a high specific capacity of Si core and the effect of aluminum oxide shell on active material cycling stability.

Quantum analysis based extraction of frequency dependent intrinsic and extrinsic parameters for GEWE-SiNW MOSFET

This paper examines the bias-independent and bias-dependent extrinsic and intrinsic parameters of the gate electrode workfunction engineered (GEWE) silicon nanowire (SiNW) metal---oxide---semiconductor field-effect transistor (MOSFET) by considering quantum effects. The results reveal that the effect of extrinsic parameters such as the resistance, capacitance, and inductance of the electrodes is less pronounced in the GEWE-SiNW compared with the conventional SiNW or conventional MOSFET. The intrinsic transconductance of the GEWE-SiNW device can be further improved by tuning the gate metal workfunction difference, which results in shorter time constant and lower parasitic capacitance, making it suitable for radiofrequency integrated circuit (RFIC) design. It is also observed that, in the saturation region, the device exhibits improved transconductance and noticeable reduction in $$C_{\mathrm{sdx}}$$Csdx [due to drain-induced barrier lowering (DIBL)] but the parasitic capacitance and time constant also reduce. In addition, a non-quasi-static small-signal model has been studied in terms of Z and Y parameters; the results show good agreement with the results of three-dimensional (3D) simulations at thousands of GHz.

Investigation of temperature variations on analog/RF and linearity performance of stacked gate GEWE-SiNW MOSFET for improved device reliability

In this paper, reliability issues of Stacked Gate (SG)-Gate Electrode Workfunction Engineered (GEWE)-Silicon Nanowire (SiNW) MOSFET is examined over a wide range of ambient temperatures (200–600K) and results so obtained are simultaneously compared with conventional SiNW and GEWE-SiNW MOSFET using 3D-technology computer aided design quantum simulation. The results indicate that two temperature compensation points (TCP) are obtained: one for drain current (Ids) and other for cut-off frequency (fT) where device Figure Of Merits (FOMs) become independent of temperature, and it is found at 0.65V in SG-GEWE-SiNW in comparison to other devices, hence will open opportunities for wide range of temperature applications. Furthermore, significant improvement in Analog/RF performance of SG-GWEW-SiNW is observed in terms of Ion/Ioff, Subthreshold Swing (SS), device efficiency, fT, noise conductance and noise figure as temperature reduces. It is also observed that at low temperature SG-GEWE-SiNW unveils highly stable linearity performance owing to reduced distortions. These results explain the improved reliability of SG-GEWE-SiNW at low temperatures over GEWE-SiNW MOSFET.

Specific and label-free femtomolar biomarker detection with an electrostatically formed nanowire biosensor

We report a specific, label-free and real-time detection of femtomolar protein concentrations with a novel type of nanowire-based biosensor. The biosensor is based on an electrostatically formed nanowire, which is conceptually different from a conventional silicon nanowire in its confinement potential, charge carrier distribution, surface states, dopant distribution, moveable channel and geometrical structure. This new biosensor requires standard integrated-circuit processing with relaxed fabrication requirements. The biosensor is composed of an accumulation-type, planar transistor surrounded by four gates, a backgate, front gate and two lateral gates, and it operates in the all-around-depletion mode. Consequently, adjustment of the four gates defines the dimensions and location of the conducting channel. It is shown that lithographically shaped channels of 400 nm in width are reduced to effective widths of 25 nm upon lateral-gate biasing. Device operation is demonstrated for protein-specific binding, and it is found that sensitive detection signals are recorded once the channel width is comparable with the dimensions of the protein. The device performance is discussed and analyzed with the help of three-dimensional electrostatic simulations. A team of researchers from Israel, led by Yossi Rosenwaks at Tel Aviv University, has devised a facile route towards nanowire-based, label-free biosensors. These sensors have recently garnered interest for applications in biological species such as proteins, DNA or viruses: the presence of the target molecule is detected and converted into an electrical signal. But bottom-up strategies to prepare the nanowires are difficult to scale-up, while top-down approaches involve a relatively complex process. In contrast, the biosensor devised by Rosenwaks and co-workers is organized around a nanowire-like conducting channel that is formed electrostatically after device fabrication. The rectangular device comprises four gates at each extremity and these form depletion regions between which the channel is defined. Biomolecules are then detected with a sensitivity that depends on the size, shape and location of the channel — the presence of proteins was successfully determined at femtomolar concentrations. This combined approach brings together good performance with standard integrated circuit processing and holds great promise for real-time diagnostic applications. Biological sensing with silicon nanowires has drawn much attention due to the enhanced sensitivity of these devices. However, both bottom-up and top-down fabrication techniques are thus far resistant to commercialization, mainly due to the incompatibility of the bottom-up methodology with mass production and the non-standard, top-down process complexity. We report on a specific, label-free, and real-time detection of femtomolar protein concentrations with a novel type of nanowire-based biosensor. The biosensor is based on an electrostatically formed nanowire that requires standard integrated circuit processes with relaxed fabrication requirements.

RF Performance and Small-Signal Parameter Extraction of Junctionless Silicon Nanowire MOSFETs

This paper presents a radio-frequency (RF) model and extracted model parameters for junctionless silicon nanowire (JLSNW) metal-oxide-semiconductor field-effect transistors (MOSFETs) using a 3-D device simulator. JLSNW MOSFETs are evaluated for various RF parameters such as cutoff frequency <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">fT</i> , gate input capacitance, distributed channel resistances, transport time delay, and capacitance by the drain-induced barrier lowering effect. Direct comparisons of high-frequency performances and extracted parameters are made with conventional silicon nanowire MOSFETs. A non-quasi-static RF model has been used, along with SPICE to simulate JLSNW MOSFETs with RF parameters extracted from 3-D-simulated <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Y</i> -parameters. The results show excellent agreements with the 3-D-simulated results up to the high frequency of <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">fT</i> .

Investigations on the physical limitation and electrostatic improvement of a gate-all-around silicon nanowire transistor with Schottky barrier source/drain

The electrostatics of Schottky barrier (SB) source/drain (S/D) silicon nanowire transistors (SB-NWTs) are investigated in comparison with the conventional silicon nanowire transistors (SNWTs). The SB-NWTs are found to have degraded transfer/output properties, unacceptably large linear-region resistance (Rlin) and non-uniform gate controllability in the sub-threshold region. With low S/D Schottky barrier height and effective tunneling mass, the electrostatic properties of SB-NWTs can be enhanced. However, quantitative assessment shows that the enhancement is limited by the fact that the sub-threshold swing of SB-NWTs cannot prevail over that of SNWTs, and unexpected degradation in drain-induced barrier lowering (DIBL) as well as device scalability can be induced. It is also shown that, even under the most optimized condition, the Rlin of SB-NWTs is still larger than that of SNWTs, if the S/D extension (SDE) length of the standard SNWTs is designed to be short enough. It is shown that, from the point of electrostatic improvement, the replacement of SNWTs by SB-NWTs cannot be promising. The physics and effectiveness of Schottky barrier modulation approaches, such as dopant segregation and Fermi-level depinning, are also discussed.