Conventional Printed Circuit Board Research Articles

Deep Learning Based Defect Detection Research on Printed Circuit Boards

Abstract As computer vision and deep learning detection techniques advance rapidly, their use in identifying defects has become more common across various industries. The significance of Printed Circuit Boards (PCBs) in contemporary electronic devices is undeniable, as they substantially influence the functionality and durability of these products. Thus, utilizing deep learning models for identifying flaws in Printed Circuit Boards (PCBs) is of particular importance. The focus of this study is primarily on examining PCB defect identification utilizing deep learning techniques. Firstly, it introduces the importance and development history of PCBs in the electronics and information industry. It then offers a comprehensive review of the existing research on conventional PCB defect detection approaches alongside methodologies grounded in deep learning. Following that, the structure of the YOLOv8 object detection model and its key technologies are elaborated. Lastly, the superior performance of YOLOv8 in PCB defect detection tasks is verified through comparative experiments. According to the evaluation metrics of the algorithm, the average detection accuracy reaches 92.3%, and the Frames Per Second (FPS) value reaches 157.2, meeting the accuracy requirements for PCB defect detection in the industrial domain.

Through-polymer, via technology-enabled, flexible, lightweight, and integrated devices for implantable neural probes

In implantable electrophysiological recording systems, the headstage typically comprises neural probes that interface with brain tissue and integrated circuit chips for signal processing. While advancements in MEMS and CMOS technology have significantly improved these components, their interconnection still relies on conventional printed circuit boards and sophisticated adapters. This conventional approach adds considerable weight and volume to the package, especially for high channel count systems. To address this issue, we developed a through-polymer via (TPV) method inspired by the through-silicon via (TSV) technique in advanced three-dimensional packaging. This innovation enables the vertical integration of flexible probes, amplifier chips, and PCBs, realizing a flexible, lightweight, and integrated device (FLID). The total weight of the FLIDis only 25% that of its conventional counterparts relying on adapters, which significantly increased the activity levels of animals wearing the FLIDs to nearly match the levels of control animals without implants. Furthermore, by incorporating a platinum-iridium alloy as the top layer material for electrical contact, the FLID realizes exceptional electrical performance, enabling in vivo measurements of both local field potentials and individual neuron action potentials. These findings showcase the potential of FLIDs in scaling up implantable neural recording systems and mark a significant advancement in the field of neurotechnology.

A Broadband Transmitarray Antenna Using a Metasurface-Based Element for Millimeter-Wave Applications.

In this manuscript, a broadband transmitarray antenna (TA) using a metasurface-based element is presented for millimeter-wave communication applications. The metasurface-based TA element adopts a receiver-transmitter configuration: metasurfaces are applied as the receiver and transmitter, and slot-coupled differentially fed striplines are used as the phase compensation. The designed TA element achieves good transmission performance with a more than 360° transmission phase shift range and less than 1-dB transmission insertion loss within a wide frequency range. To verify the proposed TA, a prototype is fabricated based on the conventional printed circuit board (PCB) process, and a pyramid horn is designed as the source. The measured results show that the proposed TA with the differential feed network presents a 1-dB gain bandwidth of 26.2% from 23.5 to 30.5 GHz and a peak gain of 24.5 dBi. The designed TA is a promising alternative for millimeter-wave communications applications because of its high gain, broad bandwidth, low costs, and convenient integration with other circuits.

Methodology for choosing the optimal layout of multilayer printed circuit boards taking into account external mechanical influences

Formulation of the problem. radio-electronic modules on multilayer printed circuit boards (PCB) are characterized by an extremely complex design. When creating such modules, it is necessary to take into account, often extremely contradictory, requirements for the placement of components on the surface, taking into account thermal criteria, requirements for vibration strength and electromagnetic compatibility. Special-purpose radio equipment is often placed in blocks of a "cassette" design, which has a feature in fixing the PCB. Unlike conventional printed circuit boards, in this design, the PCB can only be fixed at the edges, so the placement of components, especially those with a large area, for example, such as microcircuits in BGA, QFP, QFN, PLCC packages, must be given great attention, as this affects mechanical strength and performance of the device. Purpose. Improving the efficiency of the design process of radio-electronic modules by rational placement of components on the PCB of a "cassette" design. Identification of areas with the highest mechanical stresses and deflections. Results. It was found that on the PCB of a "cassette" design, when it is fixed only around the perimeter, there are areas with increased deflections, where the installation of components with a large area is undesirable, since this leads to the destruction of the solder joint and the failure of the device. The board can be conditionally divided into nine areas with an aspect ratio of a/4 and b/4, where a, b are the length and width of the board. Experimentally, the most loaded areas of the MPP and areas that have the least impact on the component during external vibration were identified. Practical significance. A method for placing components on the PCB of a "cassette" design is proposed, which makes it possible to reduce the negative effects of external vibrations and static loads.

MmWave self-beam-tilting antenna array with low complexity and wide coverage

This paper proposes an effective planar mmWave switched beamforming antenna array with low complexity and wide beam coverage. The proposed structure is configured using multiple linearly polarized self-beam-tilting-antenna (SBTA) elements, eliminating the requirement of a phase-adjustable block for beamforming. Each SBTA element can generate different main beam directions by itself without using complicated feed networks. Moreover, unlike typical Butler matrix-based beamforming arrays, the proposed SBTA array does not require passive hybrid couplers to adjust the phases for beamforming operations. Accordingly, the proposed feed network-less antenna avoids circuit complexity, feed network insertion losses, or increases in size and fabrication costs, rendering it suitable for mmWave compact antenna applications. To verify the proposed concept and beamforming performance, a 1 × 4 SBTA array was fabricated at 28 GHz using a conventional printed circuit board (PCB) process. The size of the fabricated antenna (excluding test connectors) was 1.12 λ0 × 1.68 λ0 × 0.08 λ0 (λ0 for free-space wavelength), and the measured 10-dB impedance bandwidth was approximately 5.9 %. Furthermore, the measured main beam switching directions were found at −34°, −52°, +51°, and +38° with measured gains of 6.7, 6.1, 5.9, and 6.6 dBi, respectively, at 28 GHz.

Pin-on-Substrate Gap Waveguide: An Extremely Low-Cost Realization of High-Performance Gap Waveguide Components

Considering the limitations of currently available technologies for the realization of microwave components and antennas, a trade off between different factors including the efficiency and fabrication cost is required. The main objective of this letter is to propose a novel method for the realization of gap waveguides (GWGs) that take advantage of conventional printed circuit board fabrication technology, thus are low cost and light weight. Moreover, by avoiding dielectric loss and minimizing conductive loss, the proposed GWGs benefit from a very low loss. To highlight potential applications, a high-performance slot-array antenna based on the proposed GWG is presented.

A low‐profile planar end‐fire broadband antenna with wide beamwidth

AbstractA low‐profile planar end‐fire broadband antenna with wide beamwidth is presented. The proposed antenna consists of a grounded coplanar waveguide (GCPW), an antipodal dipole, and a pair of directors. A transition from the GCPW to the substrate integrated waveguide (SIW) with tapered coupling slots is designed to achieve a wide impedance bandwidth. Wide beamwidths of the proposed antenna are realised through the antipodal dipole with bilaterally symmetrical sector arms. A pair of directors are symmetrically located on both sides of the sector arms to further widen the beamwidth. An antenna prototype operating at Ka band with a size of 2.18 λ0 × 0.77 λ0 × 0.06 λ0 (λ0 is the wavelength of the centre frequency) is fabricated based on the conventional printed circuit board process. The measurement results show that the reflection coefficient is lower than −12.5 dB in the frequency range of 32.2–37.0 GHz. At 35.5 GHz, the peak gain is 3.8 dBi, and the half‐power beamwidths (HPBWs) in E‐plane and H‐plane are 116° and 215°, respectively.

Hybrid Absorber With Dual-Band Performance and High Absorption Rate

Low-profile absorbers are of interest for compact shielded enclosures for making antenna measurements. Furthermore, the cost should be minimized for practical systems since massive production is required. In this work, a novel dual-band hybrid absorber based on structured resonators and lossy dielectric material is proposed to meet these requirements. The lossy material enables improvement in the absorption rate and operating bandwidth. The proposed absorber operates at 2.4- and 5.0-GHz Wi-Fi spectra and covers the low-frequency bands with a reflection coefficient lower than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$-$</tex-math></inline-formula> 25 dB and a large part of the high-frequency ones with reflection lower than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$-$</tex-math></inline-formula> 20 dB. Moreover, some of the Wi-Fi bands are covered with a reflection coefficient better than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$-$</tex-math></inline-formula> 30 dB. In order to validate the proposed concept, the dual-band absorber is manufactured and tested, and the agreement between the simulation and measurement results is good. The presented structure is cost-effective since it only uses conventional printed circuit board (PCB) technology for manufacturing and commercial lossy dielectric material.

Identifying sustainable applications for printed electronics using the multi-perspective application selection approach

Printed electronics are manufactured using additive methods and are envisioned as "green", low-cost, energy-efficient, and sustainable alternatives to present-day electronics. The present Multi-perspective Application Selection (MPAS) assessment aims to assess the current state of technology and evaluate the products in which applications of printed electronics would be feasible. The MPAS is a multi-stage tool apt for decision-making and identifying technologically feasible and environmentally sustainable applications of novel technologies.The first step of the MPAS process involved the identification of all possible products in which printed electronics may replace conventional printed circuit boards (PCBs). For the same, 11 application categories of electrical and electronic equipment were considered. Then, by assessing the user acceptance criteria for each specific application category, unsuitable applications were filtered out from the study. Only those application categories with achievable user acceptance criteria were preselected as promising applications for printed electronics. The final evaluation step considered the technical and sustainability advantages of replacing PCBs with printed electronics in the specific products within the preselected application categories.Thus, the MPAS yielded conventional low-voltage and low-frequency electronics applications with medium-low lifetimes (specifically clocks, toys, personal medical tests, radios, keyboards, mice, and calculators) as technically feasible and sustainable product applications for printed electronics. Furthermore, novel printed electronic products (such as smart posters, pamphlets, packaging, etc.) were also found to be suitable applications; however, management of the large quantities of waste generated from such applications is recognized as a concern.

The need for design-for-recycling of paper-based printed electronics – a prospective comparison with printed circuit boards

The present study compares conventional printed circuit boards (having glass-fibre and epoxy substrates and etched copper circuits) with paper-based printed electronics (offering flexible, bio-based, and biodegradable substrates with circuit design printed using silver-based inks) and assesses the relevance of e-waste recycling to the latter's sustainability. Therefore, a comparative life cycle assessment between these two options has been undertaken and the global warming impacts were calculated.The impact assessment results underscore that printed electronics offer a consistent sustainability advantage over printed circuit boards only through recycling of silver in the former at the end-of-life. Hence, design-for-recycling and recycling as e-waste are crucial to the sustainability of the current generation of printed electronics. Other foreseen waste treatment options for paper-based printed electronics, such as composting, and paper recycling, are likely to limit the sustainability advantage of printed electronics to circuits with small conductive areas.

Aerosol Jet Printing and Interconnection Technologies on Additive Manufactured Substrates

Nowadays, digital printing technologies such as inkjet and aerosol jet printing are gaining more importance since they have proven to be suitable for the assembly of complex microsystems. This also applies to medical technology applications like hearing aids where patient-specific solutions are required. However, assembly is more challenging than with conventional printed circuit boards in terms of material compatibility between substrate, interconnect material and printed ink. This paper describes how aerosol jet printing of nano metal inks and subsequent assembly processes are utilized to connect electrical components on 3D substrates fabricated by Digital Light Processing (DLP). Conventional assembly technologies such as soldering and conductive adhesive bonding were investigated and characterized. For this purpose, curing methods and substrate pretreatments for different inks were optimized. Furthermore, the usage of electroless plating on printed metal tracks for improved solderability was investigated. Finally, a 3D ear mold substrate was used to build up a technology demonstrator by means of conductive adhesives.

GaN-Based Multichip Half-Bridge Power Module Integrated on High-Voltage AlN Ceramic Substrate

Power electronic systems employing wide-bandgap GaN transistors promise high efficiency operation and power density but require minimized parasitic circuit elements and an effective cooling concept. This article presents a half-bridge module integrating two 600 V/170 mΩ gallium nitride (GaN) high-electron mobility transistors with their gate drive stages and a fraction of the dc-link capacitance on a patterned multilayer polycrystalline AlN-substrate. The high-voltage isolation at a layer distance of 10 μm and a dense chip-by-chip integration on the GaN half-bridge module enable a compact lateral commutation loop design combined with improved cooling capability of the power transistors. Consequently, the GaN half-bridge module allows for higher load currents at lower device temperature while most parasitic circuit elements are reduced compared to a conventional printed circuit board (PCB) design. The parasitic circuit elements of the GaN half-bridge module and a reference four-layer PCB half-bridge are evaluated using 3D-FEM field simulation and in-circuit measurements. Selected finite element method (FEM) simulation results are validated by <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</i> -parameter measurements and further used to parametrize a lumped commutation loop model. The thermal characterization of the GaN half-bridge module validates the improved cooling capability of the GaN half-bridge power module. Transient switching characteristics are studied in hard-switching mode. The device temperature and converter efficiency are evaluated in dc/dc buck-converter operation.

Thin PDMS-on-Sacrificial-PCB Devices

Poly(dimethylsiloxane) (PDMS) devices must often be so thin (e.g., <100 μm) and, therefore, so fragile that their mechanical release becomes challenging. As a simple solution, PDMS devices are frequently released by dissolving an underlying sacrificial resist. However, there may be several other issues, including temperature gradients during fabrication, electrical characterization, handling, co-integration with electronics, fabrication time, and cost. Here, we show that conventional printed circuit boards (PCBs) can be ideal sacrificial carriers, which can also perform useful functions during fabrication. The thick (e.g., 35 μm) and thermally conductive PCB copper layer behaves as an excellent heat spreading plate during temperature-sensitive process steps (e.g., PDMS curing and sintering of conductive inks) and enables pre-release electrical stimulations and characterizations of PDMS, which may help during process development. Experiments and finite element method (FEM) simulations confirm that the PCB copper layer can improve temperature uniformity. The UV-protecting film attached to the PCB can be cut to constitute a frame for easy handling. The PCB photoresist enables the straightforward release of PDMS by acetone, which is among the most environmentally friendly chemicals. Contacts can be opened by a simple bump-cut-peel strategy. As proofs of concept, we demonstrate pre-release capacitive characterization of PDMS for evaluating the ability to fabricate thin, but uniform and robust devices and post-release resistive characterization of stretchable strain sensor or interconnects encapsulated in PDMS. The proposed approach is simple, cheap, and environmentally friendly, can improve temperature uniformity throughout the pre-release process steps, enables pre-release electrical characterizations, can simplify co-integration with electronics and can be generalized to other elastomers.

Direct flip-chip bonding of bare dies to polypropylene-coated paper substrates without adhesives or solders

Paper-based electronics is an emerging concept with the prospect of developing recyclable, low cost, flexible, and green products such as paper displays, smart labels, RFID tags, smart packages, electronic magazines, biological and medical devices. Compared to conventional printed circuit board (PCB) materials, utilizing paper as an electronics substrate has both physical and chemical challenges. Nowadays, the integration of components on papers are mainly conducted using adhesives [such as anisotropic conductive paste (ACP), isotropic conductive paste (ICP), and non-conductive pastes (NCP)] or low-temperature solders. The application of adhesives and solders in a roll-to-roll fabrication line of papers requires an additional dispensing or printing unit, which has its own drawbacks. Therefore, alternative approaches such as pre-applied adhesive films either on bare dies or papers can gain significant attention. In this study, by exploiting the unique properties of a paper coating material (i.e., polypropylene) as a non-conductive adhesive, it was shown that direct flip-chip bonding of the bare dies and devices could be successfully performed on paper without using any additional adhesives or solders. The electrical and mechanical performance of the flip chip-bonded dies on the polypropylene-coated paper substrate were assessed utilizing daisy-chain contact resistance measurement and die-shear analysis, respectively. Moreover, for an RFID tag application, RFID chips were flip chip bonded to the coated papers and functional tests via NFC communication were also successfully exerted. It was concluded that the polypropylene film on the paper can be considered as an intrinsic NCP layer for flip-chip integration of bare dies.

Analysis of Septuple-Band NGD Circuit Using an E-Shaped Defected Microstrip Structure and Two T-Shaped Open Stubs

In this article, a compact distributed septuple-band negative group delay circuit (NGDC) is proposed and analyzed. It is mainly composed of a high–low–high step-impedance microstrip line with an E-shaped groove and two T-shaped open stubs. This NGDC was first simulated and then fabricated by using a conventional printed circuit board (PCB) process with the substrate of RO4350. To investigate the operational mechanism of the NGDC, an equivalent circuit, consisting of nine transmission lines, four series–parallel <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> resonant circuits, and two T-type series <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> resonant circuits, has been developed and analyzed. It is found that the theoretical group delay characteristic calculated from the equivalent circuit agrees well both with the simulated data by using ADS as well as HFSS and with the experimental results. The measured seven NGD resonant frequencies occur at 2.03, 2.84, 8.14, 8.74, 13.0, 16.02, and 18.46 GHz, and the corresponding NGD values read −3.65, −3.04, −1.73, −3.23, −1.16, −1.20, and −1.47 ns. The dimensions of the presented passive NGDC are only 25 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times22$ </tex-math></inline-formula> mm without using any lumped components.

A Reconfigurable Multisensor Based on Printed Circuit Board Technology for Measuring Moisture Content and Temperature in Stored Grain

We present the design and fabrication of a reconfigurable smart-sensor for measuring moisture content (MC) and temperature in grains stored in silos, using a capacitance fringing field interdigitated sensor and using a resistance temperature detector (RTD), both implemented on a single conventional printed circuit board. The sensor was tested in laboratory, using corn kernels with percent MC in the range of MC <inline-formula> <tex-math notation="LaTeX">$= 8\%$ </tex-math></inline-formula> to MC <inline-formula> <tex-math notation="LaTeX">$= 32 \%$ </tex-math></inline-formula> and, using a simple relaxation oscillator and a frequency-to-voltage converter, we measured a capacitance variation of <inline-formula> <tex-math notation="LaTeX">$\Delta C = 4.99$ </tex-math></inline-formula> pf, with a sensitivity <inline-formula> <tex-math notation="LaTeX">$S = 0.21 \, \rm {pF}/\%$ </tex-math></inline-formula>MC. The RTD sensor, which uses the copper resistance of the PCB tracks, was characterized in the 10 <inline-formula> <tex-math notation="LaTeX">$^\circ \text{C}$ </tex-math></inline-formula>&#x2013;<inline-formula> <tex-math notation="LaTeX">$50~^\circ \text{C}$ </tex-math></inline-formula> temperature range and the measured results presented a very linear behavior (<inline-formula> <tex-math notation="LaTeX">$R^{2} = 0.99888$ </tex-math></inline-formula>) when compared to the measured temperature values using a commercial sensor (LM135). A modified bridge circuit was developed, where a linear behavior of the differential output was obtained. The developed configuration allowed for the independent adjustment of both the offset and the gain in the output voltage <inline-formula> <tex-math notation="LaTeX">$V_{\text {out}}$ </tex-math></inline-formula> of the bridge. The bridge signal processing circuit was calibrated using an endpoint method, and the measured points between the calibration points presented a maximum endpoint nonlinearity error of <inline-formula> <tex-math notation="LaTeX">$|E_{\text {nl}}| =\,\,0.64\,\,^\circ \text{C}$ </tex-math></inline-formula>.

Combining an Integrated Sensor Array with Machine Learning for the Simultaneous Quantification of Multiple Cations in Aqueous Mixtures.

The direct quantification of multiple ions in aqueous mixtures is achieved by combining an automated machine learning pipeline with transient potentiometric data obtained from a single miniaturized array of polymeric sensors electrodeposited on a conventional printed circuit board (PCB) substrate. A proof-of-concept system was demonstrated by employing 16 polymeric sensors in combination with features extracted from the transient differential voltages produced by these sensors when transitioning from a reference solution to a test solution, thereby obviating the need for a conventional reference electrode. A tree-based regression model enabled concentrations of various metal cations in pure solutions to be determined in less than 2 min. In a model mixture comprising Al3+, Cu2+, Na+, and Fe3+, the mean relative error was found to depend on the type of ion and varied between 1% for Fe3+ and 44% for Na+ in the concentration range 1-10 mg/L. Overall, a mean relative error of 16% was obtained for quantification of these four ions across a total of 124 tests in different solutions spanning concentrations between 2 and 360 mg/L. These results demonstrate how the analytical capability of a multiselective sensor array can leverage data-driven approaches through training by examples for accelerated testing and can be proposed to complement traditional analytical tools to meet industrial demands, including traceability of chemicals.

Alternative Materials for Printed Circuit Board Production: An Environmental Perspective

This article investigates the potential environmental impacts of four-layer printed circuit board (PCB) production from cradle to grave. The study starts with a lifecycle assessment of conventional PCB production. Then, the alternative materials of polyethylene terephthalate (PET), polylactic acid (PLA)/glass fiber composite and paper are investigated for the substrate. A conventional PCB adopts copper as the conductive material and requires an etching process. The environmental impacts of changing the conductive deposition method to an additive method by printing silver nanoparticles is studied. In a conventional PCB, electricity generation contributes 41% of the global warming potential (GWP) and 38% of the abiotic resource depletion (ADP), in the fossil category. By applying an additive manufacturing method, the GWP of PCB manufacturing can be reduced to 14% of that of the conventional method. A sensitivity analysis of silver recycling illustrates that a 40% higher silver recycling rate would decrease the GWP of silver material by about 48–60%. Uncertainty in the energy consumption of PCB production would alter the environmental impacts; however, even with the most conservative energy consumption in a conventional PCB production method, the environmental impacts of the additive method are about five times lower than those of conventional PCB production.

A Novel High-Current Planar Inductor With Cooling Fins Based on 3-D Printing

This letter proposed a novel high-current planar inductor with cooling fins based on 3-D printing and its copper winding is 3-D printed by using selective laser melting technology. The 3-D-printed winding is designed for high-current applications based on 3-D space and can work as both winding and cooling fins. Compared with conventional printed circuit board (PCB) planar inductor, the proposed planar inductor not only has better performance, such as low dc resistance (DCR), ac resistance, and temperature rise, without volume increasing, but also has the superiorities of conventional PCB planar magnetics, such as ease of manufacture and controllability. To verify its performance, a 100-A-output buck converter using the proposed inductor was fabricated and compared with another identical buck converter using a conventional PCB inductor with the same size. The DCR of the proposed inductor is almost one-fifth of the PCB inductor. Besides, the efficiency of the buck converter with the proposed inductor is always over 0.5% higher than that with PCB inductor under different loads and its maximum efficiency is nearly 1% higher at light load. Furthermore, the maximum temperature rise of the proposed inductor is 26.8 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C under full load, only one-third of the PCB planar inductor. In other words, the proposed inductor can work well under 100-A current, whereas the traditional PCB inductor cannot due to too high temperature (103.8 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C).

Fused Deposition Modeling‐Based 3D‐Printed Electrical Interconnects and Circuits

Multimaterial 3D printing in electronics is expanding due to the ability to realize geometrically complex systems with simplified processes compared with conventional printed circuit board. Herein, the feasibility of using a copper‐based filament to realize 3D circuits with planar and vertical interconnections is presented. The resistivity of the tracks (1–3 mm wide) is studied with reference to printing parameters and orientation. Using lateral infill for 1 mm tracks offers lower resistance compared with longitudinal infill (≈75%). For wider tracks, the effect of infill orientation on resistance diminishes. The evaluation of tracks embedded in polylactic acid shows a drop in maximum current (to ≈11 mA) compared with exposed tracks (≈16 mA). There is no observed correlation between electrical performance and number of embedding layers. However, a significant correlation is observed between the tracks’ resistance and the amount of time the filament remains in the heated nozzle. This in‐depth study leads to optimum resolution to realize conductive tracks of 0.67 mm thickness and the first integration of fused deposition modeling (FDM)‐printed conductive traces with small‐outline integrated circuits to open a pathway for higher‐density 3D printed circuits. Finally, the transmission of digital data by a 3D printed circuit is demonstrated.