Conventional Chemical Vapor Deposition Technique Research Articles

Super-conformal TiN thin film deposition by carrier pulse purge atomic layer deposition system: Chamber design optimization with computational fluid dynamics

Owing to the increase in demand for the shrinkage of semiconductor design rules and the advent of the three-dimensional structure of semiconductor devices, atomic layer deposition (ALD) has emerged as an attractive alternative to conventional chemical vapor deposition techniques. Although the development of precursors and characterization of ALD films have been widely studied, few studies have been conducted on the modification of ALD parameters and optimization of the ALD process. In this study, an advanced ALD titanium nitride (TiN) system was designed using a pumping and purging simulationBased on the simulation results, we adopted a carrier pulse purge method, where TiCl4 fed, purge N2, pulse purge N2, purge N2, NH3 fed, purge N2, pulse purge N2, and purge N2 were alternatively injected into the chamber in the ALD cycle. Compared to the conventional purge method, the carrier pulse purge method can reduce the ALD cycle time by 18.27% and yields a high-quality (high step coverage, 98 %) TiN film with lower electrical resistivity and chlorine impurity. This carrier pulse purge method can ultimately lead to improved throughput and productivity in the semiconductor industry by reducing the ALD cycle time.

(Invited) Low-Temperature Plasma-ALD of Wide and Ultra-Wide Bandgap Semiconductors: Accomplishments and Hurdles to Overcome

III-nitride and III-oxide based wide (GaN, InGaN, AlGaN) and ultra-wide bandgap (Ga2O3, AlN, BN) semiconductors play critical roles in high-power, high-frequency, and harsh-environment electronic components utilized in wireless communications, power grids, homeland security, and space applications. While GaN-based wide bandgap (WBG) devices have reached a certain degree of maturity, the emerging ultra-wide bandgap (UWBG) alloys are still in their early stage of technology development. Conventional chemical vapor deposition (CVD) based crystal growth processes for these materials are carried out at elevated substrate temperatures, reaching over 1000 °C. In an effort to substantially reduce this synthesis temperature, plasma-assisted CVD techniques are of particular interest. Owing to its unique features including pinhole-free synthesis, precision film thickness control, large-area uniformity, and ultimate 3D conformality, plasma-assisted atomic layer deposition (plasma-ALD) offers significant opportunities for electronic device layers at reduced substrate temperatures.Relatively limited number of research groups have targeted this challenging opportunity by using different types of plasma sources integrated into various plasma-ALD reactors. In addition, different metal precursors and plasma gas mixtures have been utilized and the resulting material properties are studied on different substrates. While mostly polycrystalline WBG and UWBG films are reported, recently several groups have reported epitaxial relationship of plasma-ALD grown III-nitride and Ga2O3 films on sapphire and SiC substrates, which hints the potential for success. However, there still exist critical technology barriers for the adoption of plasma-ALD as an alternative low-temperature materials synthesis technique for device layers. Reliable electron mobility values are lacking and atomic layer doping efforts are barely investigated.In this presentation, we would like to provide and updated overview of the field including the latest reports and achievements. In addition, we would like to present our own efforts and recent advances in developing crystalline III-nitride and Ga2O3 films by using the hollow-cathode plasma (HCP) source, which demonstrated its advantages for reducing the oxygen impurities in III-nitride layers. By incorporating a multi-wavelength ellipsometer for in-situ monitoring, unit-cycle growth behavior of WBG and UWBG films were analyzed and correlated with the obtained material properties. Moreover, real-time in-situ monitoring allowed the realization of the saturation curve experiments on a single sample, without the need for breaking the vacuum and using multiple samples necessitating individual ex-situ thickness measurements. The growth parameters studied include the substrate temperature, rf-power applied to the remote HCP source, and plasma gas mixtures (N2/H2/Ar and O2/Ar with different flow ratios for III-nitrides and Ga2O3, respectively). Structural, chemical, optical, and electrical properties of the grown WBG and UWBG films have been characterized and correlated with the growth conditions. One of the main results obtained for these films is the different behavior each binary compound shows for similar synthesis parameter variations. A roadmap towards overcoming the current limitations will be discussed with an outlook for potential device applications of these low-temperature plasma-ALD grown films.

Growth and characterization of chemical vapor deposition diamond coating incorporated amorphous carbon with high Raman bands induced by CuO particles

Diamond coating has poor toughness due to its super hardness, which is liable to cause peeling or fracture of coating. In this work, a novel deposition method combining the particles with conventional chemical vapor deposition technique was proposed, with which a diamond coating with CuO particles was deposited on Co-cemented tungsten carbide substrate Meanwhile, the pure diamond coating was also fabricated for comparison. The as-deposited diamond coatings were characterized with scanning electron microscope, Raman spectrum and indentation test. Surface morphologies showed that diamond coating can deposit on the substrate with CuO particles. However, CuO particles can lead to the formation of the amorphous carbons with high Raman bands. Indentation tests suggested that the diamond coating with CuO particles exhibited the stronger adhesive strength and higher crack resistance than the pure diamond coating. The content of CuO particles affected the crack resistance of diamond coating. Hence, dispersing particles on the substrate surface may be regarded as a potential technique to adjust the diamond grains by incorporating carbonaceous phases, and in turn can strength the crack resistance of diamond coating to satisfy the industrial requirements.

Cathode Functionalization Via Atomic Layer Deposition for Solid Oxide Fuel Cells

Crucial ­­processes in solid oxide fuel cell (SOFC) such as ionic transport and electrode reactions are thermally-activated processes and their kinetics are strongly dependent on the temperature. Despite intense recent efforts to reduce its operating temperature to address durability, cost and applicability issues, it is still an ongoing challenge to deal with the resulting sluggish kinetics and power losses at lower temperatures. On the other hand, while catalysts with higher surface area are preferred for maximized catalysis per mass and volume, these high-surface area catalysts are prone to agglomeration sacrificing its overall catalytic activity during operation. In this talk, we will present a couple of examples how these issues have been successfully addressed by the use of atomic layer deposition (ALD), which has emerged as an important deposition technique for various applications due to its unique atomic-scale deposition capability in a highly controllable fashion at a temperature significantly lower than conventional chemical vapor deposition techniques. We will present several examples of enhancements in cathode performance and/or durability enabled by an ultrathin coating of Y-doped zirconia or ceria (i.e. YSZ or YDC) on different nano-porous cathode materials including Pt, La(Ni,Fe)O3 and (La,Sr)(Co,Fe)O3. In addition, we will report mechanism studies mainly performed via electrochemical impedance spectroscopy and electron microscopy focusing on the shift of the rate-determining step by the ultrathin overcoat. Acknowledgement: The authors gratefully acknowledge Nissan Motor Co. Ltd. and NASA MIRO Program (Grant No. NNX15AQ01A) for their financial support.

Patterned Growth of P‐Type MoS2 Atomic Layers Using Sol–Gel as Precursor

2D layered MoS2 has drawn intense attention for its applications in flexible electronic, optoelectronic, and spintronic devices. Most of the MoS2 atomic layers grown by conventional chemical vapor deposition techniques are n‐type due to the abundant sulfur vacancies. Facile production of MoS2 atomic layers with p‐type behavior, however, remains challenging. Here, a novel one‐step growth has been developed to attain p‐type MoS2 layers in large scale by using Mo‐containing sol–gel, including 1% tungsten (W). Atomic‐resolution electron microscopy characterization reveals that small tungsten oxide clusters are commonly present on the as‐grown MoS2 film due to the incomplete reduction of W precursor at the reaction temperature. These omnipresent small tungsten oxide clusters contribute to the p‐type behavior, as verified by density functional theory calculations, while preserving the crystallinity of the MoS2 atomic layers. The Mo containing sol–gel precursor is compatible with the soft‐lithography techniques, which enables patterned growth of p‐type MoS2 atomic layers into regular arrays with different shapes, holding great promise for highly integrated device applications. Furthermore, an atomically thin p–n junction is fabricated by the as‐prepared MoS2, which shows strong rectifying behavior.

Multilayer strategy and mechanical grinding for smoothing CVD diamond coated defective substrate

Surface quality of substrate easily affects the surface morphology of chemical vapor deposition (CVD) diamond coating. However, the fragile and hard substrate often has many defects in the surface. In this work, a novel method is proposed by the conventional CVD technique combining multilayer strategy and mechanical grinding, with which the smooth CVD diamond coating can be produced on the defective substrate. The microcrystalline diamond (MCD) coating is first deposited on the defective substrate to reinforce the adhesive strength of coating. Mechanical grinding are subsequently adopted by directly polishing the surface to quickly smooth the MCD coating. The second-layer MCD coating continues to be deposited on the polished coating. The surface becomes relatively smooth. For further smoothing the coating, the second-layer MCD coating is also polished, and the nanocrystalline diamond (NCD) coating is deposited as the top layer. The results show the MCD/MCD/NCD coating has a smooth surface with the Ra of 134nm. Turning test shows that the as-deposited diamond coating possesses high adhesive strength and strong wear resistance. The results prove that our method is adequate for the defective substrate to fabricate a smooth coating by repeating surface polishing and diamond deposition.

Formation of a Carbon Interphase Layer on SiC Fibers Using Electrophoretic Deposition and Infiltration Methods

This study examined carbon layer coating on silicon carbide (SiC) fibers by utilizing solid-state and wet chemistry routes to confer toughness to the fiber-reinforced ceramic matrix composites, as an alternative to the conventional pyrolytic carbon (PyC) interphase layer. Electrophoretic deposition (EPD) of carbon black nanoparticles using both AC and DC current sources, and the vacuum infiltration of phenolic resin followed by pyrolysis were tested. Because of the use of a liquid phase, the vacuum infiltration resulted in more uniform and denser carbon coating than the EPD routes with solid carbon black particles. Thereafter, vacuum infiltration with controlled variation in phenolic resin concentration, as well as the iterations of infiltration steps, was improvised to produce a homogeneous carbon coating having a thickness of several hundred nanometers on the SiC fiber. Conclusively, it was demonstrated that the carbon coating on the SiC fiber could be achieved using a simpler method than the conventional chemical vapor deposition technique.

Innovative 3C-SiC on SiC via Direct Wafer Bonding

In this paper, we report on a novel direct wafer bonding technique; Si (111) wafers to polycrystalline silicon carbide carrier wafers. The purpose of this work is to provide a platform for 3C-SiC epitaxial growth above the wafer bonded Si (111) wafers. We have demonstrated reduced wafer bow, confirmed by optical microscopy together with a digital camera. 3C-SiC epitaxial layers have been grown by conventional chemical vapor deposition techniques above Si/SiC structures. All of these 3C-SiC epitaxial layers are highly crystalline in nature. In the future, the realization of thick, bow-free 3C-SiC layers suitable for power device fabrication is achievable.

Bow Free 4'' Diameter 3C-SiC Epilayers Formed upon Wafer-Bonded Si/SiC Substrates

The physical and electrical properties of 4-inch 3C-SiC epitaxial layers, deposited on Si (111) wafers, which were wafer bonded to polycrystalline silicon carbide carrier wafers, are presented. We show that this novel Si/SiC wafer bonding process leads to reduced wafer bow, confirmed by imaging, in the form of optical microscopy (×100 objective lens) together with a digital camera. All 3C-SiC layers grown above Si/SiC structures by conventional chemical vapor deposition techniques are shown to be single crystal in nature. 3C-SiC metal oxide semiconductor capacitors have been fabricated via thermal oxidation at 1100°C in pure oxygen for 90 minutes, with a density of interface states measured at ∼2 × 1011 cm−2 eV−1 at 0.2 eV beneath the conduction band edge. These structures have the potential to realize thick, bow-free 3C-SiC layers suitable for power device fabrication.

High resolution electron microscopy of the GaAs/Si3N4 interface produced by multipolar plasma deposition

The analysis of the Si3N4/GaAs interface produced by the multipolar plasma chemical vapor deposition has been carried out using high resolution electron microscopy. For an optimized deposition process, we are able to produce abrupt interfaces between the Si3N4 and the crystalline GaAs. These results are compared to the interfaces produced in the conventional chemical vapor deposition technique.

Silicon solar cells on zone-melted silicon/graphite substrates

Polycrystalline-silicon solar cells deposited on graphite substrates by conventional chemical vapor deposition techniques have low conversion efficiencies due to the carrier recombinations at grain boundaries. To reduce the concentration of grain boundaries, silicon layers deposited on graphite substrates have been zone melted to increase substantially the size of silicon crystallites. Using these silicon layers as substrates, solar cells have been deposited in a one-step process by the thermal reduction of trichlorosilane containing appropriate dopants, and AM1 efficiencies of higher than 5% have been obtained for cells of about 6-cm2 area.