Controlled Switching Dc-dc Converters Research Articles

A Sensorless Peak Current-Mode Controlled DC–DC Converter: Design and Robustness Analysis Using Time-Scale Decomposition

This paper presents a new design concept of robust sensorless peak current-mode controlled DC-DC switching converters (SCs). Here we show that classical peak current-mode controlled SC (PCMCS) is under the class of slow-fast dynamical systems and that can be transformed into a reduced-order system using the notion of time-scale decomposition of a singularly perturbed system. Based on this decomposition, the reduced-order model of PCMCSs is derived and the composite state and disturbance observers are designed with the help of an equivalent-input-disturbance (EID) estimator. Moreover, rigorous stability criterion of closed-loop systems is provided to show the quantitative robustness between controller gains and parameter uncertainties. It is shown that the proposed design technique delivers a promising disturbance rejection property and an excellent dynamic performance with reduced hardware complexity. The feasibility of such approach is compared numerically with classical PCMCSs and then verified experimentally.

Novel sliding valley current mode pulse train control for switching DC-DC converter

ABSTRACTMulti valley current mode pulse train (MVC-PT) control technology can completely eliminate the low-frequency oscillation phenomenon of DC-DC switching converters operated in continuous conduction mode (CCM). However, this method needs to increase the number of preset value to broaden the output power range, which will increase the complexity and cost of the controller, and reduce the robustness of the system. Meanwhile, the output voltage ripple is uncontrollable and varied with the changes of the load. In this paper, a novel sliding valley current mode PT (SVC-PT) control technique is proposed to solve the above-mentioned problem. The SVC-PT operating principle and the deficiency of MVC-PT method are analysed in details. The approximate discrete-time models of SVC-PT and MVC-PT controlled switching DC-DC converters are constructed and compared. The comparison results verify that the proposed control method can thoroughly lessen the restriction of the controller on the output power range. Moreover, the control circuit is simplified and the output voltage ripple can be controlled. Finally, the simulation and experimental results are present to prove the feasibility and scientific of SVC-PT control technology.

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.

Control Pulse Combination-Based Analysis of Pulse Train Controlled DCM Switching DC–DC Converters

Pulse train (PT) control technique realizes the output voltage regulation of switching dc-dc converters by using preset high power control pulse P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</sub> and low power control pulse P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> . In steady state, P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</sub> and P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> in some successive switching cycles constitute a control pulse repetition cycle. The control pulse combination of PH and P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> in the control pulse repetition cycle has a significant effect on the performances of PT controlled switching dc-dc converters. In this paper, by taking PT controlled discontinuous conduction mode buck converter as an example, the control pulse combination of PT controlled buck converter is studied. Some lemmas to reveal the control pulse combination are presented, and the combination of P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">H</sub> and P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> in a control pulse repetition cycle is obtained. Based on which, the steady-state and transient performances of PT controlled buck converter are investigated. The control pulse combination-based analysis of PT controlled buck converter provides an effective way to understand the PT control technique in detail.

Pulse-Train-Controlled CCM Buck Converter With Small ESR Output-Capacitor

The pulse-train (PT) control technique for switching dc-dc converters is simple to design and benefits from excellent control performance. Up to now, almost all of the works on PT control are focused on switching dc-dc converters operating in discontinuous conduction mode, with few works reported on PT control of switching dc-dc converters operating in continuous conduction mode (CCM). In this paper, a PT-controlled CCM buck converter is studied and a unique low-frequency oscillation phenomenon is revealed, which results in large undesired inductor-current and output-voltage variations. The effect of equivalent series resistance (ESR) output-capacitor on the low-frequency oscillation is examined. The results indicate that such oscillation occurs when the ESR output-capacitor is relatively small and disappears when it is relatively large. However, a larger ESR will result in a large output-voltage ripple. In order to avoid the low-frequency oscillation and, at the same time, to ensure a small output-voltage ripple, the ICRIF circuit is applied. In this way, a small ESR output-capacitor can be used to decrease the output-voltage ripple. Simulation and experimental results are provided to verify the theoretical analysis.

Dynamical Effects of Equivalent Series Resistance of Output Capacitor in Constant On-Time Controlled Buck Converter

Equivalent series resistance (ESR) of output capacitor has a significant effect on the control performance of constant on-time (COT) controlled switching dc-dc converters. In this paper, a discrete-time model of COT-controlled buck converter, with variable sampling frequency, is established. Based upon which, the dynamical effects of the ESR of output capacitor on COT-controlled buck converter are revealed and analyzed. The time-domain numerical simulations of the exact switched state equations, the bifurcation diagrams, and maximal Lyapunov exponents of the discrete-time model are obtained. These results verified by experimental circuit indicate that the ESR of output capacitor is a critical factor for COT-controlled buck converter, which can eliminate the unique pulse bursting phenomenon and shift operation mode from discontinuous conduction mode to continuous conduction mode, as well as control stability.

ASIC and FPGA based DPWM architectures for single-phase and single-output DC-DC converter: a review

AbstractPulse width modulation (PWM) has been widely used in power converter control. This paper presents a review of architectures of the Digital Pulse Width Modulators (DPWM) targeting digital control of switching DC-DC converters. An attempt is made to review the reported architectures with emphasis on the ASIC and FPGA implementations in single phase and single-output DC-DC converters. Recent architectures using FPGA’s advanced resources for achieving the resolution higher than classical methods have also been discussed. The merits and demerits of different architectures, and their relative comparative performance, are also presented. The Authors intention is to uncover the groundwork and the related references through this review for the benefit of readers and researchers targeting different DPWM architectures for the DC-DC converters.

Dynamical mechanism of ramp compensation for switching converter

By introducing ramp compensation current into the feedback control circuit of current controlled switching DC-DC converter it can not only effectively extend the stable operation range of the switching DC-DC converter to realize chaotic stability control, but also shift its operation mode from discontinuous conduction mode to continuous conduction mode to realize operation mode shift. Taking current-controlled buck-boost converter as example by establishing the two-dimensional discrete-time model and the corresponding Jacobian matrix of current-controlled buck-boost converter with ramp compensation and two inductor current borders, the dynamical mechanism of ramp compensation for switching DC-DC converter is investigated. By analyzing the conditions of the instability and border collision bifurcation, the effects of the ramp compensation on the stable period oscillation and operation mode shift of switching DC-DC converter are discussed, and the corresponding stability boundary and mode shift boundary are obtained. Finally, an experimental circuit is built and the results are observed, from which the physical significance of the ramp compensation for chaotic stability control and operation mode shift of switching DC-DC converter is illustrated and the correctness of theoretical analysis is verified.

SYMMETRICAL DYNAMICS OF CURRENT-MODE CONTROLLED SWITCHING DC-DC CONVERTERS

Peak Current-Mode (PCM) and Valley Current-Mode (VCM) controlled switching dc-dc converters have symmetrical dynamical behaviors within a wide circuit parameter variation range. To investigate the symmetrical dynamical behaviors between PCM and VCM controlled switching dc-dc converters, the iterative map models and inductor current borderlines that exist in the bifurcation diagrams of both PCM and VCM controlled buck, boost, and buck-boost converters are established. The research results of bifurcation behaviors indicate that the bifurcation diagrams of PCM and VCM controlled switching dc-dc converters have symmetrical dynamical behaviors corresponding to a symmetrical point (SP). The simulation results show that time-domain waveforms of PCM and VCM controlled switching dc-dc converters working in periodic orbits have symmetrical axis and SP, and the SP also exists in corresponding phase portraits. Experimental results are given to verify the analysis and simulation results in this paper.

STUDY OF DISCRETE GLOBAL-SLIDING MODE CONTROL FOR SWITCHING DC-DC CONVERTER

Discrete global-sliding mode (SM) control of switching DC-DC converters is presented in this paper. The existence and stability conditions of quasi global-sliding mode are proposed. The design method for the discrete global SM controller is studied and applied to Buck converter with global-sliding mode control. Computer simulation and experimental results verify the validity of the theoretical analysis.

Fully Digital Hysteretic Modulator for DC–DC Switching Converters

This paper presents an alternative modulation approach for digitally controlled DC-DC switching converters, which exploits the natural jittering activity of a digital hysteretic feedback loop in order to provide an effective increase in resolution. The proposed structure replaces conventional high-resolution digital pulse-width modulators (DPWM) or sigma-delta based (ΣΔ-DPWM) solutions with a single, fully-digital block featuring reduced complexity, high resolution, and improved noise performance and small-signal dynamic characteristics, enabling the design of accurate, high-bandwidth digital feedback loops with minimum hardware resources. A stochastic modeling approach is developed for the proposed structure, which allows the derivation of a simple and effective switching frequency control criterion. Analysis, simulation and experimental tests are shown to validate the properties of the proposed digital hysteretic modulator.

Symmetrical dynamics of peak current-mode and valley current-mode controlled switching dc–dc converters with ramp compensation

The discrete iterative map models of peak current-mode (PCM) and valley current-mode (VCM) controlled buck converters, boost converters, and buck–boost converters with ramp compensation are established and their dynamical behaviours are investigated by using the operation region, parameter space map, bifurcation diagram, and Lyapunov exponent spectrum. The research results indicate that ramp compensation extends the stable operation range of the PCM controlled switching dc-dc converter to D > 0.5 and that of the VCM controlled switching dc–dc converter to D < 0.5. Compared with PCM controlled switching dc–dc converters with ramp compensation, VCM controlled switching dc–dc converters with ramp compensation exhibit interesting symmetrical dynamics. Experimental results are given to verify the analysis results in this paper.

Digital Average Current Controlled Switching DC–DC Converters With Single-Edge Modulation

Digital average current (DAC) control of switching dc-dc converters with single-edge modulation (trailing-edge and leading-edge modulations) is studied in this paper. To calculate the average inductor current with minimum calculation time and appropriate precision, a new algorithm, called the four-point-mean (FPM) algorithm, is proposed. The DAC control laws with trailing-edge and leading-edge modulations are derived by using FPM algorithm, and their stabilities are studied. The subharmonic oscillation of DAC controlled switching dc-dc converters is investigated and analyzed. It is shown that both digital slope compensation and digital reposition compensation of the ac component of duty ratio for digitally controlled switching dc-dc converters cannot eliminate the subharmonic oscillation of DAC controlled switching dc-dc converters. Instead, a new method, called digital triangle compensation, for the elimination of the subharmonic oscillation of DAC controlled switching dc-dc converters is proposed and studied. Experimental results are given to verify the analysis results.

Multi-pulse train control technique for buck converter in discontinuous conduction mode

Multi-pulse train (MPT) control technique, a novel control technique for the control of switching DC-DC converters is proposed here. Unlike traditional pulse train (PT) control technique, which realises the output voltage regulation of switching DC-DC converters by a combination of two different control pulses, MPT control technique extends these two different pulses to multi-level pulses, and thus overcomes the drawback of relatively large output voltage ripple of PT control switching DC-DC converters. Buck converter operating in discontinuous conduction mode is taken as an example to illustrate the operation principle of MPT control technique. Comprehensive analysis on the control pulse combination within a MPT repetition cycle is performed and verified by simulation and experimental results. It also shows that MPT control buck converter has much lower output voltage ripple than PT control technique, and much better transient performance than traditional pulse-width modulation buck converter.

Analysis of symmetrical dynamic phenomenon of peak and valley current-mode controlled switching DC-DC converters

Peak current and valley current controlled switching DC-DC converters show symmetrical dynamic phenomenon within a wide circuit parameter range. The unified discrete iterative map model of peak current and valley current controlled buck, boost, and buck-boost converters is established, and the unified piecewise smooth iterative map and their corresponding characteristic equations are also derived. The forward and inverse bifurcation diagrams and Lyapunov exponent spectrums with duty ratio as parameter are obtained by numerical simulation. The research results indicate that the bifurcation diagrams and Lyapunov exponent of peak and valley current-mode controlled switching converters show symmetrical dynamic phenomenon corresponding to a symmetrical point or a symmetrical axis. The numerical simulation results are verified by the time-domain simulation, which further indicates that with the duty ratio varying, the peak and valley current-mode controlled switching converter reveals a symmetrical dynamic phenomenon, or a symmetrical dynamic phenomenon accompanying an asymmetrical dynamic phenomenon, or an asymmetrical dynamic phenomenon.

Dynamical modeling and analysis of current mode controlled switching converter with ramp compensation

Buck, boost and buck-boost converters are three basic switching DC-DC converters. Current mode controlled switching DC-DC converters have two boundaries in a wide circuit parameters variation range. Based on the ramp up and ramp down slopes of the inductor current before and after the turn on of power switch for switching DC-DC converters, a unified model of the current mode controlled switching DC-DC converters with ramp compensation is established in this paper. Only three parameters appear in this model after dimensionless normalization, from which the dynamical behaviors of switching DC-DC converters in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) can be effectively illustrated. By utilizing the proposed unified model, two orbit state shifting borderline equations are derived, from which three operation state regions namely the stable period-one region, CCM robust chaos region, and DCM weak chaos and strong intermittence region, of switching DC-DC converters can be determined. The two-dimensional parameter bifurcation diagrams of switching DC-DC converters and circuit experimental observations of current mode controlled buck converter verify the analysis results of the partitioning of operation state regions by two borderline equations.

Digital Peak Current Control for Switching DC–DC Converters With Asymmetrical Dual-Edge Modulation

An asymmetrical dual-edge modulation (ADM) method applied to digital peak current (DPC)-controlled switching dc-dc converters is proposed in this brief. Steady-state and transient performance comparison of DPC-controlled buck converters with ADM and conventional symmetrical dual-edge modulation (SDM) is presented and verified by experimental results. Comparison studies show that the steady-state and transient performances of DPC with ADM are better than those of DPC with SDM.

Improved Digital Peak Voltage Predictive Control for Switching DC–DC Converters

A digital peak voltage (DPV) predictive control for switching dc-dc converters is proposed and studied in this paper. With the predictive control technique, the duty ratio in each switching cycle is usually calculated and predicted based on the status in the previous switching cycles. Therefore, at least a one-switching-cycle time delay usually exists in predictivPe control, which significantly degrades the control performance of digital controlled switching dc-dc converters. To eliminate this time delay and to improve the control performance, an improved DPV (IDPV) predictive control technique is then proposed and studied. The control laws of DPV and IDPV with different pulsewidth modulations are derived, and their stabilities are analyzed. A simple digital slope compensation method is proposed to eliminate the subharmonic oscillation of DPV and IDPV control laws. The steady-state and transient performances of DPV and IDPV controlled buck converters are investigated by simulation and experiment. The comparison studies among DPV, IDPV, and digital peak current (DPC) control show that the transient performances of IDPV and DPV are much better than that of DPC and that IDPV is better than DPV.

Static Characteristics of the Digital PWM and/or PFM Controlled Switching DC-DC Converters

The digitally controlled dc-dc converter has the advantage of high reliability, high controllability and high flexibility. A new digital controller for the PWM and/or PFM controlled switching dc-dc converters is presented, which is versatile in general use such as the switching frequency from 20kHz to 70kHz, the hard-switching and soft-switching and so forth. As an example, we apply this controller to half-bridge type series resonant dc-dc converter with auxiliary switches, in which both PWM and PFM control modes are employed, and the output characteristics of the converter are discussed. As a result, the relationships among circuit parameters of the proposed digital controller, switching frequency of the dc-dc converter, oscillation frequency of the VCO as analog to digital signal converter are defined.

The control of switching DC-DC converters-a general LWR problem

The control of switching DC-DC converters is reviewed. It is regarded as a general linear quadratic regulator (LQR) problem, and an innovative optimal and robust digital controller is proposed. The control strategy adopted can achieve good regulation, rejection of modest disturbances, and the ability to cater to switching converters with RHP zeros. This controller design is a general approach that is applicable to all PWM-type DC-DC converters with their circuit topologies known or unknown. Modern CAD techniques are used to reach the final control law. Application to a published Cuk converter is used as an example, and the performance is evaluated.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>