Computer Architecture Course Research Articles

Teaching computer architecture by designing and simulating processors from their bits and bytes.

Teaching computer architecture (Comp-Arch) courses in undergraduate curricula is becoming more of a challenge as most students prefer software-oriented courses. In some computer science/engineering departments, Comp-Arch courses are offered without the lab component due to resource constraints and differing pedagogical priorities. This article demonstrates how students working in teams are motivated to study the Comp-Arch course and how instructors can increase student motivation and knowledge by taking advantage of hands-on practices. The teams are asked to design and implement a 16-bit MIPS-like processor with constraints as a specific instruction set, and limited data and instruction memory. Student projects include following three phases, namely, design, desktop simulator implementation, and verification using hardware description language (HDL). In the design phase, teams develop their Comp-Arch to implement specified instructions. A range of designs resulted, e.g., (a) a processor with extensive user-defined instructions resulting in longer cycle times (b) a processor with a minimal instruction set but with a faster clock cycle time. Next, teams developed a desktop simulator in any programming language to execute instructions on the architecture. Finally, students engage in Verilog Hardware Description Language (HDL) projects to simulate and verify the data-path designed during the initial phase. Student feedback and their current understanding of the project were collected through a questionnaire featuring varying Likert scale questions, some with a ten-point scale, and others with a five-point scale. Results of the survey show that the hands-on approach increases students' motivation and knowledge in the Comp-Arch course, which is centered around computer system design principles. This approach can also be effectively extended to related courses, such as Microprocessor Design, which delves into the intricacies of creating and implementing microprocessors or central processing units (CPUs) at the hardware level. Furthermore, the present study demonstrates that interactions, specifically through peer reviews and public presentations, between students in each phase increases their knowledge and perspective on designing custom processors.

The design and implementation of a 16 bit floating point arithmetic unit using BZK.SAU.FPGA microcomputer assembly language

AbstractThe microcomputer architecture named BZK.SAU.FPGA, which was developed in 2014, was used to increase efficiency in the teaching of the Computer Architecture and Organization course, which is one of the basic courses of the Department of Computer Engineering. In the last version released in 2018, the architecture has been started to be used in many engineering disciplines with its modular structure and a basic operating system. However, this architecture uses fixed‐point numbers in arithmetic operations. Although this situation contributes to its use as an educational tool at the beginner level for new learners, the fact that it cannot operate with floating point numbers is one of the biggest shortcomings of the educational tool. Floating point numbers are used extensively in applications such as mathematical analysis, signal processing, image processing, and so on. Therefore, in this study, the FPA unit for the computation of addition, subtraction, multiplication, and division operations is integrated into this architecture. For FPA unit implementation, an assembly‐level program has been embedded in the architecture using an IEEE‐754 half‐precision binary format (FP16) with the aim of presenting the fundamental of the floating‐point computation. The FPA unit proposed to observe the behavior of floating point numbers in arithmetic operations and increase awareness of these issues was used as an auxiliary tool in the computer architecture course. A pre‐ and postsurvey study was conducted to see the learning outcomes of students using this tool on floating point numbers. We found a significant association between pre‐ and postsurvey, indicating that students' knowledge about the behavior of floating point numbers increased (p < .001).

Addressing Student Fatigue in Computer Architecture Courses

Understanding the architecture of a processor can be uninteresting and deterring for computer science students, since low-level details of computer architecture are often perceived to lack real-world impact. These courses typically have a strong practical component where students learn the fundamentals of the computer architecture and the handling of input/output operations through the development of simple programs in a low-level assembly programming language. Since these practical sessions require a strong involvement, student attendance and withdrawal rates are poor, lowering academic results and introducing a negative feedback loop that preconditions students to dislike them. This article introduces a new methodology for the practical sessions of Computer Organization and Design courses. This methodology disavows the use of simulators and focuses on actual hardware to promote a feeling of proximity to the execution and outcome of the programs. The proposed setup uses Raspberry Pi devices to encourage students to work autonomously, due to their low cost, capability of running an OS, and rich ecosystem of simple hardware devices. The setup is completed with RISC OS, which combines a simple window-based graphical interface with a low-level management of the hardware without requiring software abstraction layers. The article presents the methodology and the UCDebug tool, developed to help students debug their codes in RISC OS. After the introduction of the new setup at the University of Cantabria, academic results and student satisfaction have improved. The setup has also allowed to sustain a similar organization of the courses throughout the COVID-19 pandemic.

The Challenges of Lecture Delivery of Arm X86, Cisc and Risc in the Teaching of Coursecsc303 (Computer Architecture) in the University of Jos, Nigeria: an Overview

The trending definition of the computer architecture course involves the teaching/delivery of instruction set architecture design, micro architecture design, logic design, and implementation. Historically, the RISC vs. CISC wars raged in the 1980s when chip area and processor design complexity were the primary constraints and desktops and servers exclusively dominated the computing landscape (Patterson D.A & Ditzel D.R, 1980). Today and particularly in developing economies like Nigeria, energy and power pose the primary constraints to architecture design and the computing landscape is significantly different occasioned by growth in tablets and Smartphone's running ARM (a RISC ISA) is surpassing that of desktops and laptops running x86 (a CISCISA). Furthermore, the traditionally low-power ARM ISA is entering the highperformance server market, while the traditionally high-performance x86 ISA is entering the mobile low-power device market.ICT has given rise to a host of legal and ethical issues and challenges in the use of ICT for education. All array of both teaching and technical staff as well as students need to know to a reasonable extent about the issues and challenges in the use of ICT for education (Ogbomo. E.F, 2011). It has been severally been suggested in various academic climes of the need for teachers and students to be above reproach as succinctly put by Crossley. S.A. & McNamara, D.S, 2021 ‘in understanding the basic issues (effectiveness, cost, equity, and sustainability), as well as the challenges (infrastructure related challenges, capacity building challenges, challenges related to financing the cost of ICT use, to mention but few) surrounding the use of ICT in education and then apply those issues as principles in practice’. The essence of this study is to attempt presenting the appropriate methods in which ARM X86, CISC and RISC can be taught with ease for students in Nigerian Universities to the effect that Institutions lack adequate number of computers and relevant ICT accessories and/or soft and hardwires in laboratories. The methods which was used initially was making use of Projectors for the students in their class rooms and the use of microphone speakers to teach the students in addition to having to cope with extended lectures periods as a result of downtimes. The hindrances notwithstanding, when this method was initiated students had a better theoretical understanding of ARM X86, CISC and RISC because as in agreement with the submission of Bhandarkar. D&Clark. W.D, 1991; in order to achieve results better comprehension and quicker understanding by Students, videos were deployed as lectures were on-going to augment the prospects and constraints of the teaching and delivery of computer architecture. When various methods (Wireless LAN (WLAN), computers/laptops, and other technologies were taken into cognizance, in the teaching and practical delivery of computer architecture, it was observed that the students’ comprehension and understanding of the Reduced Instruction Sets of Computers and the Complex Instruction Sets of Computers showed remarkable improvement.

A Project-Based Learning Approach to Teaching Computer Architecture

This article describes details of design and implementation of an upper-level (core-Tier2) computer organization and architecture course with an online hands-on component as a blended learning environment. The revised course content is based on contemporary pedagogical approaches: blended learning,

CPU implementation using only logisim simulator to achieve computer architecture learning outcome

This paper proposes the design, implementation, and evaluation of an 8-bit CPU architecture in computer organization and architecture (COA) course for Undergraduate Computer Engineering using only Logisim simulator. The main advantage of using one simulator is the elimination of inefficiency so that students can concentrate more on the course’s content without spending their time just to learn how to use each different type of simulators. To achieve that, a simple CPU architecture is pre-designed and be implemented in Logisim simulator. According to previous researches, Mic-1 CPU architecture is chosen because it is the simplest one and can be easily built using many simple logic gates already existed in the Logisim. To evaluate the desired outcome, students are separated into two different groups. Each group used different type of learning media and material and then their examination scores and satisfaction are compared to each other. Every student belongs to the group that only used Logisim simulator obtained higher score and more than 50% are satisfied with the new learning process and material. Thus, it envisaged that this method will made the delivering learning process in COA course be more efficient than what has happened so far.

The Acceptance Factors and Effectiveness of MOOC in the Blended Learning of Computer Architecture and Organization Course

Purpose of the study: This study examined the effectiveness of MOOC in the blended learning of Computer Architecture and Organization course based on the integration of online learning using MOOC and face-to-face learning. Specifically, the aim of the study was to identify factors that could influence student acceptance of MOOC in terms of immersion (IM) and intention to use (BIU) based on the HMSAM. Methodology: Quantitative approach through pre-test/post-test control group design was implemented in this study. Simple random sampling was carried out to recruit the study sample comprising 168 undergraduates from a population of 298 students. Pearson correlation analysis, ANOVA and multiple regression analysis were performed on the survey data collected using online questionnaire. Main Findings: Joy, control, perceived usefulness (PU) and curiosity were significantly correlated with IM while PU, joy and curiosity were significantly correlated with BIU. Control, PU, joy and curiosity were significant predictors of student acceptance in terms of IM and BIU. 33% of IM variances and 22% of BIU variances can be predicted by control, PU, joy and curiosity. Applications of this study: This study is useful in educational technology area where it shows that MOOC is a potent platform for blended learning, but its effectiveness relies on appropriate division of learning between online and face-to-face mode. Therefore the study on teaching and learning strategies, techniques and tools are widely open in order to improve the effectiveness of blended learning in the future. Novelty/Originality of this study: The finding suggests that the proportion of learning based on online and face-to-face mode should be carefully apportioned where the effectiveness of MOOC in the blended learning was significantly lower if it was used up to 71% and the effectiveness will be increased if only 29% of MOOC was used in the non-blended learning.

WepSIM: An Online Interactive Educational Simulator Integrating Microdesign, Microprogramming, and Assembly Language Programming

Our educational project has three primary goals. First, we want to provide a robust vision of how hardware and software interplay, by integrating the design of an instruction set (through microprogramming) and using that instruction set for assembly programming. Second, we wish to offer a versatile and interactive tool where the previous integrated vision could be tested. The tool we have developed to achieve this is called WepSIM and it provides the view of an elemental processor together with a microprogrammed subset of the MIPS instruction set. In addition, WepSIM is flexible enough to be adapted to other instruction sets or hardware components (e.g., ARM or x86). Third, we want to extend the activities of our university courses, labs, and lectures (fixed hours in a fixed place), so that students may learn by using their mobile device at any location, and at any time during the day. This paper presents how WepSIM has improved the teaching of Computer Architecture courses by empowering students with a more dynamic and guided learning process. In this paper, we show the results obtained during the experience of using the simulator in the Computer Structure course of the Bachelor's Degree in Computer Science and Engineering, University Carlos III of Madrid.

Education 4.0: The Impact of Computer Architecture and Organization Course on Students’ Computer Anxiety and Computer Self-Efficacy

Education 4.0: The Impact of Computer Architecture and Organization Course on Students’ Computer Anxiety and Computer Self-Efficacy

The impact of changing homework frequency in a computer architecture course

Formative assessment in a computer architecture course is often modeled as lab exercises and written homework. In this paper, we discuss the impact of splitting large homework assignments into dail...

Building a memory reading circuit

This assignment is for an undergraduate Computer Architecture course. Students are required to build a sequential circuit to simulate memory reading. Before this assignment, students have studied c...

Analysis of Student Performance Data from a Computer Architecture and Organization Course

Some known problems in the literature are the lack of interest and difficulty ofstudents in Computer Architecture and Organization courses. We analyzed the students' performance in tests and semipresential learning activities in three editions of Introduction to Computer Architecture course from the Computer Engineering program of the Federal University of Pampa. We also analyzed the National High School Exam grades of these students, by knowledge area. The purpose of this study is to identify, through analytical processes using data from the course and grades of the NHSE, the most influential factors in the students’ first and final grades and subsidize the proposal of effective actions to solve the problem of high percentages of students’ failure.

Pengembangan Multimedia Interaktif Model Games untuk Meningkatkan Respon Mahasiswa pada Mata Kuliah Organisasi dan Arsitektur Komputer

The aims of this study were (1) to create an interactive multimedia by using games which is proper used by Politeknik Ganesha Guru students in computer organization and architecture course. (2) to know the feasibility level of interactive multimedia by using games according to content expert, media expert and learning design expert in computer organization and architecture course. (3) to know the students’ response to the development of interactive multimedia by using games in computer organization and architecture course. This study used Dick and Carey as the development model which invoved first semester students of Politeknik Ganesha Guru in Informatics Management Study Program. Based on the result of the data analysis from the content feasibility aspect made by the content expert indicated that the product is in accordance with the SAP of Computer Organization and Architecture courses. Tests conducted by media experts obtained a calculation result of 87% which is being in good qualification. Tests conducted by the design of learning experts obtained a calculation result of 88% which are in good qualification. The user/lecturer gave a good response. Field trials conducted got a result of 90% calculation which are in excellent qualification

Designing lab sessions focusing on real processors for computer architecture courses: A practical perspective

Computer architecture courses typically include lab sessions to reinforce, from a practical perspective, concepts and architectural mechanisms studied in lectures. Lab sessions are mainly based on simulation frameworks because they benefit learning. Reading the source code that models certain processor mechanisms allows students to acquire a sound knowledge of how hardware works. Unfortunately, simulators that model current multicore processors are getting more and more complex, which lengthens the learning phase and complicates their use in time-bounded lab sessions.In this paper, we propose a new approach that complements the use of simulation frameworks in lab sessions of computer architecture courses. This approach is based on performing experiments on current commercial processors, where multiple hardware events related to the performance of the computer components under study are monitored. Then, students analyze the measured events and how they impact the overall performance. Such analysis motivates students and, not only helps reinforcing the theoretical concepts, but also increases their analysis skills. In this paper we present the methodology and scheduling framework that support the proposed approach and discuss five lab sessions, which can be applied in different courses, covering multiple computer architecture topics.

A research-oriented course on Advanced Multicore Architecture: Contents and active learning methodologies

The fast evolution of multicore processors makes it difficult for professors to offer computer architecture courses with updated contents. To deal with this shortcoming that could discourage students, the most appropriate solution is a research-oriented course based on current microprocessor industry trends. Additionally, we also seek to improve the students’ skills by applying active learning methodologies, where teachers act as guiders and resource providers while students take the responsibility for their learning. In this paper, we present the Advanced Multicore Architecture (AMA) course, which follows a research-oriented approach to introduce students in architectural breakthroughs and uses active learning methodologies to enable students to develop practical research skills such as critical analysis of research papers or communication abilities. To this end five main activities are used: (i) lectures dealing with key theoretical concepts, (ii) paper review & discussion, (iii) research-oriented practical exercises, (iv) lab sessions with a state-of-the-art multicore simulator, and (v) paper presentation. An important part of all these activities is driven by active learning methodologies. Special emphasis is put on the practical side by allocating 40% of the time to labs and exercises. This work also includes an assessment study that analyzes both the course contents and the used methodology (both of them compared to other courses).

The Use of MARIE® CPU Simulator in the Computer Architecture (CA) Course: An Exploratory Analysis to Assess the Students’ Perception of Learning

The Use of MARIE® CPU Simulator in the Computer Architecture (CA) Course: An Exploratory Analysis to Assess the Students’ Perception of Learning

A Survey of Assignments in Undergraduate Computer Architecture Courses

Computer architecture is an essential topic in undergraduate Computer Science (CS) curricula. Teaching computer architecture courses to CS students can be challenging, as the concepts are on a high abstraction level and not easy to grasp for students. Learning of computer architecture abstracts is strongly reinforced by hands-on assignment experience. This paper presents results from a survey of assignments from 40 undergraduate computer architecture courses, which are offered in 40 CS departments. These surveyed courses are selected from universities listed among the 120 top North America universities by the Webometrics Ranking of World Universities 2015. The information used for this survey is based solely on material publicly accessible on the websites of courses.

An Educational Hardware/Software Tool for the First Course in Computer Architecture

In this paper, we briefly present our design decisions and challenges involved in designing the hardware/software tools that we prepared based on our several years of experience in teaching logic circuits and computer architecture which help students of the first course in computer architecture to familiarize themselves with the basic operations of a computer. In fact, we first present the hardware of an 8-bit processor and its I/O and memory board that we have specifically designed and built using basic logic ICs for pedagogical purposes. We then go over the features and design challenges of a special monitor program we created. This monitor program directly runs on the top of our 8-bit processor and provides invaluable features, such as executing the students’ program in two possible modes (single step and continuous run), displaying the contents of CPU registers, flags, and relevant memory locations, in addition to the ability to pause the program execution on real hardware, and modify these contents and continue.

Sustainable internationalization in South Korean higher education: Languages and cultures in a foreign professor’s course

In recent decades, recruiting foreign professors (FPs) has become a noticeable trend at South Korean higher education institutions (HEIs) as they attempt to internationalize. However, little scholarly attention has been paid to the question of what is actually happening in classrooms as a result of this rapid influx of FPs and the associated proliferation of English-only courses. The aim of this study is to understand internationalization’s real impacts on teaching and learning by examining professor-student interactions and instructional practices in a so-called “internationalized” university course (i.e., an English-speaking Canadian professor’s computer architecture course for domestic Korean students). I adopt the theoretical lens of sustainability framed within an ecological perspective and focus on languages and cultures in the HEI context, while resisting market-based HEI internationalization driven by economic considerations. This study finds that Prof. Dave’s course was characterized by linguistic and cultural reciprocity and equitable relations among the participants, revealing its vast potential for sustainable internationalization. Further, the course acknowledged and empowered various funds of student knowledge, including content knowledge, English capability, and Korean capability, which led to fun and effective learning. Although this successful symbiosis suggests a promising future for sustainable internationalization in Korean HEIs, I also highlight the pressing need for institution-level programs or services to assist both FPs and domestic students in FP courses.

A Hardware Based Novel Educational Methodology for Teaching Microprocessor Architectures Using Object Oriented Approach

There is no doubt that computer architecture represents a core course in computer science curriculum. A computer architecture course involves mainly the microprocessor structure and operation which constitutes the heart of the whole system. Due to microprocessor complexity, a number of simulation software solutions have been developed for supporting the corresponding courses. On the other hand, simulators offer only a visual environment where the students cannot change operational or structural characteristics for studying the corresponding microprocessor behavior. Moreover, and much more important is the fact that students cannot demystify the physical level where bit manipulation takes place. A novel and low cost approach for studying in depth microprocessor structure and operation at programming and hardware level is presented and finally proposed for the very first time in this paper. The student uses programmable hardware modules for developing the internal structure of a microprocessor. Finally, the developed microprocessor can be studied from programmer’s or developer’s view.