Complex Binary Number System Research Articles

Area–time–energy efficient architecture of CBNS‐based fast Fourier transform

AbstractA new approach for implementing the fast Fourier transform (FFT) using complex binary number system (CBNS) is presented in this paper. The advantage of using CBNS is that instead of processing the real and imaginary parts of a complex number separately, we can process both as a single entity. A total of four FFT architectures have been developed, which are 16‐, 64‐, 256‐, and 1024‐point FFT architectures. The proposed FFT is designed using Verilog‐HDL and implemented using a Virtex‐7 field‐programmable gate array (FPGA). The maximum clock rate achieved by the proposed FPGA‐based design is 376.1 MHz. The FPGA resource utilization of the FFT is less than the state‐of‐the‐art FFT designs. An application‐specific integrated circuit (ASIC) for the FFT is also designed. The normalized energy per FFT of the proposed ASIC is 0.14 nJ, and the normalized area per FFT of the ASIC is 1.08 mm2 which is less than other existing designs.

2-D Systolic Array architecture of CBNS based Discrete Hilbert Transform Processor

This paper proposes an optimized design of Discrete Hilbert Transform (DHT) processor using Complex Binary Number System (CBNS). The conventional implementation of DHT based on the “divide and conquer” approach involves two separate computational units for the real and imaginary parts, which requires a large silicon area and increases the path delay. In contrast, incorporation of CBNS in transformation techniques facilitates complex-valued signal processing through a single computational unit.The CBNS-DHT processor has been designed using the standard computational method of Fast Fourier Transform (FFT). The 2-D Systolic Array architecture along with a novel processing element has been proposed for CBNS based Complex-valued FFT (CFFT) and Inverse FFT (CIFFT) computations. The architecture of CBNS-CFFT/CIFFT has been extended to develop the CBNS-DHT processor on the Zynq-7000 family, XC7Z020-CLG484 FPGA platform. A comparative performance analysis of CBNS-DHT and Normal Binary Number System (NBNS)-DHT highlights the efficiency of CBNS-DHT in terms of VLSI parameters — silicon area, path-delay and memory utilization. CBNS-CFFT shows significant improvement in path delay and area consumption as compared to NBNS-CFFT for both Twiddle Factors and FFT size, which proves that CBNS based CFFT and DHT processor design is more efficient in terms of speed and area requirements.

An Improved Distributed Multiplier-Less Approach for Radix-2 FFT

Complex numbers play a vital role in the implementation of a wide number of Digital Signal Processing (DSP) algorithms. Since they are represented as two separate components (real and imaginary), the algorithms increased the number of computations. In this letter, we present an improved approach that reduces the number of computations by integrating the computation of the radix-2 Fast Fourier Transform (FFT) with the Distributed Arithmetic (DA) and Complex Binary Number System (CBNS). Further, the proposed architecture replaces multipliers with the use of adders and shifters, which considerably decrease the design area. Although more adders are needed to implement the new DA-CBNS proposed architecture, when compared to the traditional radix-2 FFT and DA or CBNS -based FFT algorithms, results show that the proposed design yields an increase in operating frequency, and a reduction in size, memory usage, and power consumption.

Complex Binary Adder Designs and their Hardware Implementations

Complex Binary Number System (CBNS) is (-1+j)-based on binary number system which facilitates both real and imaginary components of a complex number to be represented as single binary number. In this paper, we have presented three designs of nibble-size complex binary adders (ripple-carry, decoder-based, minimum-delay) and implemented them on various Xilinx FPGAs. The designs of base2 4-bit binary adder have also been implemented so that statistics of different adders can be compared.

A Novel Ammonic Conversion Algorithm for Securing Data in DNA using Parabolic Encryption

In today's era, the traditional cryptographic methods are not sufficient to provide security to the data. Everyone wants to secure their data whether the data is bank transaction, email transaction, personal data or the data related to work. To provide security to the data, DNA cryptography emerges as a new field. DNA cryptography is a new branch of cryptography. It provides security to the data by converting the data in the form of DNA sequence. A lot of research has been done in the area of this cryptography. It consists of various stages like converting data in the form of DNA, reverse conversion, various methods of encryption etc. Various methods of encryption are present until now in the DNA cryptography. But the problem with them is that they all have more emphasis on biological encryption methods. There is a need of methods which make use of simple biological methods and complex binary or other number system encryption. In this paper, the authors are proposing a new algorithm for providing security to the data at two levels. The authors propose a parabolic transposition in a circular arrangement of data. In the proposed algorithm, data is arranged in a circular way. The number of rows and columns acts as a key for binary encryption. For encrypting the DNA sequence, the authors convert the DNA sequence into amino acid. This amino acid sequence will act as a cipher text and send to the receiver through the open environment. The proposed algorithm is a type of block cipher. It is a transposition cipher. It changes the position of data for binary encryption.

Analysis of Multiple-Bit Shift-Left Operations on Complex Numbers in (−1+j)-Base Binary Format

Complex numbers find various applications in the field of engineering. To avoid excessive delays in production of results obtained by implementing divide-and-conquer technique in dealing with arithmetic operations involving this type of numbers in today’s computer systems, Complex Binary Number System with base(−1+j) has been proposed in scientific literature. In this paper, we have investigated the effects of bit-wise shift left operations (from 1-8 bits) on the complex binary representation of complex numbers and analyzed these results using mathematical equations. DOI: http://dx.doi.org/10.11591/ijece.v4i2.5283

Design of a Content Addressable Memory-based Parallel Processor implementing (-1+j)-based Binary Number System

Contrary to the traditional base 2 binary number system, used in today's computers, in which a complex number is represented by two separate binary entities, one for the real part and one for the imaginary part, Complex Binary Number System (CBNS), a binary number system with base (−1+j), is used to represent a given complex number in single binary string format. In this paper, CBNS is reviewed and arithmetic algorithms for this number system are presented. The design of a CBNS-based parallel processor utilizing content-addressable memory for implementation of associative dataflow concept has been described and software-related issues have also been explained. Keywords—binary number; complex binary; parallel processing; content-addressable; memory; associative dataflow; compiler; operating system I. INTRODUCTION

Impact of Shift Operations on (-1+j)-Base Complex Binary Numbers

Complex numbers play a very important role in various applications of electrical and computer engineering. These days, arithmetic operations dealing with these numbers rely on a “divide-and- conquer” technique wherein a complex number is broken into its real and imaginary parts and then, after representing each part in binary number system, operation is carried out on each part as if part of the real arithmetic. Thus, addition of two complex numbers requires two separate additions, and their multiplication requires four individual multiplications, one subtraction and one addition. In an effort to reduce the number of arithmetic operations within the realm of complex arithmetic, binary number system with base (−1+j), called complex binary number system, has been proposed in the literature which allows a complex number to be represented as single-unit instead of two separate units as in the base-2 binary number system. In this paper, the effects of shift operations on complex binary numbers have been examined and mathematical equations describing their behavior have been obtained. Analysis of these equations leads to the conclusion that the impact of shift operations on a complex binary number is, to a large extent, similar to typical multiply-by-2 (for per-bit shift-left) and divide-by-2 (for per-bit shift-right) operations of traditional base-2 binary number.

Towards Formulation of a Complex Binary Number System

For years complex numbers have been treated as distant relatives of real numbers despite their widespread applications in the fields of electrical and computer engineering. These days computer operations involving complex numbers are most commonly performed by applying divide-and-conquer technique whereby each complex number is separated into its real and imaginary parts, operations are carried out on each group of real and imaginary components, and then the final result of the operation is obtained by accumulating the individual results of the real and imaginary components. This technique forsakes the advantages of using complex numbers in computer arithmetic and there exists a need, at least for some problems, to treat a complex number as one unit and to carry out all operations in this form. In this paper, we have analyzed and proposed a (–1–j)-base binary number system for complex numbers. We have discussed the arithmetic operations of two such binary numbers and outlined work which is currently underway in this area of computer arithmetic.

The complex binary number system

Conversion algorithms and arithmetic procedures for a (-1 + j)-base binary number allow a given complex number to be represented as one unit. This should simplify the operations involving complex numbers in today's microprocessors. With the division process secure, we can implement the usual algorithms for calculating functions and processes such as logarithms, exponentials and trigonometric functions Currently, work is underway to write Java applets for the algorithms. We are planning to design an arithmetic unit based on the new binary system which will then be implemented using field programmable gate arrays.