Complementary Metal Oxide Semiconductor Compatibility Research Articles

CMOS-compatible high-speed endless automatic polarization controller

Automatic polarization controllers find broad applications in various fields, including optical communication, quantum optics, optical sensing, and biomedicine. Currently, the predominant integrated automatic polarization controllers employ either lithium niobate or silicon platforms. Devices based on lithium niobate platforms exhibit excellent performance; however, their fabrication complexity hinders widespread commercial deployment. In contrast, silicon-based integrated automatic polarization controllers benefit from complementary metal–oxide–semiconductor compatibility and reduced fabrication costs. Nevertheless, these silicon automatic polarization controllers suffer from low tracking speeds, peaking at merely 1.256 krad/s. In this study, we demonstrated a silicon high-speed automatic polarization controller, incorporating innovative thermal tuning units combined with a sophisticated control algorithm. The response time of these thermal tuning units has been markedly decreased to 3.2 µs. In addition, we have implemented a novel automatic polarization control algorithm, utilizing gradient descent techniques, on a field-programmable gate array control board. The synergy of the rapid thermal tuning unit and the advanced control algorithm has enabled us to attain an unprecedented polarization control speed of up to 20 krad/s, with this rate being solely limited by the capabilities of our characterization equipment. To our knowledge, this speed is the fastest yet reported for a silicon-based integrated automatic polarization control chip. The proposed device represents a significant breakthrough in the field of silicon-based automatic polarization controllers, paving the way for the future integration of additional polarization management devices. Such an advancement would mark a substantial leap in the realm of integrated photonics, bridging the gap between performance efficiency, cost-effectiveness, and technological integration.

Wafer‐Scale CMOS‐Compatible Electro‐Thermally Actuated Nanomechanical Non‐Volatile Switch with Out‐of‐Plane Electrode Configuration

AbstractThe rapid growth of data‐intensive applications has significantly heightened the concerns about power consumption in current computing systems. From this perspective, there have been substantial efforts to implement ultra‐low power systems by integrating nanoelectromechanical non‐volatile switches (NEM‐NVS) with near‐zero leakage current into standard complementary metal‐oxide‐semiconductor (CMOS) circuits. To practically harness the potential of the NEM‐NVS, it is imperative to achieve high performance, such as low voltage, high on/off ratio, and high reliability, while simultaneously ensuring wafer‐scale CMOS compatibility. However, achieving these requirements is still challenging, primarily due to their electrostatic operation, in‐plane electrode configuration, and conventional fabrication methods. Here, an electro‐thermally actuated nanomechanical non‐volatile switch (ETAN‐NVS) with an out‐of‐plane electrode configuration along with an 8‐inch wafer‐scale CMOS‐compatible fabrication method is reported. By introducing the electrothermal mechanism into a vertically actuated buckling nanostructure, the fabricated ETAN‐NVS attains CMOS‐level voltage (<2.4 V), a high on/off ratio (>108), and exceptional reliability (>1300 cycles). Moreover, a successful wafer‐scale demonstration of the ETAN‐NVS using only a CMOS‐compatible process paves the way for 3D integration with CMOS logic.

Organic-Inorganic Hybrid Synaptic Transistors: Methyl-Silsesquioxanes-Based Electric Double Layer for Enhanced Synaptic Functionality and CMOS Compatibility.

Electrical double-layer (EDL) synaptic transistors based on organic materials exhibit low thermal and chemical stability and are thus incompatible with complementary metal oxide semiconductor (CMOS) processes involving high-temperature operations. This paper proposes organic-inorganic hybrid synaptic transistors using methyl silsesquioxane (MSQ) as the electrolyte. MSQ, derived from the combination of inorganic silsesquioxanes and the organic methyl (-CH3) group, exhibits exceptional thermal and chemical stability, thus ensuring compatibility with CMOS processes. We fabricated Al/MSQ electrolyte/Pt capacitors, exhibiting a substantial capacitance of 1.89 µF/cm2 at 10 Hz. MSQ-based EDL synaptic transistors demonstrated various synaptic behaviors, such as excitatory post-synaptic current, paired-pulse facilitation, signal pass filtering, and spike-number-dependent plasticity. Additionally, we validated synaptic functions such as information storage and synapse weight adjustment, simulating brain synaptic operations through potentiation and depression. Notably, these synaptic operations demonstrated stability over five continuous operation cycles. Lastly, we trained a multi-layer artificial deep neural network (DNN) using a handwritten Modified National Institute of Standards and Technology image dataset. The DNN achieved an impressive recognition rate of 92.28%. The prepared MSQ-based EDL synaptic transistors, with excellent thermal/chemical stability, synaptic functionality, and compatibility with CMOS processes, harbor tremendous potential as materials for next-generation artificial synapse components.

Fully CMOS‐Based p‐Bits with a Bistable Resistor for Probabilistic Computing

AbstractProbabilistic computing can solve complex combinatorial optimization problems more efficiently than conventional deterministic computing. A probabilistic bit (p‐bit) with an n‐p‐n bistable resistor (biristor) is demonstrated for probabilistic computing. It is fabricated on an 8‐inch wafer with complementary metal–oxide–semiconductor (CMOS) compatible technologies. Its stochastic behavior of threshold switching, which is based on the phenomenon of a single transistor latch, provides output with a Boltzmann distribution. The p‐bit is composed of a biristor, a serial resistor, and a comparator. The output probability of the biristor‐based p‐bits shows a sigmoidal relationship with the input voltage, showing typical p‐bit characteristics. Invertible Boolean logic operations with p‐bits are demonstrated, and weighted maximum Boolean satisfiability problems are solved with high energy efficiency and accuracy. The biristor‐based p‐bits with perfect CMOS compatibility show sufficient device stability, demonstrating the possibility of large‐scale integration with a p‐bit array for complex optimization solvers.

Neuromorphic synaptic applications of HfAlOx-based ferroelectric tunnel junction annealed at high temperatures to achieve high polarization

HfO2-based ferroelectric tunnel junctions (FTJs) are promising nonvolatile memory types for neural network applications because of their speed, low power, and excellent complementary metal-oxide semiconductor compatibility. Specifically, HfAlOx (HAO) has led to extensive research efforts owing to its outstanding ferroelectric performance. This is a result of the fact that the atomic radius of Al is smaller than that of Hf. In this study, we investigate the metal–ferroelectric–semiconductor device with an Al doping concentration of 2% that was annealed at 900 °C. A high-remnant polarization (Pr) value of 39.85 µC/cm2 and endurance were achieved by using the polarization switching positive-up-negative-down measurement method at this annealing condition. Our device shows long-term potentiation and depression properties, including high linearity and multiple conductance states for neuromorphic applications. Moreover, paired-pulse facilitation was implemented to mimic human synaptic functions. The construction of 16 states comprising four bits was achieved by employing reservoir computing with the FTJ device functioning as a physical reservoir. Finally, the results obtained from the experiment show promising outcomes for the ferroelectric memory characteristics and synaptic properties of the manufactured HAO device.

A Route toward High-Detectivity and Low-Cost Short-Wave Infrared Photodetection: GeSn/Ge Multiple-Quantum-Well Photodetectors with a Dielectric Nanohole Array Metasurface.

High-detectivity and low-cost short-wave infrared photodetectors with complementary metal-oxide-semiconductor (CMOS) compatibility are attractive for various applications such as next-generation optical communication, LiDAR, and molecular sensing. Here, GeSn/Ge multiple-quantum-well (MQW) photodetectors with a dielectric nanohole array metasurface were proposed to realize high-detectivity and low-cost SWIR photodetection. The Ge nanohole array metasurface was utilized to enhance the light absorption in the GeSn/Ge MQW active layer. Compared with metallic nanostructures, the dielectric nanohole structure has the advantages of low intrinsic loss and CMOS compatibility. The introduction of metasurface architecture facilitates a 10.5 times enhanced responsivity of 0.232 A/W at 2 μm wavelength while slightly sacrificing the dark current density. Besides, the metasurface GeSn/Ge MQW photodetectors benefit 35% improvement in the 3 dB bandwidth compared to control GeSn/Ge MQW photodetectors, which can be attributed to the reduced RC delay. Due to the high responsivity and low dark current density, the room temperature specific detectivity at 2 μm is as high as 5.34 × 109 cm·Hz1/2/W, which is the highest among GeSn photodetectors and is better than commercial InSb and PbSe photodetectors operating at the similar wavelength. This work offers a promising approach for achieving low-cost and effective photodetection at 2 μm, contributing to the development of the 2 μm communication band.

Domain Wall Movement in Undoped Ferroelectric HfO2: A Rayleigh Analysis

The discovery of ferroelectricity in doped HfO2 in 2011 gave rise to quite a stir in the scientific world that persists up to this day. The complementary metal oxide semiconductor compatibility, as well as good scalability, enables versatile applications ranging from ferroelectric field effect transistors to ferroelectric tunnel junctions and neuromorphic devices. Stabilizing the metastable polar orthorhombic phase with space group Pca21-phase, which is responsible for the ferroelectricity in HfO2, is still challenging. We demonstrate for the first time a sputter deposition of undoped ferroelectric HfO2 on superconducting NbN electrodes, with a remanent polarization of 6.4 μC/cm2. Grazing incident X-ray diffraction on the layer structure, dynamic hysteresis measurements, and electron energy loss spectroscopy on fabricated devices indicate a HfO2 layer with low oxygen deficiency. Furthermore, no evidence of interdiffusion of oxygen or nitrogen at the interfaces is found. A sudden “wake-up” for the transition from the dielectric state to the ferroelectric state as well as no classical fatigue effect for the degradation of the ferroelectric performance are observed. These analyses are extended by an investigation of Rayleigh behavior using impedance spectroscopy. In that way, the domain wall flexibility is quantified and classified within different regimes of the various domain wall motions.

Phases in HfO2-Based Ferroelectric Thin Films and Their Integration in Low-Power Devices

HfO2-based ferroelectrics are applied in a large spectrum of electronic devices ranging from ultralow-power logic to nonvolatile memory. The efficacy of these ferroelectrics is that these offer complementary metal oxide semiconductor compatibility in conjunction with large coercive fields and ferroelectricity at sub-10 nm thicknesses. Because of these advantages compared with conventional lead-based thick perovskite films (>50 nm), the present spotlight article focuses on their use to surpass the physical limit of the subthreshold swing (60 mV/dec at room temperature) of field-effect transistors (FETs) via the stabilization of the negative capacitance. In addition, the discussion on HfO2-ferroelectric-based memories is focused on two-terminal random-access devices, tunnel junctions, three-terminal ferroelectric FETs and their respective 3D stacked architectures.

Domain Wall Evolution in Hf 0.5 Zr 0.5 O 2 Ferroelectrics under Field-Cycling Behavior

HfO 2 -based ferroelectrics have evoked considerable interest owing to the complementary metal–oxide semiconductor compatibility and robust ferroelectricity down to a few unit cells. However, the unique wake-up effect of HfO 2 -based ferroelectric films severely restricts the improvement of their performance. In particular, the domain structure is an important characteristic of ferroelectric materials, which still has not been well understood in HfO 2 -based ferroelectrics. In this work, a Hf 0.5 Zr 0.5 O 2 ferroelectric thin film is grown on a typical Si substrate buffered with TiN electrode. The 90° domains of the Pca 2 1 ferroelectric phase with head-to-tail and tail-to-tail structures can be observed by C s-corrected scanning transmission electron microscope under their pristine condition. After waking up, the 180° domain is displayed in the ferroelectric phase. The remarkable differences in domain walls for 90° and 180° domains are characterized by qualitatively mapping the polarization distributions at the atomic scale. The domain wall changes from the [ 1 0 1 ¯ ] of the Hf 0.5 Zr 0.5 O 2 film to the [001] of the Hf 0.5 Zr 0.5 O 2 film. This result provides fundamental information for understanding the domain structure of HfO 2 -based ferroelectrics.

Piezoelectric Micromachined Ultrasound Transducer Technology: Recent Advances and Applications

The objective of this article is to review the recent advancement in piezoelectric micromachined ultrasound transducer (PMUT) technology and the associated piezoelectric materials, device fabrication and characterization, as well as applications. PMUT has been an active research topic since the late 1990s because of the ultrasound application needs of low cost large 2D arrays, and the promising progresses on piezoelectric thin films, semiconductors, and micro/nano-electromechanical system technology. However, the industrial and medical applications of PMUTs have not been very significant until the recent success of PMUT based fingerprint sensing, which inspired growing interests in PMUT research and development. In this paper, recent advances of piezoelectric materials for PMUTs are reviewed first by analyzing the material properties and their suitability for PMUTs. PMUT structures and the associated micromachining processes are next reviewed with a focus on the complementary metal oxide semiconductor compatibility. PMUT prototypes and their applications over the last decade are then summarized to show the development trend of PMUTs. Finally, the prospective future of PMUTs is discussed as well as the challenges on piezoelectric materials, micro/nanofabrication and device integration.

Recent Progress of Supercontinuum Generation in Nanophotonic Waveguides

AbstractSupercontinuum (SC) has opened up possibilities for numerous applications in optical communications, signal processing, metrology, and spectroscopy. Supercontinuum generation (SCG) in the integrated nonlinear platforms has attracted much interest recently, due to its fundamental advantages in terms of complementary metal oxide semiconductor compatibility, low power consumption, compact size, and cost‐effectiveness. In this paper, the latest progress on various types of nanophotonic waveguides for SCG is reviewed. The material properties of silicon, germanium, silicon–germanium alloy, silicon nitride, silica, chalcogenide, III–V materials, lithium niobate, and other materials, which are used as nonlinear media for SCG are discussed. The wavelength‐dependent nonlinear Kerr index, material, and nonlinear loss of the waveguides are taken into account. This review mainly focuses on the SCG resulting from the cubic χ(3) nonlinearity processes pumped by the femtosecond pulse. The recent representative SCG works based on the integrated optical waveguides are summarized, and further classified according to the dispersion characteristics. Furthermore, different types of spectra broadening mechanisms in details according to the classifications are analyzed. Perspectives on the SC spectral coverage, the realization of various dispersion curves, and the novel materials, which are the key aspects of the SCG in nanophotonic waveguides are provided.

Zinc-hyperdoped silicon photodetectors fabricated by femtosecond laser with sub-bandgap photoresponse

Developing a low-cost, room-temperature operated and complementary metal-oxide-semiconductor (CMOS) compatible near infrared silicon photodetector is of interest for creating all-silicon optoelectronic integrated circuits. However, a silicon-based photodetector usually cannot respond to infrared light with wavelengths longer than 1100 nm, due to the bandgap (1.12 eV) limitation of silicon. Here, we present a zinc-hyperdoped silicon (Si:Zn)-based photodetector that exhibits an enhanced sub-bandgap photoresponse. The Si:Zn shows a broadband infrared absorption over 50%, with a zinc concentration reaches 4.66 × 1019 cm−3 near the surface. The responsivity of the Si:Zn photodetector reaches 0.68 mAW−1 at 1550 nm, −1 V bias, with a rise and fall time of 0.560 ms and 0.445 ms, respectively. The Si:Zn has the potential for a wide range of applications in various fields due to its combination of low cost, CMOS compatibility, and room-temperature operating conditions.

High-Performance Flexible Hf0.5Zr0.5O2 Ferroelectric Thin-Film Transistors on PI Substrate By Solution Process

Flexible electronics such as wearable electronics, electronic skins, implantable devices, and flexible displays are started influencing our lives in various aspects due to their lightweight, portability, and human-friendly interface. In these applications, nonvolatile memory (NVM) and synaptic devices are essential elements to implement high speed integrated circuits and neuromorphic computing at low power consumption. Perovskite-based ferroelectric (FE) materials such as Pb(Zr,Ti)O3 (PZT), BaTiO3 (BTO), and SrBi2Ta2O9 (SBT) have been studied widely because of their fast switching speed, large polarization, and high dielectric constant. However, it is very difficult to integrate these materials with conventional semiconductor technology owing to their poor compatibility with complementary metal-oxide-semiconductor (CMOS) technology. Therefore, hafnium (Hf) based FE-materials could be a suitable candidate for next-generation flexible electronics. Which exhibits immense prospects due to their excellent performance, CMOS compatibility, high scalability, and chemical simplicity with various dopants (Al, Zr, Gd, La, Sr, and Y). Among these, Zr-doped HfO2 (Hf0.5Zr0.5O2 (HZO)) has been attracted intensive attention because of its low annealing temperature and large remnant polarization.We study the inverted staggered structured flexible HZO FE-TFTs on polyimide (PI) substrate with zinc oxide (ZnO) as the active layer. A 50 nm molybdenum (Mo) layer was deposited by sputtering and patterned to form the gate electrode. Then, the HZO precursor solution was spin-coated at 2000 rpm for 30 s and cured at 250 °C on a hot plate for 5 min, followed by UV/O3 curing at 100 °C for 5 min in ambient air as a gate insulator (GI). Thereafter, the Al2O3 precursor solution was deposited as a capping layer on top of the HZO film using the same process steps but the rpm was 3500. The crystallization was performed by furnace annealing at 450 °C for 2 h in N2 environment. The thicknesses of HZO and Al2O3 films are 20 and 15 nm, respectively. Afterwards, the ZnO (25 nm) channel layer was deposited using spray pyrolysis at 350 °C substrate temperature. The ZnO and GI films were patterned sequentially to form the active island and via-hole, respectively. Finally, a 50 nm thick Mo film was sputtered and patterned to form the source/drain (S/D) electrodes.The origin of ferroelectricity in HZO GI was analyzed by grazing incidence X-ray diffraction (GI-XRD) measurement from film and drain current vs gate voltage (ID vs VGS), gate leakage current (IG), and drain current vs drain voltage (ID vs VDS) characteristics measurements from TFT structures using Agilent 4156C semiconductor parameter analyzer. Channel width and length were 50 and 10 μm, respectively.Fig. 1 (a) shows the schematic structure of an inverted staggered HZO FE-TFT on PI substrate. Fig. 1 (b) and (c) show the ID vs VGS characteristics with anticlockwise hysteresis of HZO and Al2O3 capped HZO TFTs on PI substrate. The Al2O3 capped HZO TFT exhibits clear ferroelectric property with a large memory window (MW) of ≈1.9 V. A thin Al2O3 capping layer on top of HZO enhances the microstructure and morphology of HZO even at a low annealing temperature of 450 °C and helps to induce the ferroelectricity in HZO GI. Fig. 1 (d) shows the photograph of the measurement setup of HZO FE-TFTs during electrical measurements under tensile stress at 2 mm. Fig. (e) and (f) exhibit the ID vs VGS and IG vs VGS characteristics with anticlockwise hysteresis of Al2O3 capped HZO FE-TFTs under different tensile stress, respectively. The ID vs VGS curves exhibit almost identical performance during forward and reverse bias at different bending radii without showing significant changes in the electrical characteristics. The MWs were evaluated under different bending radii and they show the almost same value of ≈1.9 V from flat state and down to 2 mm bent state. The corresponding IG vs VGS curves at different bending radii exhibit a clear butterfly shape with current peaks at about ±2 V. These findings indicate that the solution-processed flexible HZO FE-TFTs have high stability under mechanical stress and contain ferroelectricity even at 2 mm bending radius without deteriorating MW. Therefore, the low-cost solution-processed FE-HZO GI has significant potential to be employed in nonvolatile memory and synaptic devices for future flexible electronics. Figure 1

Vertical ferroelectric thin-film transistor array with a 10-nm gate length for high-density three-dimensional memory applications

Hafnia-based ferroelectric thin-film transistors (FeTFTs) are regarded as promising candidates for future nonvolatile memory devices owing to their low power consumption, high operational speed, and complementary metal–oxide–semiconductor compatibility. However, the scalability of hafnia-based materials and the feasibility of three-dimensional (3D) device fabrication should be confirmed for ultrahigh-density memory applications. In this work, we demonstrate that FeTFTs can be scaled down to a 10-nm dimension using the vertical structure with a hafnia-based ferroelectric gate insulating layer and an oxide semiconductor channel. We show that such vertical FeTFTs can be operated with an effective device size of 0.005 μm2, a fast operation speed of <100 ns, and a high endurance of 108 cycles. Additionally, the string-level NAND operation is demonstrated using the vertical FeTFT array. Finally, device simulation confirms the possibility of ultrahigh-density 3D ferroelectric NAND with 200 gate stacks. These results demonstrate the ultrahigh scalability of FeTFTs as a promising candidate for next-generation 3D nonvolatile memory.

Microstructural evolution and ferroelectricity in HfO2 films

Ferroelectric (FE) materials, which typically adopt the perovskite structure with non-centrosymmetry and exhibit spontaneous polarization, are promising for applications in memory, electromechanical and energy storage devices. However, these advanced applications suffer from the intrinsic limitations of perovskite FEs, including poor complementary metal oxide semiconductor (CMOS) compatibility and environmental issues associated with lead. Hafnium oxide (HfO2), with stable bulk centrosymmetric phases, possesses robust ferroelectricity in nanoscale thin films due to the formation of non-centrosymmetric phases. Owing to its high CMOS compatibility and high scalability, HfO2 has attracted significant attention. In the last decade, significant efforts have been made to explore the origin of the ferroelectricity and factors that influence the FE properties in HfO2 films, particularly regarding the role of microstructure, which is vital in clarifying these issues. Although several comprehensive reviews of HfO2 films have been published, there is currently no review focused on the relationship between microstructure and FE properties. This review focuses on the microstructure-property relationships in FE polycrystalline and epitaxial HfO2 films. The crystallographic structures and characterization methods for HfO2 polymorphs are first discussed. For polycrystalline HfO2 films, the microstructure-FE properties relationships, driving force and kinetic pathway of phase transformations under growth parameters or external stimuli are reviewed. For epitaxial films, the lattice matching relations between HfO2 films and substrates and the corresponding impact on the FE properties are discussed. The FE properties between polycrystalline and epitaxial HfO2 films are compared based on their different microstructural characteristics. Finally, a future perspective is given for further investigating FE HfO2 films.

Wafer-Scale Epitaxy of Flexible Nitride Films with Superior Plasmonic and Superconducting Performance.

Transition-metal nitrides (e.g., TiN, ZrN, TaN) are incredible materials with excellent complementary metal-oxide semiconductor compatibility and remarkable performance in refractory plasmonics and superconducting quantum electronics. Epitaxial growth of flexible transition-metal nitride films, especially at the wafer scale, is fundamentally important for developing high-performance flexible photonics and superconducting electronics, but the study is rare thus far. This work reports the high-quality epitaxy of 2-in. titanium nitride (TiN) films on flexible fluorophlogopite-mica (F-mica) substrates via reactive magnetron sputtering. Combined measurements of spectroscopic ellipsometry and electrical transport reveal the superior plasmonic and superconducting performance of TiN/F-mica films owing to the high single crystallinity. More interestingly, the superconductivity of these flexible TiN films can be manipulated by the bending states, and enhanced superconducting critical temperature TC is observed in convex TiN films with in-plane tensile strain. Density functional theory calculations reveal that the strain can tune the electron-phonon interaction strength and the resultant superconductivity of TiN films. This study provides a promising route toward integrating scalable single-crystalline transition-metal nitride films with flexible electronics for high-performance plasmonics and superconducting electronics.

High-efficiency all-silicon metasurfaces with 2π phase control based on multiple resonators

Flat all-silicon metasurfaces have significant potential as ultrathin optical devices and systems that offer the advantages of mature fabrication technology and complementary metal–oxidesemiconductor compatibility. However, previously reported all-silicon metasurfaces suffered from the drawback of low transmission owing to the large intrinsic reflection loss induced by high-index silicon substrates. To achieve high transmission, silicon-based metasurfaces are usually composed of low-index dielectric substrates and silicon pillars. It is still a substantial challenge for an all-silicon metasurface to realize high transmission. In this paper, we present a design to overcome this drawback by integrating two-dimensional periodic arrays of subwavelength silicon cylinders as perfect antireflection resonators on the bottom and top surfaces of the silicon substrate. Using this design, a uniform array of all-silicon unit cells comprising a metasurface can exhibit high transmission, up to 99.5%, at the target wavelength of 10.6 µm, which indicates a significant improvement over the design without the antireflection scheme. Furthermore, as an example of a metasurface application, an all-silicon polarization-insensitive metalens is built based on a series of all-silicon unit cells with high transmission and 2π phase control, which indicates subwavelength-focusing capability. The transmission of the entire metalens reached 81.9%, and the focusing efficiency was 71%. This study not only recommends a means to develop ultrathin all-silicon optical devices with high efficiency but also proposes a general approach to achieve high-quality metasurfaces based on a single high-index dielectric.

Cointegration of single-transistor neurons and synapses by nanoscale CMOS fabrication for highly scalable neuromorphic hardware.

Cointegration of multistate single-transistor neurons and synapses was demonstrated for highly scalable neuromorphic hardware, using nanoscale complementary metal-oxide semiconductor (CMOS) fabrication. The neurons and synapses were integrated on the same plane with the same process because they have the same structure of a metal-oxide semiconductor field-effect transistor with different functions such as homotype. By virtue of 100% CMOS compatibility, it was also realized to cointegrate the neurons and synapses with additional CMOS circuits. Such cointegration can enhance packing density, reduce chip cost, and simplify fabrication procedures. The multistate single-transistor neuron that can control neuronal inhibition and the firing threshold voltage was achieved for an energy-efficient and reliable neural network. Spatiotemporal neuronal functionalities are demonstrated with fabricated single-transistor neurons and synapses. Image processing for letter pattern recognition and face image recognition is performed using experimental-based neuromorphic simulation.

Ultra‐Compact High‐Speed Polarization Division Multiplexing Optical Receiving Chip Enabled by Graphene‐on‐Plasmonic Slot Waveguide Photodetectors

AbstractPolarization multiplexing technology is widely adopted for increasing the capacity in optical communication systems. Especially, silicon‐based integrated polarization division multiplexing (PDM) optical receivers with large bandwidth therein play an important role, which are crucial for on‐chip large‐capacity optical interconnection. Here, a silicon‐based PDM optical receiving chip is enabled by two‐dimensional grating couplers and graphene‐on‐plasmonic slot waveguide photodetectors. Utilizing the advantages of the designed focusing two‐dimensional grating couplers and plasmonic‐slot‐waveguide‐enhanced graphene–light interaction, the optical receiving chip is achieved with an ultra‐small footprint, a bandwidth exceeding 70 GHz and a reception of PDM signals in a line rate of 128 Gbit s−1 non‐return‐to‐zero and 224 Gbit s−1 four‐level pulse‐amplitude‐modulation at 1550 nm, accompanied by the bit error rates lower than the KP4 forward error correction threshold and 15% soft‐decision forward error correction threshold, respectively. Comparing with receiving the single‐polarization state, simultaneous receiving dual‐polarization state introduces about 1 dB additional power penalty because of inter‐polarization crosstalk. The graphene‐plasmonic PDM optical receiving chip can greatly improve the line rate of the system, showing its unique advantages of small footprint, high speed, large bandwidth, low crosstalk and complementary metal–oxide–semiconductor compatibility, which can be potentially used in the next generation silicon‐based high‐speed optical communication.

Interface Engineering of a Silicon/Graphene Heterojunction Photodetector via a Diamond-Like Carbon Interlayer.

Silicon/graphene nanowalls (Si/GNWs) heterojunctions with excellent integrability and sensitivity show an increasing potential in optoelectronic devices. However, the performance is greatly limited by inferior interfacial adhesion and week electronic transport caused by the horizontal buffer layer. Herein, a diamond-like carbon (DLC) interlayer is first introduced to construct Si/DLC/GNWs heterojunctions, which can significantly change the growth behavior of the GNWs film, avoiding the formation of horizontal buffer layers. Accordingly, a robust diamond-like covalent bond with a remarkable enhancement of the interfacial adhesion is yielded, which notably improves the complementary metal oxide semiconductor compatibility for photodetector fabrication. Importantly, the DLC interlayer is verified to undergo a graphitization transition during the high-temperature growth process, which is beneficial to pave a vertical conductive path and facilitate the transport of photogenerated carriers in the visible and near-infrared regions. As a result, the Si/DLC/GNWs heterojunction detectors can simultaneously exhibit improved photoresponsivity and response speed, compared with the counterparts without DLC interlayers. The introduction of the DLC interlayer might provide a universal strategy to construct hybrid interfaces with high performance in next-generation optoelectronic devices.