Compiler Technology Research Articles

R-Blocks: an Energy-Efficient, Flexible, and Programmable CGRA

Emerging data-driven applications in the embedded, e-Health, and internet of things (IoT) domain require complex on-device signal analysis and data reduction to maximize energy efficiency on these energy-constrained devices. Coarse-grained reconfigurable architectures (CGRAs) have been proposed as a good compromise between flexibility and energy efficiency for ultra-low power (ULP) signal processing. Existing CGRAs are often specialized and domain-specific or can only accelerate simple kernels, which makes accelerating complete applications on a CGRA while maintaining high energy efficiency an open issue. Moreover, the lack of instruction set architecture (ISA) standardization across CGRAs makes code generation using current compiler technology a major challenge. This work introduces R-Blocks; a ULP CGRA with HW/SW co-design tool-flow based on the OpenASIP toolset. This CGRA is extremely flexible due to its well-established VLIW-SIMD execution model and support for flexible SIMD-processing, while maintaining an extremely high energy efficiency using software bypassing, optimized instruction delivery, and local scratchpad memories. R-Blocks is synthesized in a commercial 22-nm FD-SOI technology and achieves a full-system energy efficiency of 115 MOPS/mW on a common FFT benchmark, 1.45× higher than a highly tuned embedded RISC-V processor. Comparable energy efficiency is obtained on multiple complex workloads, making R-Blocks a promising acceleration target for general-purpose computing.

Enhanced Compiler Technology for Software-based Hardware Fault Detection

Software-Implemented Hardware Fault Tolerance (SIHFT) is a modern approach for tackling random hardware faults of dependable systems employing solely software solutions. This work extends an automatic compiler-based SIHFT hardening tool called ASPIS, enhancing it with novel protection mechanisms and overhead-reduction techniques, also providing an extensive analysis of its compliance with the non-trivial workload of the open-source Real-Time Operating System FreeRTOS. A thorough experimental fault-injection campaign on an STM32 board shows how the system achieves remarkably high tolerance to single-event upsets and a comparison between the SIHFT mechanisms implemented summarises the trade-off between the overhead introduced and the detection capabilities of the various solutions.

Enhancing XML-based Compiler Construction with Large Language Models: A Novel Approach

Considering the prevailing rule of Large Language Models (LLMs) applications and the benefits of XML in a compiler context. This manuscript explores the synergistic integration of Large Language Models with XML-based compiler tools and advanced computing technologies. Marking a significant stride toward redefining compiler construction and data representation paradigms. As computing power and internet proliferation advance, XML emerges as a pivotal technology for representing, exchanging, and transforming documents and data. This study builds on the foundational work of Chomsky's Context-Free Grammar (CFG). Recognized for their critical role in compiler construction, to address and mitigate the speed penalties associated with traditional compiler systems and parser generators through the development of an efficient XML parser generator employing compiler techniques. Our research employs a methodical approach to harness the sophisticated capabilities of LLMs, alongside XML technologies. The key is to automate grammar optimization, facilitate natural language processing capabilities, and pioneer advanced parsing algorithms. To demonstrate their effectiveness, we thoroughly run experiments and compare them to other techniques. This way, we call attention to the efficiency, adaptability, and user-friendliness of the XML-based compiler tools with the help of these integrations. And the target will be the elimination of left-recursive grammars and the development of a global schema for LL(1) grammars, the latter taking advantage of the XML technology, to support the LL(1) grammars construction. The findings in this research not only underscore the signification of these innovations in the field of compilation construction but also indicate a paradigm move towards the use of AI technologies and XML in the context of the resolution of programming traditional issues. The outlined methodology serves as a roadmap for future research and development in compiler technology, which paves the way for open-source software to sweep across all fields. Gradually ushering in a new era of compiler technology featuring better efficiency, adaptability, and all CFGs processed through existing XML utilities on a global basis.

Compiler‐driven approach for automating nonblocking synchronization in concurrent data abstractions

SummaryThis paper presents an extended version of our previous work on using compiler technology to automatically convert sequential C++ data abstractions, for example, queues, stacks, maps, and trees, to concurrent lock‐free implementations. A key difference between our work and existing research in software transactional memory (STM) is that our compiler‐based approach automatically selects the best state‐of‐the‐practice nonblocking synchronization method for the underlying sequential implementation of the data structure. The extended material includes a broader collection of the state‐of‐the‐practice lock‐free synchronization techniques, additional formal correctness proofs of the overall integration of the different synchronizations in our system, and a more comprehensive experimental study of the integrated techniques. We evaluate our compiler‐generated nonblocking data structures both by using a collection of micro‐benchmarks, including the Synchrobench suite, and by using a multi‐threaded application Dedup from PARSEC. Our automatically synchronized code attains performance competitive to that of concurrent data structures manually‐written by experts and much better performance than heavier‐weight support by STM.

A Multithreaded Algorithm for the Computation of Sample Entropy

Many popular entropy definitions for signals, including approximate and sample entropy, are based on the idea of embedding the time series into an m-dimensional space, aiming to detect complex, deeper and more informative relationships among samples. However, for both approximate and sample entropy, the high computational cost is a severe limitation. Especially when large amounts of data are processed, or when parameter tuning is employed premising a large number of executions, the necessity of fast computation algorithms becomes urgent. In the past, our research team proposed fast algorithms for sample, approximate and bubble entropy. In the general case, the bucket-assisted algorithm was the one presenting the lowest execution times. In this paper, we exploit the opportunities given by the multithreading technology to further reduce the computation time. Without special requirements in hardware, since today even our cost-effective home computers support multithreading, the computation of entropy definitions can be significantly accelerated. The aim of this paper is threefold: (a) to extend the bucket-assisted algorithm for multithreaded processors, (b) to present updated execution times for the bucket-assisted algorithm since the achievements in hardware and compiler technology affect both execution times and gain, and (c) to provide a Python library which wraps fast C implementations capable of running in parallel on multithreaded processors.

Construction of Ideological and Political Cases for the Course "Compiling Technology"

This article aims at the current situation of college students' value shaping and emotional psychology that have not yet taken shape. By constructing ideological and political case construction ideas, ideological and political elements such as philosophy, ethics and regulations, and a sense of social responsibility are integrated into the teaching process of compilation technology. In the teaching process, dogmatic preaching should be avoided, and the basic teaching method of ideological and political education should be from perceptual to rational, from concrete to abstract, and from special to general. Ideological and political education should be integrated into the teaching of professional skills and knowledge. Taking a class teaching design as an example, this article introduces how to organically combine ideological and political education with professional knowledge.

Compiler Technologies in Deep Learning Co-Design: A Survey

With the rapid development of deep learning applications, general-purpose processors no longer suffice for deep learning workloads because of the dying of Moore’s Law. Thus, computer architecture innovation has entered a golden age for domain-specific design, which has led to a demand for new compilation technologies to facilitate cross-layer optimization. Historically, hardware and software have been collaboratively designed. Today, these co-design ideas still benefit the deep learning field in both academia and industry, encompassing additional aspects and layers. In this study, we elaborate on past and recent works on deep learning compilers and co-design while focusing on the combination of these two technologies, which we believe is the trend in the new deep learning era. After summarizing the existing compilation technologies and co-design approaches, we propose a domain-specific compilation framework, the Buddy Compiler, for a typical deep learning co-design system.

PERSONAL THOUGHTS ON AUTOMATION, PROGRAMMING CULTURE, AND MODELBASED SOFTWARE ENGINEERING

When compared to more conventional development techniques, model-based software engineering (MBSE), a methodology for developing software, is characterized in part by much higher levels of automation. Many important components of development involve the use of computer-based tools, such as authoring support (many MBSE languages are primarily visual), automatic or semi-automatic verification, the automated conversion of requirements into corresponding programmers, and many more. There is little question that automation, when correctly designed and achieved, may significantly boost the productivity of software developers and improve the quality of their programme, given the historical examples, such as the advent of compilation technology. Therefore, it becomes sense to predict that MBSE will swiftly overtake other software development methods, much to how computer-aided design methods for hardware were quickly adopted. However, this hasn't happened. This is an opinion piece that draws from the author's extensive knowledge of MBSE and its use in business. In it, we look at the factors that led to this paradoxical situation.

Path and Mechanism Optimization of Integrating Tourism Planning into Territorial Spatial Planning System

Tourism planning is a kind of protective development planning for scientific and rational optimization of tourism space and tourism resources. At present, there have been problems in tourism planning, such as unclear role, imperfect content system and immature compilation technology, which have caused difficulties in landing tourism planning and conflicts with other planning. Under the background of territorial spatial planning system reform, tourism planning into the territorial spatial planning system has great theoretical significance and very urgent practical significance. Based on the analysis of the existing problems and causes of tourism planning, this paper puts forward that ' multi-planning ' should include tourism demand and influence in the process of ' integration ', and the optimization path of tourism planning compilation system oriented by integrating into the territorial spatial planning system. And from the census of tourism resources, modify the general rules of tourism planning, the introduction of tourism planning preparation methods, the establishment of tourism sector spatial information subsystem, strengthen the typical tourism destinations spatial planning guidance and tourism planning and other ' multi planning ' department discussion and exchange of six aspects put forward tourism planning into the territorial spatial planning system optimization strategy. The purpose is to standardize the preparation of tourism planning, actively integrate into the territorial spatial planning system, promote the internal cohesion of the ' five levels and three categories ‘territorial spatial planning system, and scientifically guide the planning and construction of tourism destinations.

Research on Village Planning Compilation Technology Based on ArcGIS

Research on Village Planning Compilation Technology Based on ArcGIS

A new compilation method of general standard test load spectrum for aircraft engine

Abstract Based on the existing compilation technology of load spectrum, this paper proposed a new method for the compilation of the general standard test load spectrum of aircraft engine. On the premise of meeting operating requirements of the actual condition and the basic life test, it simplifies the test load conditions and overcomes the shortage of the existing technology. According to the actual flight of aircraft engine, the load spectrum of a flight mission profile was divided into three parts: the take-off phase, the middle-flight phase, and the landing phase. The proposed compilation method ensures that the generated load spectrum of the take-off phase and landing phase is consistent with the actual flight, and the load spectrum of the middle-flight phase is programmed according to a certain method so that a simple load cycle sequence can be implemented. On that basis, the load spectrum was analyzed and compiled by subsection. The general standard test load spectrum lays the foundation for carrying out the life test and reduces the error between the test and practical use. Since the parameters of the engine load are standardized in the process of compiling, the method can be widely used in various types of engines.

A closer look at process-based simulation with stackless coroutines

Validating discrete-event computer simulations for a particular problem domain often involves the help of a domain expert. This means that a certain structural closeness between the simulator’s inner workings and the modeled system is needed in order to allow the expert to follow the implementation in analogy. Process-based simulation imposes an object-oriented view onto a modeled system which allows for a high degree of structural closeness in most cases. In comparison, event-based simulation requires a procedural definition with a relatively low degree of structural closeness for many cases, but outperforms the process-based approach both in terms of performance and portability. Recent advances in compiler technology have introduced a portable way of rewriting thread-based code into event-based code, effectively providing the means to implement portable green-threads in compiled system languages.

Towards Faster Execution of Ensemble ML Bootstrap Based Techniques.

Algorithms for ensemble methods (EM) based on bootstrap aggregation often perform copious amount of redundant computations (RC) thus limiting their practicality. Given this constraint, we propose a framework that views these algorithms as a collection of computational units (cu), a tightly coupled set of both mathematical operations and data. This view facilitates a reduction in RC (RRC), thereby allowing for faster execution plans. Inspired by the floor tiling approach in VLSI, we look to engineer solutions for RRC while possibly reconfiguring the underlying computing system's compiler technology stack. We start by showing that under the assumption that the computational system has unbounded but finite memory (i.e., the memory is large enough to hold all intermediate values) and that each cu has a uniform cost, our approach reduces to a well-studied directed bandwidth problem for the directed acyclic graphs (DAGs). Next, we consider a more realistic scenario where the computing system has limited memory and concurrent execution while still assuming a uniform cost. Using a new notion of (r,s) set cover of a DAG (nodes representing computational units and edges representing their interdependencies) we formulate the problem of reducing redundant computational steps in EM as a variation of a directed bandwidth problem. We show that the graph's minimum bandwidth is closely related to memory requirements for studying RRC. Finally, our preliminary experimental results are supportive of the proposed approach for RRC and promising that it can be applied to a broader set of algorithms in decision sciences.

Application and validation of the fugitive dust source emission inventory compilation method in Xiong'an New Area, China

The development of a refined fugitive dust emission inventory is vital for prevention and control of air pollution. In this study, a fugitive dust emission inventory of soil dust (SD), road dust (RD), and construction dust (CD) in Xiong'an New Area (XANA) for 2020 was developed by collecting activity data and combining remote sensing and field investigation data based on a popular compilation technology in China. The CALPUFF model was used to elucidate the contribution characteristics of dust sources to ambient particulate matter (PM), and the accuracy of the dust emission inventory compilation method was verified. The results show that the total emissions of PM10 and PM2.5 were 43,081.14 tons and 9701.69 tons, respectively. Meanwhile, RD and CD were the main emission sources, accounting for over 98.49% of the total emissions. The total contribution from the different types of dust sources to the ambient PM10 was 42.59 μg/m3 (29.38%), with the contribution of RD (32.63 μg/m3, 22.51%) being approximately three times that of CD (9.78 μg/m3, 6.74%). Roads were the main source of fugitive dust, but large-scale infrastructure construction was the main cause of the high emission and high contribution of RD. The results show that the emission inventory compilation method can be used to estimate the emissions of dust sources, while the method used to calculate the emission of SD may be more suitable for dry and semi-dry areas with less rainfall. It was also found that when the dust emissions stay stable, the contribution of dust sources to the ambient PM10 in different seasons can vary by 3–4 times. Therefore, under adverse meteorological conditions, it is necessary to strengthen the control of various dust sources and reduce the influence of human factors on them.

RETRACTED ARTICLE: Multimedia music education based on adaptive genetic algorithm and heterogeneous processors

Various factors in the stock market are intricate and complex, and changes in the primary and secondary relationship are uncertain. The investigation found that the stock price is affected by factors such as buyers and sellers, stock policies, investors and other factors. Considering these factors, it is easy to draw a conclusion: stock price changes are random. After understanding the most obvious characteristics of stock prices, I found that there are very few high-precision stock price prediction models in the market. Under this background, it is necessary to study high-precision stock price prediction models. After looking up information from multiple parties, the method chosen by the author is a new method formed by the combination of BP neural network and genetic algorithm. The investigation found that the random initial weight of BP neural network and genetic algorithm will enter an infinite loop due to the local optimal solution. The author made some improvements, because adaptive genetic algorithm can solve the problem of initial weight of BP neural network, so BP The neural network is improved by an adaptive genetic algorithm, and a high-precision stock prediction model can be obtained. Heterogeneous processors are increasingly used in the field of high-performance computing, especially in the application of processor cores, which provides huge potential for parallel computing, but it also brings huge challenges. Higher accuracy requires a large knowledge system and a more advanced programming model. People need to master a more advanced programming model. Because for most programmers, this requirement is almost impossible to complete, so I thought of another way, using parallel compilation to complete the work. At present, the parallel compilation technology for heterogeneous architecture has achieved fruitful research results, but there are still many problems that need to be analyzed and solved. For these problems, the author proposes to create a new data area that transfers data to the nested external calculation, so the data transfer only occurs before and after the loop calculation, thereby avoiding the internal parallel loop in the iterative calculation process. Multiple copies of external serial loop data. Experiments show that these storage optimization methods can optimize the transmission, storage and access of different levels and different granularities of data, thereby improving the performance of the generated parallel programs to varying degrees.

ChordMap: Automated Mapping of Streaming Applications Onto CGRA

Streaming applications, consisting of several communicating kernels, are ubiquitous in the embedded computing systems. The synchronous data flow (SDF) is commonly used to capture the complex communication patterns among the kernels. The general-purpose processors cannot meet the throughput requirement of the compute-intensive kernels in the current and emerging applications. The coarse-grained reconfigurable arrays (CGRAs) are well-suited to accelerate the individual kernel and the compiler technology is well-developed to support the mapping of a kernel onto a CGRA accelerator. However, the system-level mapping of the entire streaming application onto a resource-constrained CGRA to maximize throughput remains unexplored. We introduce a novel CGRA mapper, called <i>ChordMap</i>, to automatically generate a high-quality mapping of streaming applications represented as SDF onto CGRAs. We propose an optimized spatio-temporal mapping with modulo-scheduling that judiciously employs concurrent execution of multiple kernels to improve parallelism and thereby maximize throughput. <i>ChordMap</i> achieves, on average, <inline-formula> <tex-math notation="LaTeX">$1.74\times $ </tex-math></inline-formula> higher throughput across eight streaming applications compared to the state-of-the-art.

城市生态观测:质量控制对象、体系和规范编制

城市生态系统长期观测是开展城市生态安全评价和制定人居环境健康管理政策的基础。为了确保城市生态观测数据的准确性和科学性，通过辨识城市生态观测质量控制的概念，基于"人机料法环"理论构建了城市生态观测质量控制体系，结合城市生态观测质量控制相关规范的编制与实施现状，探讨了城市生态观测质量控制规范的编制技术。结果表明：（1）城市生态观测质量控制是面向城市生态观测内容（要素、空间格局、功能、服务），为保证生态观测全过程质量要求、提高生态观测结果的准确性而实施的质量控制活动和措施。（2）城市生态观测质量控制体系可从对象和过程这两个维度进行界定：对象维度方面，包括"人"-人员、"机"-仪器设备、"料"-数据、"法"-文件和"环"-观测过程5个方面；过程维度方面，涵盖城市生态观测全过程，包括城市生态观测前期准备工作、观测过程中以及观测后的数据录入、审核与评价等环节的质量控制措施。（3）我国已发布的生态观测相关技术标准中，发布的时间越晚，质量控制内容越完整，目前生态观测相关标准共102则，仅38则明确提出了质量控制具体要求。（4）《城市生态观测质量控制规范》编制需包含质量体系和质量控制措施两项技术内容，主要包括前引、正文和附录三个章节，对生态观测全过程质量保证和质量控制技术进行规定。;Long-term urban ecosystem observation is the basis for urban ecological safety evaluation and habitat health management policy formulation. In order to ensure the accuracy and scientificity of urban ecological observation data, this research first established an urban ecological observation quality control system based on the theory of Human-Machine-Material-Method-Environment by identifying the concept of urban ecological observation quality control, and discussed the compilation technology of urban ecological observation quality control specification by combining the current situation of preparation and implementation of urban ecological observation quality control specification. The results show that: (1) Quality control of urban ecological observation are the quality control activities and measures implemented for the content of urban ecological observation (elements, spatial patterns, functions, and services), to ensure the quality requirements of the whole process of ecological observation and improve the accuracy of ecological observation results. (2) The quality control system of urban ecological observation can be defined in two dimensions: object and process. The object dimension includes five aspects: human-personnel, machine-instruments and equipment, material-data, method- policy documents and environment- observation process; The process dimension covers the entire process of urban ecological observation, including the quality control measures in the pre-preparation work of urban ecological observation, data entry, review and evaluation during the observation process and after the observation. The quality control of the observation process is the main body of the quality control system. Different quality control measures should be developed according to different observation methods (sampling observation, positioning observation, socio-economic survey, and remote sensing observation) to achieve total quality management. (3) A total of 102 technical standards related to ecological observation have been published in China, only 38 of which clearly put forward specific requirements for quality control. Compared with local standards, ecological observations in national standards and industry standards involve more quality control content, and the quality control system is more complete. In 2005, the Marine Standard took the lead in issuing relevant standards for the content of ecological observation, and there is still a lack of standards for the quality control of ecological observations in urban ecosystems. (4) The compilation of Criterion on Quality Control of Urban Ecological Observation needs to contain two technical contents of quality system and quality control measures, mainly including three chapters, namely, the introduction, the main text, and the appendix, which provide for the quality assurance and quality control technologies for the whole process of ecological observation.

Efficient AI System Design With Cross-Layer Approximate Computing

Advances in deep neural networks (DNNs) and the availability of massive real-world data have enabled superhuman levels of accuracy on many AI tasks and ushered the explosive growth of AI workloads across the spectrum of computing devices. However, their superior accuracy comes at a high computational cost, which necessitates approaches beyond traditional computing paradigms to improve their operational efficiency. Leveraging the application-level insight of error resilience, we demonstrate how approximate computing (AxC) can significantly boost the efficiency of AI platforms and play a pivotal role in the broader adoption of AI-based applications and services. To this end, we present RaPiD, a multi-tera operations per second (TOPS) AI hardware accelerator core (fabricated at 14-nm technology) that we built from the ground-up using AxC techniques across the stack including algorithms, architecture, programmability, and hardware. We highlight the workload-guided systematic explorations of AxC techniques for AI, including custom number representations, quantization/pruning methodologies, mixed-precision architecture design, instruction sets, and compiler technologies with quality programmability, employed in the RaPiD accelerator.

Web Based System for Program Analysis and Transformation in Optimizing Parallelizing System

Experience of designing different variants for web-based development environment (IDE) for Optimizing parallelizing system and compiler for reconfigurable architecture is described. Designed system is based on existing tools and frameworks such as Jupyter Notebook and Eclipse Che. Set of requirements for Optimizing parallelizing system components is developed to make it possible to integrate them into web-based development environment accessible through the Internet. Designing portable environment for compiler development, compiler technology demonstration and teaching parallel program development is also described. Examples of performing newly developed program transformations are shown to be used during program optimizations for FPGA inside the designed web environment. Means of program transformation visualization are described for use with Jupyter Notebook. The work shown demonstrates possibility to organize remote access to library of instruments and tools for program optimizations currently under development that would be convenient for application developers.

The allscale framework architecture

The tremendous challenge of developing applications efficiently utilizing the hardware provided by contemporary parallel systems of all scales is among the most limiting factors for the continuous growth of high performance computing. In this article, we present a novel architecture taking on this challenge by providing an infrastructure for the effective development of such applications. Our design combines the expressive power of modern C++, advanced compiler technology, and sophisticated runtime system solutions, with the goal of providing a clean separation of domain specific algorithms, resource management activities, and low-level hardware interactions — all required to be accounted for by high performance applications. The article covers the architecture design, its key aspects, and a first evaluation of the achievable performance of an application implemented based on the proposed infrastructure.