Commutation Path Research Articles

Experimental investigation on magnetically controlled air arc oscillation characteristics for DC interruption

With the development of the direct current (DC) power grid, the research of the forced current zero techniques in DC circuit breakers is of vital importance. Through applying an external alternating transverse magnetic field to an air arc confined by insulating walls, the arc can oscillate in a specific pattern, which is defined as ‘magnetically controlled arc oscillation’ in this article. The air arc oscillation characteristics are investigated through arc voltage spectrum analysis and arc motion captured by a high-speed camera. It can be found that the arc motion can be divided into a gliding process and a stretching process. The arc voltage oscillates at a particular frequency, which is nearly twice the magnetic field frequency. The basic arc oscillation pattern can be described from the aspects of arc voltage, arc column length and arc root velocity. Furthermore, this article proposes a DC breaking scheme based on the investigated magnetically controlled air arc oscillation characteristics. The forced current zero crossing point can be created in the resonant process between the oscillated air arc and the parallel-connected inductance-capacitance (LC) commutation path. Based on the proposed DC breaking scheme, interruption experiments are carried out, and it is observed that a current of 4.2 kA can be interrupted within several milliseconds. The feasibility of DC interruption based on magnetically controlled arc oscillation has been proved.

Design of Ultracompact Gate Driver Integrated With Current Sensor and Commutation Path for a 211-kW Three-Level SiC Aircraft Propulsion Inverter

The aviation industry is increasingly interested in high-efficiency and high-density electric propulsion systems enabled by high-power Silicon Carbide (SiC) modules. However, designing a high-power SiC-based multi-level inverter for aircraft faces several challenges, including high loop inductance, bulky current sensors, high-bandwidth sampling of device current, partial discharge (PD) at high altitudes, and shorter short-circuit withstanding time of SiC MOSFETs. To address these challenges, this paper proposes an ultra-compact multi-functional gate driver that integrates the driving circuit, Rogowski coil current sensor (RCCS), and commutation path for a 211-kW SiC-based three-level (3-L) propulsion inverter. The optimized commutation path and RCCS provide multiple functions, including suppressing overshoot voltage, ultra-fast short-circuit protection, and ac load current sampling. The gate driver’s electric-field can be controlled by PCB-based shielding and shaping to eliminate the PD at high altitudes, thereby improving power density and reducing insulation risk. The paper presents the design methodology of the multi-functional ultra-compact gate-driver and the board-level to system-level common-mode (CM) noise modeling and suppression. The performance of the gate driver is verified on a 211-kW 3-L altitude-ready SiC propulsion inverter system, achieving a power density of 19.5 kW/kg and 7.1 kW/L.

The impact of DC-bus impedance on the switching performance of low-voltage silicon power MOSFETs

Typical DC-bus stabilization for low-voltage power circuits consists primarily of ceramic capacitors due to the capacity density and low equivalent series resistance (ESR) resulting in low conduction losses. Particularly in hard-switching and hard-commutation operation, the low ESR and high equivalent series inductance (ESL) of the capacitors in the commutation path restrict the damping of the switch node voltage overshoot and introduce high-frequency ringing, reducing the voltage margin of the transistor. Therefore, this paper analyzes the impact of the DC-bus impedance and proposes a DC-bus snubber based on an RC network to form the DC-bus impedance’s characteristic, which minimizes the overshoot voltage. A comprehensive simulation using measurement-derived component models is shown, which is verified by an in-situ measurement on a test PCB. Furthermore, transient measurements using a double pulse test setup show the effectiveness of the proposed approach.

Commutation Behavior and Stray Inductance Analysis of a FC-3L-BDC Phase-Leg PEBB

The bidirectional dc-dc converter is a critical component for extending the use of renewable energy and improving the efficiency of high-power electronic systems. This paper presents the analysis of the stray inductance of a commutation loop and the commutation behavior of IGBT devices in a flying capacitor three-level bidirectional DC-DC converter (FC-3L-BDC) phase-leg power electronic building block (PEBB). An FC-3L-BDC phase-leg PEBB was designed as an example, which can be used to build 400 kW to MW-grade light rail train chargers, battery energy storage interface converters, or metro regenerative braking energy recovery converters with a single PEBB or several PEBBs interleaved parallel. In order to optimize the stray inductance of commutation paths and realize snubberless operation, a five-layer laminated bus bar was carefully designed, and the stray inductance of the bus bar was extracted by three-dimensional finite element analysis simulation. To obtain higher accuracy, the stray inductances of IGBT devices and capacitors were extracted from the test instead of their datasheets. Then, the accuracy of the commutation loop stray inductance analysis method was verified by practical experiments. The impact of the stray inductance of the commutation loop on the commutation behavior of IGBT devices was analyzed, and the switching characteristics of IGBT devices were measured under maximum DC-link voltage and entire current rating range at the temperatures of −40 °C, 25 °C, and 150 °C, respectively, finding that neither the excessive turn-off overvoltage of IGBTs nor the snappy reverse recovery of FWDs was observed.

Reduced Vector Model Predictive Control of ANPC Inverter for PMSM Drives With Optimized Commutation

In this work, a new reduced vector model predictive control (RV-MPC) method is proposed for full silicon-carbide (SiC)-MOSFET modules-based three-level active neutral-point-clamped (3L-ANPC) inverter fed permanent magnet synchronous motor (PMSM) drives. The main purpose of this approach is to reduce the computational burden of conventional MPC for ANPC inverters while optimizing the current commutation paths. To reduce the computational burden, the proposed algorithm is implemented by two steps. In the first step, the expected <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dq</i> -axis voltages are predicted, and then, the positive and negative half cycles are determined through a hysteresis sign calculation algorithm. In the second step, only eight switching states need to be enumerated under the defined half period, which is remarkably reduced from 27 to 8. The neutral point potential balance and switching effort penalization are also considered in the proposed method. Moreover, the ANPC inverter can achieve more even loss distribution and better thermal characteristics with the optimized commutation, which is profitable for the high-power drive applications. The effectiveness of the proposed approach is evaluated by simulations and experimentally verified on a platform of 11-kW PMSM drives.

Single-Stage Isolated AC-AC Converter Without Commutation Problem

A single-stage isolated ac–ac converter without the commutation problem is proposed. The proposed converter has the step-up/down function dependence on the phase shift control which provides zero-voltage switching zero-voltage switching (ZVS) for all switches in rated condition. Also, the commutation paths of the secondary side switches are provided for any switching case by adding a single capacitor; originally, a filter capacitor is used for the switching mode power supply input, and in this case, this filter capacitor also solves the primary-side commutation problem. The ZVS and solving the commutation problem increase the power efficiency and reliability. The proposed converter achieves high power quality with a simple control algorithm. A 1 kW/ 220 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> prototype is implemented to verify the theoretical analysis and performance of the proposed converter. The California energy commission efficiency is 97.3%, the total harmonic distortion (THD) of the input current is 2.45% at full load, and the THD of the output voltage is 1.07% at full load.

An Advanced 4-in Integrated Emitter Turn-off Thyristor With Ultralow Commutation Impedance to Achieve 8 kA Turn-off Capability: Comprehensive Analysis, Design, and Experiments

Compared with integrated gate commutated thyristors (GCTs), an integrated emitter turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> thyristor (IETO) has a potential of higher turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> current capability and requires lower power consumption for gate driver units, which is more suitable for high-power applications. Thus, in this article, an advanced design of 4-in IETO was presented. To reduce the gate commutation impedance and enhance the turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> current, the turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> circuit with low impedance DirectFETs was integrated into the housing. And the housing structure was carefully designed to provide a compact current commutation path. Then, a 4-in IETO prototype based on a 4.5 kV/5 kA GCT wafer was developed. Experimental results show that its maximum turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> current was over 8.1 kA with an extremely short commutation time of 130 ns. And the total commutation inductance was only 0.38 nH. Additionally, the thermal and mechanical characteristics of the housing were also taken into consideration during design and verified by the thermal simulation and mechanical stress test. Consequently, according to this article, IETO has the potential to be a competitive device in high-power applications in the near future.

Direct Single-Power-Conversion Bidirectional Grid-Connected Inverter Solving Commutation Problem

This article presents a novel direct single-power-conversion bidirectional grid-connected inverter for solving the commutation problem and a control strategy for it. The proposed inverter directly interfaces with a low-voltage battery and grid with only one power conversion stage and performs a bidirectional power conversion. The reliability of the proposed inverter is improved because the commutation capacitor eliminates the commutation problem by providing commutation paths in any switching case. The frequency compensation method converts the nonlinear power transfer characteristic into linear and makes grid current control easy. Furthermore, the interdependence of three control variables enables the control of the grid current using a simple equation. The proposed dual-mode control strategy increases the power capacity of the proposed inverter without increasing the turns ratio and decreasing the leakage inductance. The conduction losses can be reduced using this strategy. Additionally, the ZVS capability reduces the switching losses. These features of the proposed inverter and its control strategy enable the proposed inverter to achieve high efficiency and power quality with a simple structure. The theoretical concepts of the proposed inverter were experimentally verified using a 1-kW prototype.

Single power-conversion DAB microinverter with safe commutation and high efficiency for PV power applications

This paper presents a single power-conversion dual-active-bridge (DAB) microinverter with safe commutation and high efficiency for PV power applications. In DAB microinverters, the commutation problem is a crucial issue which must be solved in order to achieve a higher power capability. Owing to its novel circuit structure, the proposed microinverter can provide the commutation path in any switching case, so that it avoids the high voltage spikes from the commutation problem and provides high reliability. Moreover, the proposed microinverter has a circuit structure that is simpler and requires fewer auxiliary circuits compared to conventional DAB microinverters. In addition, the proposed microinverter achieves simple closed-loop current control and zero-voltage-switching turn-on of all switches owing to its control algorithm. Because these advantages are obtained with only a single power-conversion, the proposed microinverter has high efficiency and simple structure with high reliability. The operation principle and commutation issue of the proposed microinverter are theoretically analyzed in detail, and experimentally validated on a 400-W prototype.

Threshold Current of Arc-Less Current Commutation in a Hybrid DC Switch

Hybrid dc switches have become increasingly prominent due to their low ON-state energy loss and less arc erosion in comparison with conventional semiconductor and mechanical switches. Zero-voltage switching (ZVS) is a common method for realizing a hybrid dc switch. However, a certain amount of contact voltage rather than zero voltage is necessary for commutating the current into the semiconductor devices from the mechanical contacts, which may cause arc generation if the contact voltage exceeds the boiling voltage of the contact material. It has been found that current commutation can be accomplished without arc generation if the current is below a threshold value. It is important to determine and improve the threshold current of arc-less current commutation for suppressing arcing even under the condition of a high current load. In this paper, the effect of some parameters, including the contact diameter (10, 15, and 20 mm), separation speed (0.05–0.3 m/s), and cable inductance in the current commutation path (0.1 and $0.25~\mu \text{H}$ ) on the threshold current of the arc-less commutation, is investigated by using copper contacts. The results show that a larger contact diameter, slow separation speed, and small commutation cable inductance are good for the improvement of the threshold current of the arc-less commutation. A 200-A current commutation is realized without arc generation, particularly by applying a 20-mm-diameter contact, 0.05-m/s separation speed, and 0.1- $\mu \text{H}$ commutation cable inductance.

Commutation Behavior Analysis of a Dual 3L-ANPC-VSC Phase-Leg PEBB Using 4.5-kV and 1.5-kA HV-IGBT Modules

Three-level neutral-point clamped voltage source converter (3L-NPC-VSC) is widely used in high-power and medium-voltage (MV) applications and the most used multilevel VSC topology. 3L-Active-NPC-VSC (3L-ANPC-VSC) was introduced to overcome the unequal losses distribution as main structural drawback of the 3L-NPC-VSC. During the switching event of semiconductor devices, the stray inductance takes a special role in the commutation path of the switching current. Mutual coupling inductance between the components participating in the commutation path has to be considered for a theoretical assessment of the total stray inductance of each commutation path. Besides, the measurement of the commutation path stray inductance has to be carried out during the turn- on of the semiconductor device, instead of during the turn- off , to consider the reverse blocking voltage of the opposite switching semiconductor device. This paper shows how a dual 3L-ANPC-VSC phase-leg has been carefully designed and assembled to build a ±10 MVAr five-level VSC for MV-static synchronous compensator applications. The minimization of the stray inductance, the equalization of the total switching power losses for all commutation paths and power density maximization with snubberless operation are within the main technical design requisites. On the basis of the theoretical analysis, the stray inductance of all the commutation paths has been extracted, considering mutual coupling effect, by means of three-dimensional finite-element-analysis simulations. Once the design concept is theoretically validated, the estimated values have been compared with the experimental results obtained from the performance of double-pulse tests for each commutation path. This paper presents, for the first time, all the analysis details of the 3L-ANPC-VSC commutation behavior using 4.5-kV and 1.5-kA trench high-voltage insulated-gate bipolar transistor modules.

Technical Assessment of Hybrid DCCB With Improved Current Commutation Drive Circuit

Current commutation from the load current path to the commutation path is the precondition to interrupt current successfully for hybrid direct current circuit breakers (DCCB). With remarkable current commutation performance, current commutation drive circuit (CCDC), mainly consisting of air-core transformer, fast-closing switch (FCS), and precharged capacitor, is proposed by us. In this paper, to eliminate the operating losses of CCDC and to avoid unrecoverable damage of FCS, CCDC used in hybrid DCCB for current commutation has been improved. Different submodules (SM) of commutation path in hybrid DCCB are analyzed, and experiments have been carried out on a hybrid DCCB prototype. Theoretical analysis and experiment results have shown that no matter which kind of SM is used, improved CCDC can ensure reliable current commutation in hybrid DCCB. In the end, by taking total cost of CCDC into consideration, a novel optimization method is proposed to design the parameters of CCDC. With this optimization method, CCDC for hybrid DCCBs with different rated voltage and current can be designed individually and its cost could be reduced significantly.

Performance Evaluation of the Single-Phase Split-Source Inverter Using an Alternative DC–AC Configuration

This paper investigates and evaluates the performance of a single-phase split-source inverter (SSI), where an alternative unidirectional dc–ac configuration is used. Such configuration is utilized in order to use two common-cathode diodes in a single device instead of using two separate diodes, resulting in minimum parasitic inductance in the commutation paths. In this paper, the analysis and modulation of the single-phase SSI using this alternative configuration is discussed, and the analysis of the low-frequency component in the dc side is introduced. Moreover, the features behind employing the triangular, the trailing-edge sawtooth, and the leading-edge sawtooth carriers with the single-phase SSI are discussed, and the differences among these carriers are highlighted. In order to highlight the performance of the proposed SSI, a comparative study is conducted with the two-stage architecture and the single-phase quasi-Z-source inverter (qZSI). The introduced analysis is enhanced with simulation results using MATLAB/PLECS models, where a 1-kVA single-phase SSI is designed and simulated. Finally, the designed 1-kVA single-phase SSI is implemented experimentally and tested at different operating points, i.e., at different voltage gains, and a maximum efficiency of $95.5\%$ is obtained.

Single-Phase Single-Stage Isolated ZCS Current-Fed Full-Bridge Converter for High-Power AC/DC Applications

In this paper, a single-phase single-stage isolated zero current switched (ZCS) current-fed full-bridge ac/dc converter is proposed for IGBT-based high-power power factor correction (PFC) applications. By adding an additional commutation path and few resonant components, ZCS operation is realized for all IGBTs. The conduction loss is also lowered by the additional path. Furthermore, the control strategy for the proposed converter is compatible with that developed for traditional PFC converter. In this paper, the topology derivation and circuit operational analysis are given. The control strategy is introduced. A 3-kw prototype is developed and tested to verify the circuit functionality. Finally, the efficiency performance is investigated and comparison is made to show the advantages of the topology.

Circuit for clamping bridge overvoltages in voltage‐fed quasi‐ Z ‐source converter

Unlike the voltage source converter, the Z-source converter can boost as well as buck the input voltage. However, the presence of physically large components in the impedance network introduces large parasitic inductances into power device commutation paths. This leads to consequent overvoltages at power device turn-off. A simple circuit for addressing this is presented. Practical results are given for a voltage-fed quasi- Z-source inverter with discontinuous input current.

A Transformerless PCB-Based Medium-Voltage Multilevel Power Converter With a DC Capacitor Balancing Circuit

This paper presents a new method of constructing a transformerless voltage-sourced medium-voltage multilevel converter using existing discrete power semiconductor devices and printed circuit board technology. While the approach is general, it is particularly well suited for medium-voltage converters and motor drives in the 4.16 kV 500–1000 kW range. A novel way of visualizing the power stage topology is developed, which allows simplified mechanical layouts, while managing the commutation paths. Using so many discrete devices typically drives cost and complexity of the gate-drive system including its control and isolation; a gate-drive circuit is presented to address this problem. As with most multilevel topologies, the dc-link voltages must be balanced during operation. This is accomplished using an auxiliary circuit made up of the same power stage and an associated control algorithm. Experimental results are presented for a 4.16-kV 746-kW five-level power converter prototype.

Five‐level inverter for solar system and its self‐adaptive pulse‐width modulation strategy

Five-level inverters have been used in solar systems because of their smaller harmonic, smaller filter inductance, and less power network pollution than those of the three-level inverters. This study compares the advantages and disadvantages of I-type five-level inverters and T-type five-level inverters, involving the conduction loss, commutation path in reactive power, and switching loss, especially at high frequency. On the basis of the drawbacks of I-type and T-type five-level inverters, this study proposes a novel five-level inverter for solar systems and its relevant self-adaptive pulse-width modulation strategy, aiming at reducing both the conduction loss and switching loss at high frequency, and solving their common issue of unbalanced devices dissipation. A prototype has been built to verify the operation and performance of the proposed inverter.

Stray Inductance Reduction of Commutation Loop in the P-cell and N-cell-Based IGBT Phase Leg Module

This paper proposes a novel packaging method for insulated-gate bipolar transistor (IGBT) modules based on the concepts of P-cell and N-cell. The novel packaging reduces the stray inductance in the current commutation path in a phase-leg module and hence improves the switching behavior. A P-cell- and N-cell-based module and a conventional module are designed. Using finite-element-analysis-based Ansys Q3D Extractor, electromagnetic simulations are conducted to extract the stray inductance from the two modules. Two prototype phase-leg modules based on the two different designs are fabricated. The parasitics are measured using a precision impedance analyzer. Finally, a double pulse tester based-switching characterization is performed to illustrate the effect of stray inductance reduction in the proposed packaging design. The experimental results show the reduction in overshoot voltage with the proposed layout.

Switching Loss Analysis of 4.5-kV–5.5-kA IGCTs Within a 3L-ANPC Phase Leg Prototype

Three-level active neutral-point-clamped (NPC) (3L-ANPC) voltage-source converters (3L-ANPC-VSCs) enable additional switch states and commutations compared to the three-level NPC voltage-source converters (3L-NPC-VSCs). They are used to overcome one important disadvantage of the 3L-NPC-VSC, the unequal semiconductor loss distribution. With an accurate switching model (obtained directly from the measurements), it is possible to improve the junction temperature distribution among the power devices, increasing the 3L-ANPC-VSC output power and/or increasing the frequency and/or decreasing the derating of the converter. This paper presents the characterization of a 4.5-kV-5.5-kA integrated gate-commutated thyristor (IGCT) within a 3L-ANPC phase leg. A quantitative analysis of the switching losses using 5SHY55L4500 IGCTs and D1961SH45T press-pack diodes for a current range from 1 to 4.5 kA and junction temperatures between 25 ° C and 125 ° C is presented. The 3L-ANPC phase leg performs 32 different commutations. Each commutation exhibits different switching losses, as a result of the different commutation paths and their stray inductances. This switching energy range is presented and quantified. Finally, a simplified switching loss model considering the maximal switching losses in terms of the commutation current and the junction temperature is presented.

Virtual Estimator for Piecewise Linear Systems Based on Observability Analysis

This article proposes a virtual sensor for piecewise linear systems based on observability analysis that is in function of a commutation law related with the system's outpu. This virtual sensor is also known as a state estimator. Besides, it presents a detector of active mode when the commutation sequences of each linear subsystem are arbitrary and unknown. For the previous, this article proposes a set of virtual estimators that discern the commutation paths of the system and allow estimating their output. In this work a methodology in order to test the observability for piecewise linear systems with discrete time is proposed. An academic example is presented to show the obtained results.