Common-mode Current Suppression Research Articles

Frequency-independent dual-tuned cable traps for multi-nuclear MRI and MRS

Magnetic Resonance Imaging (MRI) and Magnetic Resonance Spectroscopy (MRS) of non-proton nuclei (X-nuclei) typically require additional proton imaging for anatomical reference and B0 shimming. Therefore, two RF systems exist, necessitating cable traps to block the unwanted common-mode current at both Larmor frequencies of 1H and X-nuclei. This study introduces a frequency-independent dual-tuned cable trap that combines a standard solenoid cable trap with a float solenoid trap to independently tune high and low frequencies without compromising performance. The methods involved theoretical analysis, electromagnetic simulations, and bench tests. Two design approaches were evaluated: a float cable trap for 1H, a non-float cable trap for X-nuclei, and vice versa. Results showed that the design with the float trap for X-nuclei and non-float for 1H had superior performance, with high common-mode current suppression ability at both frequencies. Bench tests confirmed these findings, demonstrating effectiveness across various static fields and X-nuclei. The proposed frequency-independent dual-tuned cable trap provides a compact and efficient solution for multinuclear MRI and MRS, enhancing safety, image quality, and flexibility.

An Asymmetric Full-Bridge Bidirectional DC–AC Converter With Power Decoupling and Common-Mode Current Suppression for V2G Application

An Asymmetric Full-Bridge Bidirectional DC–AC Converter With Power Decoupling and Common-Mode Current Suppression for V2G Application

A 60 GHz PCB Wideband Antenna-in-Package for 5G/6G Applications

A low-cost, wideband printed circuit boards (PCBs) manufactured antenna is proposed in this letter for 5G/6G antenna-in-package (AiP) applications with wideband common-mode current (surface-wave) choking characteristics. The antenna is based on a grounded, wideband, high-efficiency electromagnetic structure (WHEMS) and a backing cavity, in which a radiating choke is introduced. By changing the choking condition of a quarter-wave length, widely applied in traditional low-frequency baluns, wideband common-mode current suppression is achieved. The enclosing wall of the backing cavity is realized by a combination of isolated grounded vias and connected grounded vias based on current polarization on the wall. Finally, a 22% impedance bandwidth (60–75 GHz) and a relative gain of 8–10 dBi within the band is achieved.

A novel photovoltaic inverter topology based on common mode current suppression

ABSTRACT Aiming at the problems of large leakage current and low efficiency of existing transformerless single-phase grid-connected photovoltaic inverters, a novel transformerless single-phase grid-connected photovoltaic inverter topology is proposed. In this topology, two freewheeling diodes are added to the single-phase full-bridge inverter, and the filter inductors are moved between the upper and lower bridge arms, so that the common mode voltage remains constant during the switching period and the common mode current is effectively suppressed. Finally, through simulation and the experimental platform of 3kW single-phase grid-connected photovoltaic inverter, it is verified that compared with the traditional full-bridge topology, the novel topology can effectively suppress the common mode current, while compared with the H5 and H6 topology, the novel topology reduces the system loss and improves the system efficiency.

Omnidirectional WLAN Antenna With Common-Mode Current Suppression

An omnidirectional wireless local area network (WLAN) loop-slot antenna with common-mode current (CMC) suppression is proposed in this communication. First, based on the analysis of the equivalent model of odd-even mode, the feeding coaxial line is led out at the voltage-zero point of the loop-slot element, which suppresses the CMC over the full band. Second, through the theory of array, three loop-slot elements form an array to obtain omnidirectional radiation. Finally, the physical size is reduced by loading Stubs T in the slot. The roundness of the radiation pattern is modified by the Stubs T and the chamfering edge of the antenna. A prototype of the proposed antenna was fabricated and measured. The measured results show that the antenna achieves |S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sub> | <; -10 dB in bands of 2.15-2.65 and 4.85-5.92 GHz. In addition, the roundness is 0.95 dB at 2.4 GHz, 1.84 dB at 5.2 GHz, and 2.43 dB at 5.8 GHz. The antenna effectively suppresses the CMC to keep a favorable roundness over a wide band, showing its potential in WLAN communication systems.

The Characteristics and Suppression of Common-Mode Current for Brushless Doubly Fed Generator System

Due to the cancellation of the brush and slip ring, the brushless doubly fed generator (BDFG) is more reliable than the doubly fed induction generator and it has wide prospect in the field of variable speed constant frequency power generation. However, the internal structure of BDFG is complex, which brings difficulties to the analysis of common-mode circuit and the suppression of common-mode current. Based on the structure of BDFG system, the common-mode voltage circuit paths are analyzed. The common-mode equivalent circuit model and the extraction method of equivalent common-mode impedance parameters are presented in this article. The characteristics of each common-mode circuit path are analyzed. The common-mode Path 3 (line-side converter-motor power winding-motor control winding-machine-side converter-line-side converter) is an important factor that affects the common-mode current characteristics of the BDFG system. The relationship between carrier difference and common-mode current characteristics of two pulsewidth modulation converters, in this path, is analyzed emphatically. In order to reduce the common-mode voltage, it is necessary to ensure the carrier synchronization between them. And the control method of carrier synchronization is provided. The experiment is designed based on the experiment platform of the BDFG system. The experimental results verify the correctness of the proposed model and theoretical analysis, as well as the effectiveness of the common-mode current suppression method.

Common-Mode Current Suppression of Transformerless Nested Five-Level Converter With Zero Common-Mode Vectors

Three-phase transformerless multilevel converters are widely used in the high-voltage photovoltaic power generation systems because of their low total harmonic distortion, high power density, and high conversion efficiency. One three-level flying capacitor converter and dual T-type three-level circuits can be combined to derive the compact and cost-effective nested five-level converter. However, due to the lack of an isolation transformer, the common-mode current is generated to degrade the converter performance. First, the common-mode equivalent circuit model of the nested five-level converter is initially derived to further explore its common-mode current generation mechanism. Then, the zero common-mode space vector modulation (ZCM-SVM) is proposed to reduce the common-mode current, which chooses the specific zero common-mode voltage space vectors to synthesize the reference vector. Then, an advanced coordinate transformation is introduced to realize the flexible sector selection and reduce the complexity of the vector action time calculation. The proposed modulation achieves the common-mode current suppression with high dc bus voltage utilization. Finally, the effectiveness of the proposed ZCM-SVM strategy is verified by simulation and experimental results.

An Improved H5 Topology With Low Common-Mode Current for Transformerless PV Grid-Connected Inverter

Transformerless photovoltaic (PV) grid-connected inverters have become more and more popular in distributed PV power generation systems due to the advantages on high efficiency, low cost, and small size. However, common-mode (CM) current in the transformerless PV inverters can result in serious electromagnetic interference and insecurity, which will further reduce the reliability of the PV inverter systems. In this paper, an improved H5 topology, namely H5-D topology, is proposed, in which a clamping diode is added on the basis of H5 topology to eliminate the CM voltage fluctuation in H5 topology. Further, the PSIM simulation results of the H5-D topology and H5 topology are given and compared, especially, the performance of H5-D topology for CM current suppression is presented and analyzed concretely. Finally, the experimental prototypes of the H5-D topology and H5 topology are built and tested, and the experimental results validate the advantages of the H5-D topology. The proposed H5-D topology provides a new practical topology for distributed PV grid-connected power generation systems.

Novel Common-Mode Current Suppression Method in Transformerless PV Grid-Connected System

The existence of high-frequency components in common-mode (CM) current would reduce the stability of a non-isolated PV grid-connected system. It has great impacts on the output power quality when the generated power from PV is low. The method of single CM inner loop in suppressing the high-frequency components has poor effect. Based on the CM equivalent circuit model and the cause analysis of the CM current, a novel dual CM inner loops method is proposed to restrain the high-frequency components in CM current. This method not only meets the grid connection demand of CM current, but also overcomes the high frequency resonant problem. Furthermore, the high-frequency components in CM current from the outer parasitic circuit are substantially reduced. Finally, the proposed method is verified by simulation and experimental results.

On the power handling of a high power combiner for industrial, scientific, and medical applications

In this paper a 2-way broadband power combiner that can handle up to 1 kW output power is designed and fabricated. The combiner covers the frequency range of 30 to 500 MHz, which is intended for industrial, scientific, and medical (ISM) applications. The power handling of the power combiner depends on the power handling of the components that constitute the combiner. The combiner is composed of some coaxial transmission lines and a transmission line transformer. The ferrite cores, which are used to suppress the common mode current, are one of the major limiting factors, regarding the power handling of the combiner. The power combiner is implemented with some binuclear and some stacked toroids of material 61, which is extensively used for common mode current suppression in this frequency range. As real ferrites have complex permeability, some of the input power dissipates as heat in the ferrite cores. The power dissipation due to the equivalent parallel resistance of each ferrite core is calculated. The proper operation of the high power combiner is verified by simulation of the temperature rise in the ferrite cores due to heat dissipation.

Complete parasitic capacitance model of photovoltaic panel considering the rain water

Common mode current suppression is important to grid-connected photovoltaic (PV) systems and depends strongly on the value of the parasitic capacitance between the PV panel and the ground. Some parasitic capacitance models have been proposed to evaluate the magnitude of the effective parasitic capacitance. However, the proposed model is only for the PV panels under dry and clean environmental conditions. The dependence of rain water on the capacitance is simply described rather than analyzing in detail. Furthermore, the effects of water are addressed quite differently in papers. Thus, this paper gives complete parasitic capacitance model of the PV panel considering the rain water. The effect of the water on the capacitance is systematically investigated through 3D finite element (FE) electromagnetic (EM) simulations and experiments. Accordingly, it is clarified how the water affects the parasitic capacitance and methods of minimization of the capacitance are proposed.

A Low-Power Class-AB Gm-Based Amplifier With Application to an 11-bit Pipelined ADC

A Gm-based amplifier is proposed for the use in low-voltage and low-power switched-capacitor circuits. At the input stage of the amplifier, a common-mode current-suppression scheme effectively suppresses the common-mode current with the differential-mode current even amplified, resulting in decrease in dc power consumption. At the output stage of the amplifier, a self-biased cascode configuration adaptively changes bias voltages to achieve both the cascode operation for high gain and digital switching operation for fast transients. The proposed amplifier is applied to a design of an 11-bit pipelined ADC with a 0.13- $\mu \text{m}$ CMOS process. The implemented analog-to-digital converter consumes 80 $\mu \text{W}$ from a single 0.7 V supply at 2.5 MS/s. It achieves an effective number of bit of 9.72 bit without any calibration scheme and a figure of merit of 37.8 fJ/c-s at near Nyquist rate.

An Integrated AC Choke Design for Common-Mode Current Suppression in Neutral-Connected Power Converter Systems

This paper presents an integrated ac choke that incorporates the common-mode (CM) suppression function into a three-phase differential-mode (DM) inductor. The proposed choke, together with other filter components, provides a transformerless solution to issues caused by the switching CM voltage in neutral-connected power converter systems. The required high CM-to-DM inductance ratio is generated by different magnetic paths in the novel structure. An approach based on magnetic circuit calculation can be applied to the weight-minimized design in which a reasonably small core loss confirms the choke's heat dissipation capability. The existence and uniqueness of the optimization are proven by a design example and analysis. Comparison to separate DM and CM inductors demonstrates the benefits of integration: the iron and copper material savings, the volume and weight reduction, and overall system efficiency improvement. The finite element method is used to tune the design parameters with which a prototype is implemented. The simulation and experimental results of the prototype in a voltage source converter verify the feasibility and effectiveness of the integrated choke.