Commodity Platforms Research Articles

Coordination of interests of participants in digital commodity platforms (marketplaces): legal problems

The article examines problems that have emerged in practice related to the interaction of marketplace owners with sellers, buyers and other participants when concluding and executing contracts for the sale of goods on digital commodity platforms. The concepts of a digital platform, marketplace, and information aggregator, which have not received an unambiguous solution in legal acts, are defined, the legal status of the owner of the marketplace is investigated, and a negative assessment of the state of legal regulation of relations developing on digital product platforms (marketplaces) is given. A mechanism for legal regulation of the relations under consideration is proposed, which allows not to limit the development of marketplaces and at the same time ensure the coordination of the interests of marketplace owners as entities with significant market power with participants in transactions on digital commodity platforms.

Mediating queer masculinities through alternative music from Palestine

ABSTRACT Queer feminist media studies habitually overlooks how popular communications mediate same-sex sexualities beyond the global northwest. Thinking with this gap, this paper problematises mediated queerness in the Arab world. I use the case study of “alternative” music in Israeli-dominated Palestine to theorise how far (or not) Palestinian vernacular modalities constitute a politics of sexuality above and below—although not necessarily in opposition to—the master-narratives of LGBTQ+ recognition, visibility, and the individual closet that often overshadow global commodity platforms. Drawing on my twenty-eight-month ethnography on “alternative” music in Palestine, I explore how queer-identifying Palestinian musicians use music, drag, and performance videos to self-fashion gender and sexual identities, in the context of dominant, media-friendly visions of queerness on digital networks. Through close reading of Bashar Murad’s 2021 song and video, “maskhara” (mockery), and via interviews and ethnographic data, I argue that music constitutes a shifting politics of sexual (in)visibility in Palestine. Musicians move between visible and invisible queer subject positions, depending on audience, locality, and framing. Expanding the field’s focus on Anglo-American sexual representations, then, the contribution theorises mediated queer cultural worldmaking in contexts of settler-colonisation and militarised occupation.

Practical Application of Platform Comment Sentiment Binary Classification Based on Deep Learning

The role of product reviews is to display real product information, help users judge whether the real situation of the product is consistent with the merchant's description, and indirectly help users judge the price range of the product. At present, most commodity platforms and accommodation intermediary platforms adopt the method of user star rating, which leads to many invalid positive reviews and malicious negative reviews, thus bringing a lot of disturbing information to consumers. Therefore, this paper introduces a mechanism based on artificial intelligence to judge the emotion expressed by a machine, and further verifies the validity and accuracy of the model on the BERT Hugging face dataset.

Orchestrating Energy-Efficient vRANs: Bayesian Learning and Experimental Results

Virtualized base stations (vBS) can be implemented in diverse commodity platforms and are expected to bring unprecedented operational flexibility and cost efficiency to the next generation of cellular networks. However, their widespread adoption is hampered by their complex configuration options that affect in a non-traditional fashion both their performance and their power consumption requirements. Following an in-depth experimental analysis in a bespoke testbed, we characterize the vBS power cost profile and reveal previously unknown couplings between their various control knobs. Motivated by these findings, we develop a Bayesian learning framework for the orchestration of vBSs and design two novel algorithms: (i) BP-vRAN, which employs online learning to balance the vBS performance and energy consumption, and (ii) SBP-vRAN, which augments our optimization approach with safe controls that maximize performance while respecting hard power constraints. We show that our approaches are data-efficient, i.e., converge an order of magnitude faster than state-of-the-art Deep Reinforcement Learning methods, and achieve optimal performance. We demonstrate the efficacy of these solutions in an experimental prototype using real traffic traces.

PISCOT: A Pipelined Split-Transaction COTS-Coherent Bus for Multi-Core Real-Time Systems

Tasks in modern embedded systems such as automotive and avionics communicate among each other using shared data towards achieving the desired functionality of the whole system. In commodity platforms, cores communicate data through the shared memory hierarchy and correctness is maintained by a cache coherence protocol. Recent works investigated the deployment of coherence protocols in real-time systems and showed significant performance improvements. Nonetheless, we find these works to require modifications to commodity coherence protocols, assume simple in-order pipelines, and most importantly suffer from significant latency delays due to coherence interference along with average performance degradation. In this work, we propose PISCOT : a predictable and coherent bus architecture that (i) provides a considerably tighter bound compared to the state-of-the-art predictable coherent solutions (4× tighter bounds in a quad-core system). (ii) It does so with a negligible performance loss compared to conventional high-performance architecture coherence delays (less than 4% for SPLASH-3 benchmarks). This improves average performance by up to 5× (2.8× on average) compared to its predictable coherence counterpart. Finally, (iii) it achieves that without requiring any modifications to conventional coherence protocols. We show this by integrating PISCOT on top of two protocols with a detailed implementation with complete transient states: MSI and MESI.

Interactive spatio-temporal exploration of massive time-Varying rectilinear scalar volumes based on a variable bit-rate sparse representation over learned dictionaries

We introduce a novel approach for supporting fully interactive non-linear spatio-temporal exploration of massive time-varying rectilinear scalar volumes on commodity platforms. To do this, we decompose each frame into an octree of overlapping bricks. Each brick is further subdivided into smaller non-overlapping blocks compactly approximated by quantized variable-length sparse linear combinations of prototype blocks stored in a learned data-dependent dictionary. An efficient tolerance-driven learning and approximation process, capable of computing the tolerance required to achieve a given frame size, exploits coresets and an incremental dictionary refinement strategy to cope with datasets made of thousands of multi-gigavoxel frames. The compressed representation of each frame is stored in a GPU-friendly format that supports direct adaptive streaming to the GPU with spatial and temporal random access, view-frustum and transfer-function culling, and transient and local decompression interleaved with ray-casting. Our variable-rate codec provides high-quality approximations at very low bit-rates, while offering real-time decoding performance. Thus, the bandwidth provided by current commodity PCs proves sufficient to fully stream and render a working set of one gigavoxel per frame without relying on partial updates, thus avoiding any unwanted dynamic effects introduced by current incremental loading approaches. The quality and performance of our approach is demonstrated on massive time-varying datasets at the terascale.

Multiple pattern matching for network security applications: Acceleration through vectorization

As both new network attacks emerge and network traffic increases in volume, the need to perform network traffic inspection at high rates is ever increasing. The core of many security applications that inspect network traffic (such as Network Intrusion Detection) is pattern matching. At the same time, pattern matching is a major performance bottleneck for those applications: indeed, it is shown to contribute to more than 70% of the total running time of Intrusion Detection Systems. Although numerous efficient approaches to this problem have been proposed on custom hardware, it is challenging for pattern matching algorithms to gain benefit from the advances in commodity hardware. This becomes even more relevant with the adoption of Network Function Virtualization, that moves network services, such as Network Intrusion Detection, to the cloud, where scaling on commodity hardware is key for performance.In this paper, we tackle the problem of pattern matching and show how to leverage the architecture features found in commodity platforms. We present efficient algorithmic designs that achieve good cache locality and make use of modern vectorization techniques to utilize data parallelism within each core. We first identify properties of pattern matching that make it fit for vectorization and show how to use them in the algorithmic design. Second, we build on an earlier, cache-aware algorithmic design and show how we apply cache-locality combined with SIMD gather instructions to pattern matching. Third, we complement our algorithms with an analytical model that predicts their performance and that can be used to easily evaluate alternative designs. We evaluate our algorithmic design with open data sets of real-world network traffic: Our results on two different platforms, Haswell and Xeon-Phi, show a speedup of 1.8x and 3.6x, respectively, over Direct Filter Classification (DFC), a recently proposed algorithm by Choi et al. for pattern matching exploiting cache locality, and a speedup of more than 2.3x over Aho–Corasick, a widely used algorithm in today’s Intrusion Detection Systems. Finally, we utilize highly parallel hardware platforms, evaluate the scalability of our algorithms and compare it to parallel implementations of DFC and Aho–Corasick, achieving processing throughput of up to 45Gbps and close to 2 times higher throughput than Aho–Corasick.

A scalable and accurate distributed traffic generator with Fourier transformed distribution over multiple commodity platforms

The rapid growth of high-speed computer networks poses a challenge in the design of testing and verification equipment. The hardware-based packet generators that are often used in the verification process are accurate but costly. Software-based packet generators, on the other hand, are relatively low-cost but have a limited performance with low accuracy. This paper proposes a Fourier-based profile decomposition and formulation methodology for a distributed packet generating system, featuring good horizontal scalability and high accuracy. Different from traditional software-based packet generators, this proposed system extracts the traffic components from a specific traffic distribution applying Fourier transformation to generate traffic components. These traffic components are distributed to one or more worker nodes for packet generation, and thus achieving higher aggregated traffic rate in any given distribution. The system design is based on the Data Plane Development Kits (DPDK) framework to maximize the traffic generation performance. The accuracy and performance of the proposed system scale according to the number of worker nodes used. Currently, with multiple CPU cores and five workers, the proposed system can generate aggregated traffic of more than 40 Gbps in a Poisson distribution.

Enif-Lang: A Specialized Language for Programming Network Functions on Commodity Hardware

The maturity level reached by today’s commodity platforms makes even low-cost PCs viable alternatives to dedicated hardware to implement real network functions without sacrificing performance. Indeed, the availability of multi-core processing packages and multi-queue network interfaces that can be managed by accelerated I/O frameworks, provides off-the-shelf servers with the necessary power capability for running a broad variety of network applications with near hardware-class performance. At the same time, the introduction of the Software Defined Networks (SDN) and the Network Functions Virtualization (NFV) paradigms call for new programming abstractions and tools to allow this new class of network devices to be flexibly configured and functionally repurposed from the network control plane. The paper presents the ongoing work towards Enif-Lang (Enhanced Network processIng Functional Language), a functional language for programming network functions over generic middleboxes running the Linux operating system. The language addresses concurrent programming by design and is targeted at developing simple stand-alone applications as well as pre-processing stages of packet elaborations. Enif-Lang is implemented as a Domain Specific Language embedded in the Haskell language and inherits the main principles of its ancestor, including the strong typedness and the concept of function compositions. Complex network functions are implemented by composing a set of elementary operations (primitives) by means of a compact yet expressive language grammar. Throughout the paper, the description of the design principles and features of Enif-Lang are accompanied by examples and use cases. In addition, a preliminary performance assessment is carried out to prove the effectiveness of the language for developing practical applications with the performance level required by 5G systems and the Tactile Internet.

Achieving One Billion Key-Value Requests per Second on a Single Server

Distributed in-memory key-value stores (KVSs) have become a critical data-serving layer in cloud computing and big data infrastructure. Unfortunately, KVSs have demonstrated a gap between achieved and available performance, QoS, and energy efficiency on commodity platforms. Two research thrusts have focused on improving key-value performance: hardware-centric research has started to explore specialized platforms for KVSs, and software-centric research revisited the KVS application to address fundamental software bottlenecks. Unlike prior research focusing on hardware or software in isolation, the authors aimed to full-stack (software through hardware) architect high-performance and efficient KVS platforms. Their full-system characterization identifies the critical hardware/software ingredients for high-performance KVS systems and suggests optimizations to achieve record-setting performance and energy efficiency: 120~167 million requests per second (RPS) on a single commodity server. They propose a future many-core platform and via detailed simulations demonstrate the capability of achieving a billion RPS with a single server platform.

A parallel min-cut algorithm using iteratively reweighted least squares targeting at problems with floating-point edge weights

We formulate and derive a Parallel Iteratively Reweighted least squares Min-Cut solver (PIRMCut).We propose a novel two-level rounding procedure and prove a generalized Cheeger-type inequality.We developed an MPI based parallel implementation of PIRMCut.We demonstrate the parallel scalability of our PIRMCut implementation.We demonstrate PIRMCut significant speed improvement over a serial code. We present a parallel algorithm for the undirected st min-cut problem with floating-point valued edge weights. Our overarching algorithm uses an iteratively reweighted least squares framework. Specifically, this algorithm generates a sequence of Laplacian linear systems, which are solved in parallel. The iterative nature of our algorithm enables us to trade off solution quality for execution time, which is distinguished from those purely combinatorial algorithms that only produce solutions at optimum. We also propose a novel two-level rounding procedure that helps to enhance the quality of the approximate min-cut solution output by our algorithm. Our overall implementation, including the rounding procedure, demonstrates significant speed improvement over a state-of-the-art serial solver, where it could be up to 200 times faster on commodity platforms.

NetVM: High Performance and Flexible Networking Using Virtualization on Commodity Platforms

NetVM brings virtualization to the Network by enabling high bandwidth network functions to operate at near line speed, while taking advantage of the flexibility and customization of low cost commodity servers. NetVM allows customizable data plane processing capabilities such as firewalls, proxies, and routers to be embedded within virtual machines, complementing the control plane capabilities of Software Defined Networking. NetVM makes it easy to dynamically scale, deploy, and reprogram network functions. This provides far greater flexibility than existing purpose-built, sometimes proprietary hardware, while still allowing complex policies and full packet inspection to determine subsequent processing. It does so with dramatically higher throughput than existing software router platforms. NetVM is built on top of the KVM platform and Intel DPDK library. We detail many of the challenges we have solved such as adding support for high-speed inter-VM communication through shared huge pages and enhancing the CPU scheduler to prevent overheads caused by inter-core communication and context switching. NetVM allows true zero-copy delivery of data to VMs both for packet processing and messaging among VMs within a trust boundary. Our evaluation shows how NetVM can compose complex network functionality from multiple pipelined VMs and still obtain throughputs up to 10 Gbps, an improvement of more than 250% compared to existing techniques that use SR-IOV for virtualized networking.

Design and optimizations for efficient regular expression matching in DPI systems

Efficient techniques for pattern matching are essential in a number of networked systems and services, such as intrusion detection systems, application identification and classification services, and traffic management. Most pattern matching applications describe patterns using regular expression and the support engine is Deterministic Finite Automaton (FA). Previous research studies address either performance or space requirements issues. From the original DFA formalism we design and evaluate optimizations to its representation and operation to meet Deep Packet Inspection (DPI) systems’ requirements for commodity platforms, such as (i) decreasing the original DFA memory consumption (high compression ratio) and (ii) performing pattern matching as fast as the original DFA. Our approach spans from designing the DFA to developing memory layouts to get the most of the underlying architecture. The contributions of this work are threefold: (i) a new and improved finite automaton model, called Ranged Compressed DFA (RCDFA), (ii) three RCDFA optimizations for achieving more compression and matching speed, and (iii) three advanced layouts for implementing the compressed automaton without memory and performance penalties. The experimental evaluation shows that RCDFA compresses DFA up to 99% without imposing additional memory lookups. The proposed advanced layouts reach memory compression of around 97%. RCDFA together with the advanced layouts outperforms the standard DFA by up to 32 times in terms of processing speed.

State‐of‐the‐Art in Compressed GPU‐Based Direct Volume Rendering

AbstractGreat advancements in commodity graphics hardware have favoured graphics processing unit (GPU)‐based volume rendering as the main adopted solution for interactive exploration of rectilinear scalar volumes on commodity platforms. Nevertheless, long data transfer times and GPU memory size limitations are often the main limiting factors, especially for massive, time‐varying or multi‐volume visualization, as well as for networked visualization on the emerging mobile devices. To address this issue, a variety of level‐of‐detail (LOD) data representations and compression techniques have been introduced. In order to improve capabilities and performance over the entire storage, distribution and rendering pipeline, the encoding/decoding process is typically highly asymmetric, and systems should ideally compress at data production time and decompress on demand at rendering time. Compression and LOD pre‐computation does not have to adhere to real‐time constraints and can be performed off‐line for high‐quality results. In contrast, adaptive real‐time rendering from compressed representations requires fast, transient and spatially independent decompression. In this report, we review the existing compressed GPU volume rendering approaches, covering sampling grid layouts, compact representation models, compression techniques, GPU rendering architectures and fast decoding techniques.

Real-Time Autonomous Structural Change Detection Onboard Wireless Sensor Platforms

Real-time structural health monitoring is becoming increasingly tractable on commodity wireless sensor devices and platforms. Such algorithmic implementations must be realised in as efficient a manner as possible, in terms of memory, computation, radio communications and power efficiency. This work describes an efficient, real-time, structural change detection algorithm implemented on constrained, commodity wireless sensor nodes. The algorithm, based on the Hilbert Huang transform, initially characterises the structure and reliably signals subsequent change using a hierarchical monitoring and alert infrastructure. The system operates entirely autonomously, and algorithmic parameterisations, such as sensitivity and training period duration, can be dynamically and remotely adjusted across the air interface. The system has been evaluated on two different structures which were subject to structural change during the experiments; a Single-Degree-of-Freedom discrete dynamical system, and a 5kW wind turbine blade. The system demonstrated a highly reliable capacity to promptly detect and actuate response to structural change.

Scaling LAPACK panel operations using parallel cache assignment

In LAPACK many matrix operations are cast as block algorithms which iteratively process a panel using an unblocked algorithm and then update a remainder matrix using the high performance Level 3 BLAS. The Level 3 BLAS have excellent scaling, but panel processing tends to be bus bound, and thus scales with bus speed rather than the number of processors ( p ). Amdahl's law therefore ensures that as p grows, the panel computation will become the dominant cost of these LAPACK routines. Our contribution is a novel parallel cache assignment approach to the panel factorization which we show scales well with p . We apply this general approach to the QR, QL, RQ, LQ and LU panel factorizations. We show results for two commodity platforms: an 8-core Intel platform and a 32-core AMD platform. For both platforms and all twenty implementations (five factorizations each of which is available in 4 types), we present results that demonstrate that our approach yields significant speedup over the existing state of the art.

Deep packet inspection tools and techniques in commodity platforms: Challenges and trends

Deep packet inspection (DPI) helps Internet service providers in efforts to profile networked applications. By relying on DPI systems, Internet service providers may apply different charging policies, traffic shaping, or offer quality of service (QoS) guarantees to selected users or applications. As critical network services rely on the precise characterization of network flows, building agile and efficient DPI systems has recently become an important research topic. In this paper, we present a comprehensive literature review on the tools and techniques necessary to develop modern DPI systems. We provide the essential technical background material and examine the current body of research in DPI engines’ optimization for commodity platforms. Then we discuss current research challenges and present guidelines for building high performance DPI systems.

COVRA: A compression‐domain output‐sensitive volume rendering architecture based on a sparse representation of voxel blocks

AbstractWe present a novel multiresolution compression‐domain GPU volume rendering architecture designed for interactive local and networked exploration of rectilinear scalar volumes on commodity platforms. In our approach, the volume is decomposed into a multiresolution hierarchy of bricks. Each brick is further subdivided into smaller blocks, which are compactly described by sparse linear combinations of prototype blocks stored in an overcomplete dictionary. The dictionary is learned, using limited computational and memory resources, by applying the K‐SVD algorithm to a re‐weighted non‐uniformly sampled subset of the input volume, harnessing the recently introduced method of coresets. The result is a scalable high quality coding scheme, which allows very large volumes to be compressed off‐line and then decompressed on‐demand during real‐time GPU‐accelerated rendering. Volumetric information can be maintained in compressed format through all the rendering pipeline. In order to efficiently support high quality filtering and shading, a specialized real‐time renderer closely coordinates decompression with rendering, combining at each frame images produced by raycasting selectively decompressed portions of the current view‐ and transfer‐function‐dependent working set. The quality and performance of our approach is demonstrated on massive static and time‐varying datasets.

A note on generating finer-grain parallelism in a representation tree

SUMMARY The representation tree lies at the heart of the algorithm of Multiple Relatively Robust Representations for computing orthogonal eigenvectors of a symmetric tridiagonal matrix without Gram–Schmidt. A representation tree describes the incremental shift relations between relatively robust representations of eigenvalue clusters of an unreduced tridiagonal matrix, which are needed to strongly separate close eigenvalues in the relative sense. At the bottom of the representation tree, each leaf defines a relatively isolated eigenvalue to high relative accuracy. The shape of the representation tree plays a pivotal role for complexity and available parallelism: a deeper tree consisting of multiple levels of nodes involves tasks associated to more work (i.e., eigenvalue refinement to resolve eigenvalue clusters) and less parallelism (i.e., a longer critical path as well as potential data movement and synchronization). An embarrassingly parallel, ideal tree on the other hand consists of a root and leaves only. As highly parallel hybrid graphics processing unit/multicore platforms with large memory now become available as commodity platforms, exploiting parallelism in traditional algorithms becomes key to modernizing the components of standard software libraries such as LAPACK. This paper focuses on LAPACK's Multiple Relatively Robust Representations algorithm and investigates the critical case where a representation tree contains a long sequential chain of large (fat) nodes that hamper parallelism. This key problem needs to be addressed as it concerns all sorts of computing environments, distributed computing, symmetric multiprocessor, as well as hybrid graphics processing unit/multicore architectures. We present an improved representation tree that often offers a significantly shorter critical path and finer computational granularity of smaller tasks that are easier to schedule. In a study of selected synthetic and application matrices, we show that an average 75% reduction in the length of the critical path and 82% reduction in task granularity can be achieved. Copyright © 2011 John Wiley & Sons, Ltd.

Virtual machine monitors: current technology and future trends

Developed more than 30 years ago to address mainframe computing problems, virtual machine monitors have resurfaced on commodity platforms, offering novel solutions to challenges in security, reliability, and administration. Stanford University researchers began to look at the potential of virtual machines to overcome difficulties that hardware and operating system limitations imposed: This time the problems stemmed from massively parallel processing (MPP) machines that were difficult to program and could not run existing operating systems. With virtual machines, researchers found they could make these unwieldy architectures look sufficiently similar to existing platforms to leverage the current operating systems. From this project came the people and ideas that underpinned VMware Inc., the original supplier of VMMs for commodity computing hardware. The implications of having a VMM for commodity platforms intrigued both researchers and entrepreneurs.