CMOS-compatible Si Substrate Research Articles

High-quality GaSb epitaxially grown on Si (001) through defects self-annihilation for CMOS-compatible near-IR light emitters

Direct epitaxial growth of III-V materials on complementary metal-oxide-semiconductor (CMOS)-compatible Si substrates has long been a scientific and engineering problem for next-generation light-emitters and non-volatile memories etc. The challenges arise from the lattice mismatch, thermal mismatch, and polarity mismatch between these materials. We report a detailed study of growing high-quality GaSb epilayers with low defect density on on-axis silicon substrates by interface engineering through all-molecular beam epitaxy (MBE) technology. We also systematically investigated the defect self-annihilation mechanism of GaSb epitaxially grown on on-axis Si (001) substrates. It was found that the misfit dislocation array was formed at the interface of AlSb/Si; threading dislocations and antiphase domain boundary annihilated at the initial GaSb layer promoted by the high-density AlSb islands, which was confirmed by transmission electron microscopy (TEM) results. Finally, a 2 µm GaSb epilayer with a step-flow surface, root-mean-square (RMS) roughness of 0.69 nm, and a rocking curve full width at half maximum (FWHM) of 251 arcsec was obtained. The photoluminescence in the near-infrared region of the GaSb/AlGaSb quantum well grown on Si substrate was also demonstrated. Our results highlighted the possible step towards the all-MBE direct growth of Sb-based infrared optoelectronic and microelectronic devices on CMOS-compatible Si substrates.

A CMOS Compatible Si Template with (111) Facets for Direct Epitaxial Growth of III–V Materials**Supported by the National Natural Science Foundation of China under Grant Nos. 61635011, 61975230, 61804177, 11434041 and 11574356, the National Key Research and Development Program of China (2016YFA0300600 and 2016YFA0301700), and the Key Research Program of Frontier Sciences, CAS (No. QYZDB-SSW-JSC009). Ting Wang is supported by

III–V quantum dot (QD) lasers monolithically grown on CMOS-compatible Si substrates are considered as essential components for integrated silicon photonic circuits. However, epitaxial growth of III–V materials on Si substrates encounters three obstacles: mismatch defects, antiphase boundaries (APBs), and thermal cracks. We study the evolution of the structures on U-shaped trench-patterned Si (001) substrates with various trench orientations by homoepitaxy and the subsequent heteroepitaxial growth of GaAs film. The results show that the formation of (111)-faceted hollow structures on patterned Si (001) substrates with trenches oriented along [110] direction can effectively reduce the defect density and thermal stress in the GaAs/Si epilayers. The (111)-faceted silicon hollow structure can act as a promising platform for the direct growth of III–V materials for silicon based optoelectronic applications.

Defect engineering of VO2 thin films synthesized by Chemical Vapor Deposition

Vanadium dioxide (VO2) has been a much sought after candidate for many electronics and photonics based applications. These applications demand CMOS compatibility and simple but scalable synthesis procedure. Herein we report the deposition of VO2 on CMOS compatible Si substrates via easily scalable Metal Organic Chemical Vapor Deposition (MOCVD) at different substrate temperatures between 520 and 550 °C. The morphology of the films deposited at different growth temperatures varied drastically despite retaining VO2 in the M1 phase. This was verified by XRD and Raman experiments. The thin films deposited at 535 °C showed sharp grain boundaries with a grain size of about 200 nm. Similarly, the electrical characteristics of the films deposited at 535 °C showed superior transition compared to the films deposited at other temperatures. However the films deposited at 550 °C retained the superiority in the transition strength, the transition width and the hysteresis of the transition increased at that temperatures. We understand that the reason for this observed behavior is the fraction of surface defects. It is seen from XPS measurements that vanadium was available in V3+, V4+ and V5+ oxidation states and the fractions of these individual components varied in all the thin films deposited at different temperatures. We believe that the defects fraction can give a handle to control the nature and quality of the transition in VO2.

Fabrication of Crystalline Si Waveguides on (1 0 0) Bulk Si Substrate Using Laser Reformation Method

Optical solution has been proposed for short-reach interconnects. A primary concern is the integration of photonics and electronics. A method to fabricate crystalline Si waveguides on insulator from bulk Si substrate using a laser reformation technique is here presented. A high-power laser is used to melt and reshape a Si fin structure. This is followed by an oxidation process to produce oxide as an optical isolation layer beneath the Si and form the waveguide structure. The Si waveguide, using laser reformation method in our experiment, has 140 nm width and 420 nm height, showing a single mode property and an effective refractive index of about 2.09. It represents a viable method for creating crystalline Si waveguides on CMOS-compatible Si substrate and reveals the potential of Si photonic devices integrated with Si electronics.