Clear Plastic Substrates Research Articles

Self-Aligned Amorphous Silicon Thin-Film Transistors Fabricated on Clear Plastic at 300 $^{\circ}\hbox{C}$

We fabricated back-channel-cut and back-channel-passivated hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) on clear-plastic (CP) foil substrates using a silicon nitride (SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">∞</sub> ) deposition temperature of 300°C. The TFTs were fabricated on CP and are as stable under high gate bias as TFTs made on glass substrates. A self-alignment technique was developed to align the channel passivation, the a-Si:H island, and the source/drain (S/D) terminals to the gate. Self-alignment allowed us to fabricate discrete TFTs across 7 7 × cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of a free-standing sheet of CP foil to reduce the TFT channel length L to 3 m and reduce the S/D overlap with the gate L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SD</sub> to ~1. To test the self-alignment techniques, we fabricated ring oscillators on the CP substrates. These results show that it is possible to fabricate state-of-the-art self-aligned a-Si:H TFTs and TFT circuits on plastic substrates.

Low-Temperature-Processible, Transparent, and Air-Operable n-Channel Fluorinated Phenylethylated Naphthalenetetracarboxylic Diimide Semiconductors Applied to Flexible Transistors

New N,N′-disubstituted-1,4,5,8-naphthalene tetracarboxylic acid diimides (NTCDI) with fluorinated phenylethyl groups were synthesized. In particular, N,N′-bis(2-(pentafluorophenyl)ethyl)-1,4,5,8-naphthalene tetracarboxylic acid diimide (5FPE-NTCDI) showed high electron mobility, more than 0.1 cm2/(V s) in air, even though the film was deposited at room temperature. The correlation of the crystallinity, morphology, and mobility with the substrate temperature during deposition (Tsub) was studied using X-ray diffraction (XRD) and atomic force microscopy (AFM). The films of 5FPE-NTCDI exhibited a “thin film phase”, mixed phase, and crystal bulk phase as Tsub was increased. The mixed phase on an octadecyltrimethoxysilane (OTS)-treated substrate also has high electron mobility due to well connected long fiber-shaped grains. The high mobility at low Tsub has enabled fabrication of flexible transistors on the clear plastic substrate poly(ethylene terephthalate) (PET). The highest mobility for a flexible, transparent transistor was 0.23 cm2/(V s), obtained with low hysteresis.

Self-aligned Amorphous Silicon Thin Film Transistors with Mobility above 1 cm2V−1s−1fabricated at 300°C on Clear Plastic Substrates

ABSTRACTWe have developed a fabrication process for amorphous-silicon thin-film transistors (a-Si:H TFTs) on free-standing clear plastic substrates at temperatures up to 300°C. The 300°C fabrication process is made possible by using a unique clear plastic substrate that has a very low coefficient of thermal expansion (CTE &lt; 10ppm/°C) and a glass transition temperature higher than 300°C. Our TFTs have a conventional inverted-staggered gate back-channel passivated geometry, which we designed to achieve two goals: accurate overlay alignment and a high effective mobility. A requirement that becomes particularly difficult to meet in the making of TFT backplanes on plastic foil at 300°C is minimizing overlay misalignment. Even though we use a substrate that has a relatively low CTE, accurately aligning the TFTs on the free-standing, 70-micrometer thick substrate is challenging. To deal with this immediate challenge, and to continue developing processes for free-standing web substrates, we are introducing techniques for self-alignment to our TFT fabrication process. We have self-aligned the channel to the gate by exposing through the clear plastic substrate. To raise the effective mobility of our TFTs we reduced the series resistance by decreasing the thickness of the amorphous silicon layer between the source-drain contacts and the accumulation layer in the channel. The back-channel passivated structure allows us to decrease the thickness of the a-Si:H active layer down to around 20nm. These changes have enabled us to raise the effective field effect mobility on clear plastic to values above 1 cm2V−1s−1

Amorphous Silicon Thin-Film Transistor Backplanes Deposited at 200 $^{\circ}{\hbox{C}}$ on Clear Plastic for Lamination to Electrophoretic Displays

The transition of thin-film transistor (TFT) backplanes from rigid plate glass to flexible substrates requires the development of a generic TFT backplane technology on a clear plastic substrate. To be sufficiently stable under bias stress, amorphous-silicon (a-Si:H) TFTs must be deposited at elevated temperatures, therefore the substrate must withstand high temperatures. We fabricated a-Si:H TFT backplanes on a clear plastic substrate at 200degC. The measured stability of the TFTs under gate bias stress was superior to TFTs fabricated at 150degC. The substrate was dimensionally stable within the measurement resolution of 1, allowing for well-aligned 8 times 8 and 32 times 32 arrays of pixels. The operation of the backplane is demonstrated with an electrophoretic display. This result is a step toward the drop-in replacement of glass substrates by plastic foil.

Active-Matrix Amorphous-Silicon TFTs Arrays at 180$^circhboxC$on Clear Plastic and Glass Substrates for Organic Light-Emitting Displays

An amorphous-silicon thin-film transistor (TFT) process with a 180 degC maximum temperature using plasma-enhanced chemical vapor deposition has been developed on both novel clear polymer and glass substrates. The gate leakage current, threshold voltage, mobility, and on/off ratio of the TFTs are comparable with those of standard TFTs on glass with deposition temperature of 300 degC-350 degC. Active-matrix pixel circuits for organic light-emitting displays (LEDs) on both glass and clear plastic substrates were fabricated with these TFTs. Leakage current in the switching TFT is low enough to allow data storage for video graphics array timings. The pixels provide suitable drive current for bright displays at a modest drive voltage. Test active matrices with integrated polymer LEDs on glass showed good pixel uniformity, behaved electrically as expected for the TFT characteristics, and were as bright as 1500 cd/m2

Self-aligned amorphous-silicon TFTs on clear plastic substrates

We fabricated the first bottom-gate amorphous silicon (a-Si:H) thin-film transistors (TFTs) on a clear plastic substrate with source and drain self-aligned to the gate. The top source and drain are self-aligned to the bottom gate by backside exposure photolithography through the plastic substrate and the TFT tri-layer. The a-Si:H channel in the tri-layer is made only 30 nm thick to ensure high optical transparency at the exposure wavelength of 405 nm. The TFTs have a threshold voltage of /spl sim/3 V, subthreshold slope of /spl sim/0.5 V/dec, linear mobility of /spl sim/1 cm/sup 2/V/sup -1/ s/sup -1/, saturation mobility of /spl sim/0.8 cm/sup 2/V/sup -1/s/sup -1/, and on/off current ratio of >10/sup 6/. These results show that self-alignment by backside exposure provides a solution to the fundamental challenge of making electronics on plastics: overlay misalignment.

Stability of amorphous-silicon TFTs deposited on clear plastic substrates at 250/spl deg/C to 280/spl deg/ C

Amorphous-silicon (a-Si) thin-film transistors (TFTs) were fabricated on a free-standing new clear plastic substrate with high glass transition temperature (T/sub g/) of >315/spl deg/ C and low coefficient of thermal expansion of <10 ppm/ /spl deg/ C. Maximum process temperatures on the substrates were 250/spl deg/C and 280/spl deg/C, close to the temperatures used in industrial a-Si TFT production on glass substrates. The first TFTs made at 280/spl deg/C have dc characteristics comparable to TFTs made on glass. The stability of the 250/spl deg/C TFTs on clear plastic is approaching that of TFTs made on glass at 300/spl deg/C-350/spl deg/C. TFT characteristics and stability depend only on process temperature and not on substrate type.

SiNx barrier layers deposited at 250°C on a clear polymer substrate

ABSTRACTInterest is widespread in flexible thin-film transistor backplanes made on clear polymer foil, which could be universally employed for a variety of applications. All ultralow process temperatures, plastic compatible thin film transistor (TFT) technologies battle short or long term device instabilities. The quality and stability of amorphous silicon thin-film transistors (a-Si:H TFTs) improves with increasing process temperature. TFT stacks deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) exhibit higher threshold voltage shifts after gate bias stressing than stacks deposited at ∼300°C in the active matrix liquid-crystal display (AMLCD) industry [1]. Therefore, optically clear plastic (CP) substrates are desired that tolerate high process temperatures. The first step in a-Si:H TFT fabrication on a polymer is the deposition of a planarizing barrier and adhesion layer. For this purpose we have been using silicon nitride (SiNx) grown by PECVD.This paper discusses the substrate preparation and SiNx deposition for the process temperature of 250°C. We study the mechanical strain in the SiNx film on the CP substrate, as a function of RF power. Earlier work has shown that SiNx films deposited at low RF power are under tensile strain, and become increasingly compressed as the deposition power is raised [2]. Additionally, at very high deposition power the substrate is bombarded at the beginning of film growth to achieve good film adhesion. The goal is to identify the correct processing conditions at which the total mismatch strain between the film and the substrate is minimized, to keep the film/substrate composite flat and avoid mechanical fracture as well as peeling due to poor adhesion. Optimal deposition conditions were identified to obtain crack-free SiNx barrier layers. The barrier layers were tested by fabricating a-Si:H TFTs on them at 250°C.

High mobility nanocrystalline silicon transistors on clear plastic substrates

We demonstrate nanocrystalline silicon (nc-Si) top-gate thin-film transistors (TFTs) on optically clear, flexible plastic foil substrates. The silicon layers were deposited by plasma-enhanced chemical vapor deposition at a substrate temperature of 150/spl deg/C. The n-channel nc-Si TFTs have saturation electron mobilities of 18 cm/sup 2/V/sup -1/s/sup -1/ and transconductances of 0.22 /spl mu/S/spl mu/m/sup -1/. With a channel width to length ratio of 2, these TFTs deliver up to 0.1 mA to bottom emitting electrophosphorescent organic light-emitting devices (OLEDs) which were fabricated on a separate glass substrate. These results suggest that high-current, small-area OLED driver TFTs can be made by a low-temperature process, compatible with flexible clear plastic substrates.

P-24: High-Temperature (250°C) Amorphous-Silicon TFT's On Clear Plastic Substrates

silicon (a-Si) thin film transistors (TFT's) were fabricated on free-standing, clear plastic substrates with a maximum process temperature of up to 250° C. An a-Si TFT backplane for active matrix OLED (AMOLED) application was also made on such substrates. The performance of both the TFT's and the AMOLED backplane are excellent. These results will enable the fabrication of flexible AMLCD or AMOLED displays on clear plastic substrates with the TFT processes currently used for glass substrates.