This paper presents an analysis of outphasing class-E power amplifiers (OEPAs), using load-pull analyses of single class-E PAs. This analysis is subsequently used to rotate and shift power contours and rotate the efficiency contours to improve the efficiency of OEPAs at deep power back-off, to improve the output power dynamic range (OPDR), and to reduce switch voltage stress. To validate the theory, a 65-nm CMOS prototype, using a PCB transmission-line-based power combiner was implemented. The OEPA provides +20.1 dBm output power from ${V}_\mathrm{DD}= 125$ V at 1.8 GHz with more than 65% drain efficiency (DE) and 60% power-added efficiency (PAE). The presented technique enables more than 49-dB OPDR and 37% DE and 22% PAE at 12-dB back-off with reduced switch voltage stress.