Clamped Switching Research Articles

Adaptive Dead-Time and Partial-ZVS Regulation for GaN-Based Active Clamp Flyback Converter With Predictive Hysteresis Current Mode Control

Active clamp flyback (ACF) converter is regarded as a good candidate in high-frequency small-size adapters. With adaptive dead-time optimization method, there is no reverse conduction loss and switching-on loss in power switches, then ACF can realize optimum full-ZVS control at every operating conditions. However, the other losses such as the conduction loss of clamp switch, the primary winding loss of transformer may be increased to counteract this efficiency advantage, but which has not been outlined. Therefore, this paper proposes a higher-efficiency predicted hysteresis current mode (PHCM) control strategy with adaptive dead-time and partial-ZVS regulation for GaN-based ACF converter for the first time. Firstly, the accurate analytical model by considering above losses is derived. Secondly, the optimal valley current is calculated by the minimum loss, to determine the conduction time of clamp switch and the dead time of main switch. Finally, a digital controlled GaN-based ACF converter is designed to verify the method. The computation speed of needed analytical equations and the magnetizing inductance offset are considered in implementation process. The experimental results show the proposed method can improve efficiency by 0.4% than existing method, which also show a fast dynamic response since the cycle-by-cycle variable-frequency control concept.

An Integrated GaN Overcurrent Protection Circuit for Power HEMTs Using SenseHEMT

GaN power high-electron-mobility transistors (HEMTs), with their fast switching transients and poor overcurrent tolerance, require overcurrent protection (OCP) circuits that can respond in under <inline-formula><tex-math notation="LaTeX">$\text{0.5}\, \mu \text{s}$</tex-math></inline-formula>. Monolithically integrating digital and analog circuits with GaN power devices is enabled by recent advancements in high-voltage GaN integrationplatforms. Thus, integrated OCP designs can be used to reduce the protection response time, the area penalty, and the assembly complexity. This work presents the first fully integrated, senseHEMT-based GaN OCP integrated circuit (IC) with an adjustable current limit and programmable blanking time, suitable for a wide range of power applications. The IC, implemented on a 200-V GaN-on-Silicon-on-Insulator (GaN-on-SOI) process, contains a power HEMT with a senseHEMT for current sensing, a totem-pole-based gate driver, an analog comparator, and a set of logic circuits to enable high-speed closed-loop OCP. The fabricated design is tested in both a clamped switching setup and a 12&#x2013;48 V boost converter. The minimum OCP response time is estimated to be 36 ns with <inline-formula><tex-math notation="LaTeX">$dI_{D}/dt\geq \text{30}\,\text{A}/\mu \text{s}$</tex-math></inline-formula>, one of the fastest amongst state-of-the-art OCP circuits for GaN.

A novel high-speed bi-directional piezoelectric inchworm actuator based on flexible supported baffles

Typical bionic piezoelectric inchworm actuators utilize at least two clamping piezo-stacks (PZTs) and one driving PZT to achieve bi-directional actuation, resulting in complex structures, complicated electronic systems, and high cost. Actuators with lesser PZTs (1 or 2) can effectively alleviate these problems; however, existing designs are limited to unidirectional or bidirectional low-speed motion. This study proposes a high-speed bi-directional inchworm actuator with two PZTs, where the clamping switching is achieved by only one PZT through innovative use of flexible supported baffles and enhanced clamping mechanisms. The design also reduces the six sub-steps of the driving principle (alternate elongation and shortening of three PZTs) required for each step of typical designs to four, thus effectively increasing the maximum speed of the actuation. Experimental results show that the proposed design facilitates bi-directional motions in a stable manner with a maximum speed of 5.1 mm s−1, which is approximately 23 times faster than the existing design with two PZTs. The proposed design can effectively expand the application range of dual-piezoelectric inchworm actuators and can find a promising application in the field of high-speed precision positioning.

Highly Efficient Quasi-Single-Stage AC-DC Converter Employing Bidirectional Switch

This article proposes a highly efficient quasi-single-stage ac–dc converter that incorporates a bidirectional switch at the secondary side of the circuit. Its attractiveness is that the proposed ac–dc converter achieves almost ZVS turn-off at high instantaneous power and low-voltage turn-off at low instantaneous power. Moreover, the secondary-side switching reduces the loss at the main switch, and thereby more than offsets the losses that occur at the main switch and the clamp switch in a conventional ac–dc converter. An additional benefit of this converter is that the voltages across the primary-side capacitors and secondary-side capacitors are well balanced because the duty cycle at the primary-side switch is fixed at 0.5. Experimental results show that the proposed ac–dc converter is effective and more efficient than a conventional solution.

A Discontinuous PWM Strategy to Control Neutral Point Voltage for Vienna Rectifier With Improved PWM Sequence

Vienna rectifier is a boost-type rectifier with unidirectional energy flow, which is widely used in industrial applications. To improve the power density of the Vienna rectifier, the high switching frequency is seen as an inevitable cause of larger switching losses. To reduce switching losses, discontinuous pulsewidth modulation (DPWM) is usually used. But this will cause dc offset and ac ripple on neutral point (NP) voltage. To overcome these problems, a carrier-based DPWM (CB_DPWM) method suitable for a Vienna rectifier with simple implementation is proposed to simultaneously reduce switching losses and control NP voltage. By selecting the proper clamping mode, NP voltage can be well controlled. To avoid unnecessary switching actions while switching clamping mode, an improved PWM sequence based on carrier type is given. The comparisons among space vector PWM, DPWM 1–3 presented by Zhang <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">et al.</i> , and the proposed CB_DPWM are presented with the corresponding simulation and experimental results, and the superiority of the proposed strategy is verified in terms of reducing switching loss and controlling NP voltage.

Clamped and Unclamped Inductive Switching of 3.3 kV 4H-SiC MOSFETs with 3D Cellular Layouts

This work presents for the first time a comparative numerical study on the performance of planar 3.3 kV SiC MOSFETs during clamped and unclamped inductive switching for various cell layouts and pitches. It is demonstrated that despite its larger on-state losses, the atomic lattice layout (ALL) incurs smaller switching losses than the stripe and the circular designs for all examined cell pitches. Conversely, while the ALL does turn off earlier than the other layouts during UIS, the decrease in the peak lattice temperature that it brings is predicted to be marginal if just a single unit cell is considered.

Structure and efflux mechanism of the yeast pleiotropic drug resistance transporter Pdr5

Pdr5, a member of the extensive ABC transporter superfamily, is representative of a clinically relevant subgroup involved in pleiotropic drug resistance. Pdr5 and its homologues drive drug efflux through uncoupled hydrolysis of nucleotides, enabling organisms such as baker’s yeast and pathogenic fungi to survive in the presence of chemically diverse antifungal agents. Here, we present the molecular structure of Pdr5 solved with single particle cryo-EM, revealing details of an ATP-driven conformational cycle, which mechanically drives drug translocation through an amphipathic channel, and a clamping switch within a conserved linker loop that acts as a nucleotide sensor. One half of the transporter remains nearly invariant throughout the cycle, while its partner undergoes changes that are transmitted across inter-domain interfaces to support a peristaltic motion of the pumped molecule. The efflux model proposed here rationalises the pleiotropic impact of Pdr5 and opens new avenues for the development of effective antifungal compounds.

Experimental Efficiency Evaluation of Stacked Transistor Half-Bridge Topologies in 14 nm CMOS Technology

Different Half-Bridge (HB) converter topologies for an Integrated Voltage Regulator (IVR), which serves as a microprocessor application, were evaluated. The HB circuits were implemented with Stacked Transistors (HBSTs) in a cutting-edge 14 nm CMOS technology node in order to enable the integration on the microprocessor die. Compared to a conventional realization of the HBST, it was found that the Active Neutral-Point Clamped (ANPC) HBST topology with Independent Clamp Switches (ICSs) not only ensured balanced blocking voltages across the series-connected transistors, but also featured a more robust operation and achieved higher efficiencies at high output currents. The IVR achieved a maximum efficiency of 85.3% at an output current of 300 mA and a switching frequency of 50 MHz. At the maximum measured output current of 780 mA, the efficiency was 83.1%. The active part of the IVR (power switches, gate-drivers, and level shifters) realized a high maximum current density of 24.7 A/mm2.

Selective Lower Order Harmonic Elimination in DC-AC Converter Using Space Vector Approach

A novel space vector-based approach is introduced in this brief to selectively eliminate the lower order harmonics from the DC-AC converter output waveform by making use of double switching clamping sequences. This technique uses a volt-second balance for control of fundamental voltage while using the dwell time rearrangement of the active vector in a sub-cycle to obtain the elimination of fifth or seventh harmonics. Further, the closed-form expression of the dwell time-division coefficient (DTDC) for the active vector dwell time division rearrangement is expressed. The proposed PWM technique is compared with other space vector-based PWM techniques in terms of voltage weighted total harmonic distortion, switching power loss, and lower order harmonic magnitudes. Further, the experimental results are presented to show the effectiveness of the proposed PWM techniques in terms of harmonic elimination.

Digitally controlled GaN‐based MHz active clamp flyback converter with dynamic dead time optimisation for AC–DC adapter

The active clamp flyback (ACF) converter utilising gallium nitride (GaN) devices with high-switching frequency and high efficiency is impressive in system miniaturisation for AC–DC adapters. Owing to poor reverse conduction of GaN devices, the improper dead time between two switches can cause large power consumption in high frequency. This study proposes a dynamic dead time optimisation technique for GaNs ideal zero-voltage switching (ZVS) to address the issue. It adjusts the clamp switch on time to avoid large reverse conduction voltage stress on the main switch in different loads conditions. In addition, a new control scheme for clamp switch is introduced for enhancing efficiency in light to medium load. These techniques are experimentally verified on a 45 W (20 V/2.25 A) prototype of an ACF converter with a field-programmable gate array. The controller enables the system to operate at 1 MHz and dynamically modulates the dead-time under universal input and full load. With the light load ZVS control scheme, the system can achieve a maximum efficiency of 94.12 and 80.23% in the worst case. The prototyped converter can achieve power density (exclude case and controller) of 18 W/in3.

A review on RF micro-electro-mechanical-systems (MEMS) switch for radio frequency applications

This paper is designed to review the MEMS switch by considering key aspects on the basis of mechanical structure, actuation methods, and types of contact and circuit configurations. The cantilevered and clamped–clamped switch structures are explored and discussed. Actuation methods and switch configurations have also been covered to give more insights about their placements and performances in RF systems. The electrostatic and piezoelectric actuation mechanisms can result in fast RF MEMS switches and better reliability but at the cost of increased pull-in voltage. The electrostatic method is mostly employed in MEMS switches due to its distinctive advantages. The resistive switch uses less actuation voltage compare to a capacitive switch but suffers from reliability issue. Nevertheless, the capacitive MEMS switches are prominent in use over ohmic contact switches due to better RF performance and reliabilities by offering lifetime of 3–10 million cycles. The RF MEMS switches can be placed in series, shunt and mixed configurations as per application requirements. Capacitive switches are mostly utilized in RF systems and placed in shunt with coplanar waveguide signal lines. These RF MEMS switches find applications in sensors, resonators, amplifiers, phase shifters, and MEMS satellite vehicles for space applications.

Modulation and Capacitor Voltage Balancing Control of Multilevel NPC Dual Active Bridge DC–DC Converters

The present paper provides a solution to operate multilevel dual active bridge (ML-DAB) converters built upon neutral point clamped switching legs in a full-bridge disposition and with any number of levels on either side of the converter. The main issue of such converters is addressing the inherent unbalance of the dc-link capacitor voltages, which hinders the proper operation and optimum utilization of the converter. The proposed solution comprises a generalized to N levels modulation and control scheme that allows operating these converters, while guaranteeing the proper balance of the dc-link capacitor voltages. The suitability of the proposed solution is verified through simulation and experimental tests performed in five different converter configurations, three of them with an asymmetric number of voltage levels, proving that capacitor voltage balance is achievable in a wide range of operation conditions. Moreover, the efficiency of the ML-DAB converters is demonstrated to be superior to the conventional two-level DAB case.

Bipolar Phase Shift Modulation Single-Stage Audio Amplifier Employing a Full Bridge Active Clamp for High Efficiency Low Distortion

Two-stage power conversion of class-D amplifier with front-end switching mode power supply affects the power conversion efficiency of audio amplifier system. Single-stage inverter (SSI) developed from cycloconverter can be used as audio amplifier to improve efficiency. However, current commutation of cycloconverter switches challenges for high efficiency and low total harmonic distortion (THD). In this article, a bipolar phase shift modulation (BPSM) SSI is proposed for high efficiency low distortion audio amplification. Full bridge active clamp (FBAC) circuit is used to clamp the voltage across cycloconverter switches and recycle the energy of filter inductor and leakage inductance. By using active clamp, utilization of magnetizing inductance current and optimization of driving sequence of clamp switches, zero voltage switching of the proposed BPSM FBAC-SSI is achieved over wide range. With BPSM and voltage clamp across cycloconverter switches, low THD of output voltage is also achieved. A 200 kHz prototype with 250 W output power is presented to verify the analysis results of the proposed BPSM FBAC-SSI.

Modeling and Mitigation of Multiloops Related Device Overvoltage in Three-Level Active Neutral Point Clamped Converter

This article establishes an analytical model for the device drain–source overvoltage related to the two loops in three-level active neutral point clamped (3L-ANPC) converters. Taking into account the nonlinear device output capacitance, two common modulation methods are investigated in detail. The results show that the line switching frequency device usually has higher overvoltage, and the switching speed of the high switching frequency device is not strongly influenced by the multiple loops. By keeping the nonactive clamping switch off , the effect of the nonlinear device output capacitance can be significantly mitigated, which helps reduce the overvoltage. Moreover, the loop inductance can be reduced with vertical loop layout and magnetic cancellation in the printed circuit board and busbar design. A 500-kVA 3L-ANPC converter using silicon carbide mosfet s was built and tested. The experimental results validate the overvoltage model of the two modulation methods as well as the busbar design. With the nonactive clamping switch off , the overvoltage of both the high and line switching frequency devices is significantly reduced, which helps achieve higher switching speed.

Direct observation of domain kinetics in rhombohedral PMN-28PT single crystals during polarization reversal

Relaxor-based ferroelectric crystals of lead magnesium niobate-lead titanate (PMN-PT) are attracting great attention due to their prominent piezoelectric properties. Moreover, an enhancement of the integral properties requires the deep understanding of domain kinetics and domain structure evolution for application of the domain engineering techniques in relaxor-PT materials. Here, we demonstrate the results of studying the domain structure evolution by direct optical imaging during polarization reversal in [111]-oriented rhombohedral PMN-PT single crystals. Three domain types involved in the switching process have been revealed. The following consequent stages of the domain structure evolution have been separated: (I) nucleation and growth of a↑-domains and 2a-CDW and (II) nucleation and growth of c↓-domains. The undesirable effect of the partial backswitching during the electric field decrease was attributed to the clamped switching conditions.

A New SVPWM Technique to Reduce the Inductor Current Ripple of Three-Phase Z-Source Inverter

This paper proposes the use of advanced bus clamping switching sequences to reduce the impedance network inductor current ripple of the three-phase Z -source inverter (ZSI). Proposed technique is named as ABC4_MCB. MCB denotes that the maximum constant boost control method is used for the voltage boosting. One of the conventional space vector pulsewidth modulation of ZSI, “ZSVM6,” is termed as ZSVM6_MCB under the maximum constant boost control method. The switching sequences of ABC4_MCB technique are designed in such a way that it offers around 34% reduction in the maximum instantaneous inductor current ripple as compared to the ZSVM6_MCB for the equal average switching frequency. The factor of percentage reduction in the inductor current ripple using the proposed technique is constant over the entire range of shoot through duty ratio (0–0.48). Theoretical findings have been verified using simulation and experimental results.

Engineering a responsive DNA triple helix into an octahedral DNA nanostructure for a reversible opening/closing switching mechanism: a computational and experimental integrated study.

We propose an experimental and simulative approach to study the effect of integrating a DNA functional device into a large-sized DNA nanostructure. We selected, as a test bed, a well-known and characterized pH-dependent clamp-switch, based on a parallel DNA triple helix, to be integrated into a truncated octahedral scaffold. We designed, simulated and experimentally characterized two different functionalized DNA nanostructures, with and without the presence of a spacer between the scaffold and the functional elements. The experimental and simulative data agree in validating the need of a spacer for the occurrence of the pH dependent switching mechanism. The system is fully reversible and the switching can be monitored several times without any perturbation, maintaining the same properties of the isolated clamp switch in solution.

Direct observation of the domain kinetics during polarization reversal of tetragonal PMN-PT crystal

Lead magnesium niobate-lead titanate (PMN-PT) solid solutions are intensively studied for the last two decades due to their outstanding piezoelectric properties. However, despite the strong interest, there is a lack of studies of domain kinetics and domain structure evolution, which are of great importance for the development of domain engineering in PMN-PT. We present the results of the domain kinetics study during polarization reversal in tetragonal PMN-PT single crystals by in situ optical visualization accompanied by analysis of the switching current. Three types of domain structure evolution have been revealed: (1) formation and growth of macroscopic a-domains, (2) formation of charged domain walls as a result of intersections of macroscopic a-domains, and (3) formation and growth of c-domains. The domain wall motion velocities were estimated. It has been shown by comparison of the switching current and optical one that the main switching current peak is related to the growth of c-domains, whereas the small one is caused by the capacitive input of the charged domain walls. The enhancement of dielectric permittivity by two orders of magnitude due to the appearance of the charged domain walls has been revealed. The difference of forward and reverse polarization reversals was attributed to the clamped switching conditions.

Design of a CDS ASIC for Multireadout X-Ray CCDs With a 0.032% INL

Design, analysis, and experimental results of a four-channel correlated double sampling (CDS) application specific integrated circuit (ASIC), named CDS4C, are presented. It aims to interface a type of multi-readout swept charge device for applications in the fields of X-ray spectroscopy, imaging as well as timing. Compared with the conventional CDS architectures based on clamping technique, the innovation of the CDS4C ASIC is that it not only moves the clamping switch out of the signal path but also omits the sampling switch, eliminating the nonlinearity and thermal noise introduced by these switches. Besides, it is implemented in a fully differential architecture which suppresses the second-order harmonic distortion and common-mode interferences, improving the linearity furthermore. A theoretical noise analysis that takes into account the limited bandwidth of the opamp highly coincides with the simulation results. A prototype of the CDS4C ASIC is fabricated with GlobalFoundries 0.35- $\mu \text{m}$ CMOS process. The experimental results show, within the effective input dynamic range of 0~20 mV which is equivalent to an X-ray energy band from 0 to 18.25 keV, its integral nonlinearity is 0.032% and equivalent noise charge (ENC) is 8.6 e− under 100 kHz pixel rate, whilst the total power consumption is only 8.5 mW from a single 3.3-V supply voltage. When tested with the target X-ray charge-coupled device (CCD)–CCD236 using a 1 $\mu$ Ci 55Fe radioisotope, the ASIC achieves together with the CCD an overall energy resolution characterized by full-width-half-magnitude as 165 ± 4.5 eV at 5.9 keV and a total ENC as 10.3 e− where CCD236 is cooled down to in the vicinity of 190-K.

CDS circuit with BLA function for X‐ray CCD applications

Correlated double sampling (CDS) circuits are essential to process the X-ray charge-coupled devices (CCDs) that have been used in the modern X-ray astronomical field. A novel CDS circuit is presented. The innovation of the circuit is that it greatly improves the noise and linearity performances through moving the clamping switch out of the signal path as well as omitting the sampling switch which eliminates the nonlinearity and thermal noise introduced by these switches. Also, a baseline adjustment (BLA) circuit is incorporated so as to make efficient use of the dynamic range of the ADC, making the CDS circuit flexible to interface the CCD operating under a wide range of temperatures. A prototype application-specific integrated circuit (ASIC) is designed with GlobalFoundries 0.35 μm CMOS process and the experimental results show that with pixel rate varying from 100 kHz to 1 MHz, the integral nonlinearity and equivalent input noise performances are quite consistent, which are better than 27 ppm and 23 μV, respectively, within a dynamic range of 1.5 Vpp. The effective adjustment range of the BLA is at least 2 V, and the power consumption for a single CDS core is 10 mW approximately from a 3.3 V power supply.