Chip-on-plate Research Articles

High power LED assemblies for solid state lighting – Thermal analysis

We report on the Chip-on-Plate (COP) packaged high power LED assemblies for solid state lighting (SSL) and backlighting display applications from thermal analysis perspective. Three different light modules with different elements (devices) distribution and heatsink design were considered. Thermal resistance circuit (TRC) model and heat diffusion equation were employed in this study of thermal behavior of the assembly elements. Finite element analysis along with 3D modeling and simulations were used for considered lighting modules and assemblies. Also, the effect of thermal uniformity on the emission spectra was evaluated for different operating powers. Comparative study showed that conventional packages with circularly symmetric having non-uniform devices’ distribution per unit area will have temperature differences ∼7°C among the chip-elements operating around 1.25W power level. Also, it was predicted that high elements temperature difference could result in over 2nm redshift in the emission spectra accompanied by ∼ 4% drop in the output power. However, temperature difference was found to be less than 1°C for the uniform rectangular array module distribution, which ensures uniform output intensity for all devices. Such findings are extremely useful for designing larger area LED packaging where thermal non-uniformity effects are expected to be more severe for devices’ longevity and performance.

A novel method for the thermal analysis of GaN/AlGaN back-illuminated high power UV LEDs

We report a novel method for the thermal analysis of high-power multi-quantum well GaN/AlGaN UV LEDs of λ ∼ 330 nm. 3D modeling and simulations of chip-on-plate (COP) have been investigated for the packaging of UV LEDs. Steady state thermal analysis of COP packaged devices were carried out using finite element method (FEM). Different heat sinks’ designs such as plate-fins, and pin-fins were modeled to determine device junction temperatures (Tj). We also employed thermal resistance circuit (TRC) model to determine the Tj considering both conductive and convective methods of heat transfer. Results were in good agreement both for the FEM and TRC models. For the fine plate-fin dense and the less-dense large-fins heat sinks, calculated Tj values were ∼37 °C, and ∼46 °C for a corresponding operating power of ∼1.5 W, respectively. On other hand, similar power level junction temperatures of 33 °C and 41 °C were determined respectively for high- and low-density pin-fins heat sinks. Furthermore, thermal flux analysis of these heat sinks was also performed. A comparative study of on–substrate un-packaged and two different (COP) packaged devices was also performed. It was found that our COP based packaged devices are thermally more stable with improved photoluminescence (PL) intensity. As much as around 30% enhancement in the PL intensity of the packaged devices along with a noticeable decrease in the red-shift (about 7 nm) of the spectrum was determined.

Thermal measurements and analyses of low-cost high-power LED packages and their modules

The thermal behaviors of high-power light emitting diode (LED) chip-on-plate (COP) package and module are investigated by experimental measurements (with LED junction temperature (Tj) tester, thermocouples, and thermal imager), a thermal resistance circuit (TRC) method, a commercial finite element code (ANSYS), and a computational fluid dynamics code (CFdesign). Based on the experimental results, the thermal resistance of the COP package was found to be comparable to those for the commercial packages. Furthermore, it was also found that the Tj and thermal resistances of the COP package and module, calculated from 2D ANSYS, 3D TRC and 3D CFdesign, are consistent well with those from the experiments. Besides, the uncertain equation-based convection coefficients used in ANSYS and TRC for the thermal analysis of the COP module were closely examined and discussed in detail by comparing with those from CFdesign analysis. Moreover, the validated ANSYS and CFdesign models were used for parametric studies of the COP module and further provided useful design parameters. Finally, the COP module under natural and forced convection conditions was studied, and the results showed that the junction-to-air thermal resistances are sensitive to the flow conditions, but not for thermal resistances from the junction to aluminum substrate and to heat sink.

Thermal Resistance and Reliability of High-Power LED Packages Under WHTOL and Thermal Shock Tests

The light emitting diode (LED) packaging problems associated with high cost, high junction temperature, low luminous efficiency, and low reliability have to be resolved before the LED gaining more market acceptance. In this paper, chip-on-plate (CoP) LED packages with and without phosphors are evaluated in terms of thermal resistance and reliability under wet and high-temperature operation life (WHTOL) and thermal shock tests. The WHTOL test is with the condition of 85°C/85%RH and 350 mA of forward current for 1008 h, while thermal shock test is with 200 cycles at temperature ranging from -40°C to 125°C. The thermal behavior of the CoP packages was analyzed by 1-D thermal resistance circuit (1-D TRC) with and without spreading angle, 3-D TRC method, and 2-D axisymmetric finite element method. The feasibility of these analyses was evaluated and discussed in detail by comparing those results with experimental measurements. The reliability results indicated that all CoP packages with phosphors in the silicone encapsulant failed after 309 h in the WHTOL test, but all those without phosphors still survived after 1008 h. The failure modes were found to be the debonding of the aluminum wire from the chip or copper pad of the substrate. However, after the aluminum wire was replaced by gold wire, all the packages with and without phosphors passed after 1008 h. For these survival packages in the WHTOL test, their thermal resistances of junction-to-air and junction-to-aluminum substrate increased by about 12 and 9°C/W, respectively. Moreover, it was also found that there is a difference of 38°C/W in the junction-to-air thermal resistances for the packages between under natural and forced convections in the chamber during the WHTOL test. This might yield the different reliability data, unless the flow conditions in the test chamber are specified in this standard test. Furthermore, all the packages with and without phosphors could pass 200 cycles in thermal shock test, with minor changes in the thermal resistances. However, the degradation of luminous flux in the packages with phosphors was found to be greater than those without phosphors by 14% vs. 9%.

Fabrication and thermal analysis of flip-chip light-emitting diodes with different numbers of Au stub bumps

The thermal performance of flip-chip (FC) light-emitting diodes (LEDs) with different numbers of Au stub bumps has been investigated by using thermosonic bonder. The LEDs were mounted on the aluminium nitride (AlN) sub-mounts which have superior thermal conductivity (230 W/mK), and the high power Chip-on-Plate (COP) package was proposed to be used for our measurement. In order to understand the thermal performance of the high power FC-LEDs, the experimental measurement and finite-element model (FRM) numerical simulation have been used. It is found that the thermal performance of our 1 × 1 mm 2 FC-LEDs can only be improved when using at least 6 Au stub bumps as interconnected metals. Moreover, the surface temperature of FC-LEDs is significantly reduced while using 20 Au stub bumps.