Chip-on-glass Research Articles

P‐7.11: A Study on Local Dimming Algorithm Design for MINI LED Backlight Display Quality Improvement

Today HDR (High Dynamic Range) Displays are increasingly developed. The HDR Display with mini‐led backlight and liquid‐crystal panel plays an important role, it has a lot of advantages like high light (more than 1000nits), high contrast ratio (more than 100000:1), bright color and good permeability and so on. But it also has some display defects like halo[3] phenomenon in a dark scene. In this paper, first, we discuss some common picture quality issues caused by the normal local dimming algorithm[2] and then present a novel algorithm base on BOE COG (chip on glass) mini‐led backlight HDR display. The BOE COG technology is a global unique glass substrate backlight solution, and has some features to help the algorithm improve its performance. And for the local dimming display issues, the algorithm itself has room for optimizing visual effects. Finally, around the key point of local dimming algorithm, we show several advantages of BOE glass substrate backlight solution, its distinctive features can help the algorithm improve picture quality.

P‐6.3: Analysis and Research of Pad Corrosion of COG LCD

As for the TFT‐LCD (Thin Film Transistor Liquid Crystal Display),pads corrosion of COG (Chip on Glass) are incident to happen in product line. And if the Q‐time (queue time) is over‐time between cleaning and bonding process, the pad area of single panel which kept in air may have pad corrosion problems. On the analysis of pads corrosion, we found that the corrosion layers are mainly ITO and Copper of source /gate, which are associated with the pad surface's residual water and particle. In addition, we also found that cleaning water and the detergent have a great relevance with the corrosion by simulation experiments, and the corrosion can be accelerated by ions in water stains. Meanwhile, we put forward some countermeasures to solve this problem.

Conductive Particle Detection for Chip on Glass Using Convolutional Neural Network

The detection of conductive particle images is an important part of the chip on glass (COG) process and can be used to ensure the performance of electrical connections. The segmentation of conductive particles is essential but a difficult task, since the scale and edge of the conductive particles on the chip and the imaging effect are different. In recent years, methods based on deep learning have become the representative method of image segmentation. However, the currently existing methods cannot fully consider the characteristics of conductive particles and have high model complexity. In this article, a multi-frequency feature learning-based convolutional neural network (CNN) is proposed. The entire network structure consists of a basic U-Net module and multi-frequency module (MFM), which are used to enhance multi-frequency feature fusion of conductive particles and accelerate network training. At the same time, for the feature of particle shape, an active contour without edge (ACWE) loss function is designed to extract the fine contour feature of particles. Experimental results on three datasets show the superiority of the proposed method over the major existing mainstream methods with respect to the three performance indicators: recall, precision, and Intersection-over-Union (IoU).

Next-Generation Self-Assembled Anisotropic Conductive Adhesive Developed Using Solder Powder for Electrical Micro-Bonding in the Emerging IT Industry

The importance of the IT industry is becoming more and more prominent as it gradually changes to a non-face-to-face society after the COVID-19, and the next-generation smart devices of 5G mobile communication, micro LEDs, and wearable devices are emerging as the leading of the IT industry. Along with the development of these devices, limitations and problems of the Anisotropic Conductive Adhesive Film (ACF) used as a connection material for Film on Film (FOF), Chip on Glass (COG), Chip on Film (COF), and Film on Glass (FOG) are emerging. [1-5]

P‐118: Optimization of Folding Process for Flexible Electronic Device

Recently, the folding process has attracted considerable attention for bezel‐less construction in flexible display field. From chip on glass (COG) to chip on plastic (COP), the bezel has been greatly reduced yet needing a more optimized technology to keep a high yield rate. In this study, a folding‐trajectory optimization of the minimum radius of flexible substrate electronics device could be defined by using simulation even if the final folding area is exactly the same. Two different concepts of folding trajectory model and five different folding radius functions of time were simulated in this study for the selection of the best folding trajectory.

A Study on the Magnetic Dispersion of the Conductive Particles of Anchoring-Polymer-Layer Anisotropic Conductive Films and Its Fine-Pitch Interconnection Properties

As the display resolution has been rapidly increased, the pitch between two electrodes has been continuously decreased to less than $20~\mu \text{m}$ pitch. Therefore, fine-pitch interconnection technology has become very important in display technology. In our previous research results, anchoring polymer layer (APL) structure was successfully introduced into anisotropic conductive film (ACF) system to form fine pitch interconnection by suppressing the conductive particles movement during the ACF assembly. In general, the agglomerated conductive particles between two electrodes can cause short-circuit problems at ACF assembly. In this paper, the magnetic field was applied to the Ni-coated polymer conductive particles in the polyvinyl fluoride (PVDF) APL structure to disperse the conductive particles uniformly in the xy plane. Then the effects of the magnetic fields on the dispersion of the Ni-coated conductive particles in the PVDF APL structure and the characterization of fine-pitch chip-on-glass (COG) assembly using PVDF APL ACFs with magnetically dispersed conductive particles were investigated. By optimizing the magnetic fields on the PVDF APL structure, 80% dispersed particle rate was successfully obtained. After the ACF bonding process, the conductive particles capture rates and contact resistance properties of magnetically dispersed PVDF APL ACFs, and the PVDF APL ACFs with no magnetic field applied were investigated at 20- $\mu \text{m}$ -pitch COG applications. Both PVDF APL ACFs showed a similar capture rate of conductive particles and electrical insulation property at $20~\mu \text{m}$ pitch. The PVDF APL ACFs with no magnetic field applied showed 100% of insulation property at $20~\mu \text{m}$ , but short circuits at less than pitch. However, for less than 20- $\mu \text{m}$ pitch, only the PVDF APL ACFs with magnetically dispersed conductive particles showed 100% insulation circuit rate down to the 11- $\mu \text{m}$ pitch because the conductive particles were not agglomerated but existed as single particles, resulting in no electrical short between fine-pitch adjacent bumps. As a result, magnetically dispersed PVDF APL ACFs can be used as new ACF materials for ultrafine-pitch interconnection applications without any electrical short.

P‐66: Low Coefficient of Thermal Expansion (CTE) Display Glass Minimizes Chip on Glass (COG) Light Leakage (LL) from Chip Warp

Based on application of heated bi‐metal strip bending theory to measured chip warp on 0.5 mm thick bare Corning® EAGLEXG® Glass and Corning Lotus™ NXT Glass, low substrate CTE minimizes chip warp. Different substrates have different effective process temperatures. Chip warp is relatively insensitive to substrate Young’s modulus vs. substrate CTE.

Effects of the Nylon Anchoring Polymer Layer on the Conductive Particle Movements of Anisotropic Conductive Films for Ultrafine Pitch Chip-on-Glass Applications

Electronic packaging technology has become very important in electronic devices, because electrical interconnection problems such as high contact resistance and short-circuit failure have become serious issues in ultrafine pitch interconnection. In this paper, a nylon anchoring polymer layer (APL) structure has been introduced into the anisotropic conductive films (ACFs) system. Then, the effects of nylon APL properties on conductive particle movement of ACFs and its interconnection stability for ultrafine pitch chip-on-glass (COG) applications were investigated. The APL structure can significantly suppress the particles' movement for ultrafine pitch COG applications, and prevent the short-circuit problem between neighboring electrodes. After ACFs bonding process, the conductive particles capture rate of the conventional ACFs was 33%; however, that of the nylon APL ACFs showed 90%. In addition, the nylon APL ACFs showed excellent electrical interconnection properties such as stable contact resistances without any open or short-circuit failures. As a result, the nylon APL ACFs can be used as new interconnection materials for ultrafine pitch interconnection applications.

82‐4: Effects of the Anchoring Polymer Layer (APL) Materials on Conductive Particle Movements for Ultra‐Fine Pitch Chip‐on‐Glass (COG) Interconnection

In this study, APL has been introduced into the ACFs system. Then, the effects of APL ACFs properties on the conductive particle movement and interconnection stability of ultra‐fine pitch COG applications were investigated. The APL structure can not only significantly suppress the conductive particles movement for ultra‐fine pitch COG applications but also prevent electrical short circuit formation between electrodes. After ACFs bonding process, the percentage of captured conductive particles of the conventional ACFs was 33%, however, that of PAN APL ACFs showed 95%. In addition, the APL ACFs showed excellent electrical properties such as stable contact resistance without any open or short circuits.

Resistance Analysis and Fatigue Life of COG Assemblies Under Thermal Cycle Aging

This paper reports the resistance change and fatigue behavior of chip-on-glass (COG) modules undergoing various aging time of cyclic temperature, electric current, and stress by shear fatigue tests. It is noted that as the COG assemblies are exposed in the environment of cyclic temperature, the relative resistance of COG assemblies decreases initially and then increases with the thermal cycling aging time. Moreover, the fatigue life of COG assemblies decreases with an increase of thermal cycling aging time during the shear fatigue tests. The change of relative resistance shows different trends under the different aging time. The relative resistance of COG assemblies having not more than 96 h thermal cycling aging time increases sharply in the initial stage, and then remains at a stable value, and toward the final stage of aging, the relative resistance has a radical change that rises first and then drops. However, when the aging time is not less than 192 h, the relative resistance increases rapidly with increasing fatigue cycles. In contrast, the relative resistance of COG assemblies without aging treatment increases dramatically in the initial stage and is then kept stable, and ultimately surges rapidly. Finally, Miner’s damage rules were applied to analyze the damage resulting from the temperature cycling tests, and to obtain empirical correlation between the damage factor and thermal cycling aging time.

P‐48: An Oxide‐Semiconductor (OS) FET‐based Low‐Power Level Shifter Combined with OS LSI Technology‐based Display‐Controller COG for a Low‐Power OS Display System

The reduction of the power consumption of an oxide‐semiconductor (OS) display through the use of a high‐voltage OS FET‐based low‐power level shifter together with a low‐voltage display‐controller chip‐on‐glass (COG) based on OS LSI technology is proposed. The level shifter achieves a 26% reduction in power consumption with a small area.

The coupled effects of salt-spray corrosion, electrical current and mechanical load on the electrical and fatigue properties of COG assembly

It is well-known that chip-on-glass (COG) assembly working in the coastal areas is often subjected to the coupled effects of salt-spray corrosion, electrical current and cyclic mechanical loading in service. Therefore, the fatigue life and electrical property of COG assembly undergoing the coupled loads of salt-spray corrosion, electrical current and cyclic mechanical loading have been studied in the present work. It is found that the relative resistance of COG assembly increases with the increase of salt-spray corrosion time. Moreover, the salt-spray corrosion time has a great influence on the resistance variation during the fatigue process. Simultaneously, the fatigue life of the COG assembly decreases with the increasing corrosion time. Finally, Miner's linear damage rules could be used to define the damage of COG assembly caused by the salt-spray corrosion.

A timing controller embedded driver IC with 3.24‐Gbps eDP interface for chip‐on‐glass TFT‐LCD applications

This paper presents a timing controller embedded driver (TED) IC with 3.24‐Gbps embedded display port (eDP), which is implemented using a 45‐nm high‐voltage CMOS process for the chip‐on‐glass (COG) TFT‐LCD applications. The proposed TED‐IC employs the input offset calibration scheme, the zero‐adjustable equalizer, and the phase locked loop‐based bang‐bang clock and data recovery to enhance the maximum data rate. Also, the proposed TED‐IC provides efficient power management by supporting advanced link power management feature of eDP standard v1.4. Additionally, the smart charge sharing is proposed to reduce the dynamic power consumption of output buffers. Measured result demonstrates the maximum data rate of 3.24 Gbps from a 1.1 V supply voltage with a 7.9‐inch QXGA 60‐Hz COG‐LCD prototype panel and 44% power saving from the display system.

12-1: A Timing Controller Embedded Driver-IC with 3.24-Gbps eDP Interface for Chip-On-Glass TFT-LCD Applications

This paper presents a timing controller (TCON) embedded driver (TED) IC with 3.24-Gbps embedded display port (eDP) which is implemented using a 45nm high voltage CMOS process for the chip-on-glass (COG) TFT-LCD applications. The proposed TED-IC employs the input offset calibration scheme, the zero-adjustable equalizer and the PLL based bang-bang CDR to enhance the maximum data rate. Also the smart charge sharing (SCS) is proposed to reduce the dynamic power consumption of output buffers. Measured result demonstrates the maximum data rate of 3.24Gbps from a 1.1V supply voltage with a 7.9-inch QXGA 60-Hz COG-LCD prototype panel and 44% power saving from the display system.

Optimization and reliability evaluation of COG bonding process

In order to assemble a driver IC onto a LCD glass panel, Chip on glass (COG) bonding technology using Anisotropic conductive film (ACF) has been widely implemented. The key process parameters in the technology are the temperature, pressure and time during the thermo-compression bonding. These factors mainly affect the quality of the assembled ACF joint being represented by the contact resistance and adhesion strength. This study purposes to obtain the optimal process conditions for high reliability of the ACF joint. In order to determine the optimal condition, the experiments based on the response surface methodology were designed. Based on the experiments and statistical analysis, the empirical model of second-order polynomials approximating the relationships between the process conditions and the response variables of contact resistance and adhesion strength were obtained. The optimal process condition to lead lower contact resistance and higher adhesion strength of the ACF joint was also calculated from the relationships. The optimization was verified through the bonding experiments conducted under the derived optimal process condition. In addition, the reliability of the ACF joints according to the variation of the process conditions was evaluated in high temperature and humidity environment (85°C/85%RH). Consequently, it was shown that the reliability of ACF joints assembled under the optimal process conditions was superior to others after the 85°C/85%RH tests.

Study on fatigue life and electrical property of COG assembly under thermal–electric–mechanical coupled loads

It is well-known that chip-on-glass (COG) assembly is often subjected to the coupled effects of temperature, electrical current and cyclic mechanical loading in service. Therefore, the fatigue life and electrical property of COG assembly undergoing thermal–electric–mechanical coupled loads have been studied in the present work. Based on the present investigations, it was found that that the relative resistance of COG assembly in the fatigue process displayed different trends according to environmental temperature and mechanical loading amplitude. Moreover, the fatigue life of the COG assembly decreased with the increased temperature and the increased loading amplitude. Finally, the Basquin's equation can predict the fatigue life of COG assembly at different environmental temperatures well.

Fatigue life and resistance analysis of COG assemblies under hygrothermal aging

The present work deals with studying fatigue life and electrical properties of chip-on-glass (COG) assemblies undergoing the coupling loads of temperature, electrical current and hygrothermal stress by shear fatigue tests. Firstly, as the COG assemblies are exposed in hygrothermal environment, an increased hygrothermal aging time leads to an increased relative resistance of COG assemblies. Secondly, during the fatigue experiments, the fatigue life of COG assemblies decreases with an increase of hygrothermal aging time. The change of relative resistance displays different trends under different aging degrees. When the hygrothermal aging time is less than 96h, the relative resistance increases rapidly in the initial stage, then the rate of rise decreases subsequently, and finally the relative resistance falls to a stable value suddenly. By contrast, the relative resistance of COG assemblies having more than 168h hygrothermal aging increases rapidly with increasing fatigue cycles. Owing to the effects of hygrothermal aging and fatigue on the change of assemblies’ resistance, the total of relative resistance increases with increasing hygrothermal aging time. Finally, the hygrothermal aging damage defined as life reduction after degradation aggravates exponentially with aging time on the basis of the Miner’s linear damage rule. The fatigue life prediction model based on the Miner’s linear damage rule and the Basquin’s equation is proposed and yielded to good prediction for the COG assemblies undergoing hygrothermal aging.

ACF를 이용한 COG 접합 공정에서 도전볼의 음영비와 접촉 저항과의 관계

Chip on glass (COG) bonding using anisotropic conductive film (ACF) is a key technology to assemble a driver IC onto a LCD glass panel. In this paper, an experimental investigation was conducted to investigate the correlation between contact resistance and characteristics of image taken by machine vision based inspection system. The results show that the contact resistance was strongly influenced by the contrast ratio of conductive particle rather than the number of conductive particles. Also, number of conductive particles whose contrast ratio is below 0.75 is crucial for determining the quality of the assembled samples. On the other hand, in the result of high temperature high humidity storage test, the contrast ratio of samples was increased. However, in the case of open-circuit samples after temperature humidity storage test, the number of conductive particles whose contrast ratio is above 0.75 was more than that of the closed-circuit samples.

P‐175L: Late‐News Poster: A 2.0Gbps Intra‐Panel Interface with Automatic Calibration for Chip‐On‐Glass Super‐High‐Definition TFT‐LCD Applications

AbstractThis paper describes an interface capable of high data rate transmission for Chip‐On‐Glass (COG) TFT‐LCD applications. To compensate for severe channel loss and reflection, automatic calibration of both equalization and internal timing is employed. The proposed interface has been verified on a 15‐inch 3Kx2K COG TFT‐LCD panel with a data rate of 2.0Gbps.

The coupling effects of temperature, electric current and stress on the adhesion and electrical properties of COG assembly

This paper reports the adhesion and electrical properties of chip-on-glass (COG) assembly undergoing the coupling loads of temperature, electric current and stress (hygrothermal stress or thermal stress). Firstly, the effects of loading rate and coupling loads on the adhesive force of COG assembly were studied by shear test. The maximum shear force of COG assembly firstly increases and then decreases with increasing loading rate in range of 10–70μm/s, peaks at the loading rate of 50μm/s. When the COG assembly was exposed in the coupling loads of temperature, electric current and hygrothermal stress, its maximum shear force decreases with the increase of hygrothermal aging time. However, as for thermal cycling aging time increases, the maximum shear force increases initially and then decreases for the COG assembly under the coupling loads of temperature, electric current and thermal stress. The functions of the maximum shear force with aging time were obtained by fitting experiment data. Secondly, the real-time resistances of COG assembly during shear test and aging process were detected using two-point probe. In shear process, the real-time resistance increases insignificantly in elastic deformation stage but increases rapidly in viscoelastic deformation stage prior to the fracture. Due to the combined influences of temperature, electric current and stress, the resistance increases remarkably with the increase of hygrothermal aging time and it increases slightly with the increase of thermal cycling aging time. However, the real-time resistance exhibits circulation changes corresponding to thermal cycling. Finally, the relationship of resistance with the maximum shear force of energized COG assembly versus environmental aging times was studied.