Chemical Mechanical Planarization Research Articles

Post Tungsten CMP Cleaning: Optimization for Cleaning Efficiency and Corrosion Reduction

Abstract Tungsten chemical-mechanical planarization (W CMP) is among the first applications of the CMP process implemented in high volume semiconductor manufacturing. Alkaline chemicals such as diluted NH4OH have been the predominant choice of post W CMP clean due to charge repulsion between W and dielectric/abrasive surface in high pH. However, W dissolution occurs spontaneously above pH ~4.0. Consequently, W corrosion can happen during post-CMP cleaning. From that perspective, acidic chemistry (e.g., pH< 4.0) seems a more benign choice to protect W, although at such low pH, isoelectric potential curves suggest coulombic attraction between W and oxide/silica surfaces, making it unfavorable for particle removal. The above pH dilemma for post-CMP cleaning and W protection can be managed by adding corrosion inhibitor to an alkaline chemical. Results from blanket and patterned wafers suggest reduction in surface defects and W dissolution can be accomplished simultaneously by an alkaline clean chemical with corrosion inhibitor (pH ~ 9.78), which shows high cleaning efficiency and reduced W loss than citric acid-based chemical (pH ~ 2.66), DIW, and diluted NH4OH. In addition, we show that DIW alone can induce severe W dissolution in features of fine geometry. Possible counter measures against such DIW-induced W corrosion are discussed.

Mechanisms of Chemically Promoted Material Removal Examined for Molybdenum and Copper CMP in Weakly Alkaline Citrate-Based Slurries

Chemical mechanical planarization (CMP) of metal components is an essential step in the fabrication of integrated circuits. Metal CMP is a complex process where strategically activated (electro)chemical reactions serve to structurally weaken the surface layers of the material being processed, and the resulting overburdens are removed under low-force abrasion. Understanding the tribo-electrochemical mechanisms of this process is crucial to successfully designing the consumable materials for advanced CMP slurries that are needed for the new technology nodes. Using a model CMP system involving copper (wiring material in interconnect structures) and molybdenum (a new diffusion barrier material for copper), the present work illustrates a tribo-electroanalytical scheme for studying various mechanistic details of metal CMP. Electroanalytical probes are employed both in the absence and in the presence of surface polishing to quantify the interplay between mechanical abrasion and chemical surface modification. Weakly alkaline slurry formulations are tested with variable concentrations of silica abrasives and a complexing agent, citric acid. The results serve to examine the link between material removal and tribo-corrosion and to identify the functions of the active slurry additives in governing the rates and selectivity of material removal for CMP.

Investigation of the impact of environmental conditions on the mechanical properties of thin-film copper wafers

Thin-film copper offers excellent film texture for multilevel interconnections in integrated circuit fabrication due to its superior resistance to electromigration and high electrical conductivity. To perform a chemical mechanical planarization process during semiconductor fabrication of copper, it is necessary to have a thorough understanding of the nanomechanical properties of thin-film copper. In this study, thin-film copper and reacted passivation layers on silicon substrate wafers are investigated for their nanomechanical properties under various environmental conditions. The results of this study indicate that thin-film copper passivation layers have different properties in deionized (DI) water and polishing slurry environments compared to thin-film copper exposed to ambient air. Interestingly, variations in temperature within wet environments do not significantly affect the properties of thin-film copper wafers; but changes in properties are largely driven by chemical processes. The insights gained from this study emphasize the significance of considering both the passivation layers and wet environments in semiconductor fabrication processes, which contributes to the advancement of copper-based interconnect materials and optimization of the chemical mechanical planarization process in semiconductor manufacturing.

Atomic-level insights into CeO2 performance: Chemical interactions in CMP explored through CeO2-SiO2 studies

This study explores the effects of atomic-level factors on the performance of CeO2 when interacting with SiO2 films. It specifically examines how different precursors, the ratio of Ce to OH, and reaction temperatures influence outcomes. Our findings reveal that smaller particles, around 5 nm in size, created using a Ce4+ precursor, are more effective at removing SiO2 films compared to larger, more crystalline particles from a Ce3+ precursor. This is due to their increased interaction with the SiO2 film during the polishing process, challenging the conventional emphasis on mechanical abrasion in chemical mechanical planarization (CMP) and highlighting the crucial role of chemical interactions. Further analysis through FT-IR and TGA-FTIR techniques showed distinct functional group profiles on the ceria surfaces. Ceria derived from Ce4+ exhibited a higher presence of OH and NO3 groups, enhancing adsorption capabilities, as verified by CHN analysis. Importantly, first-principles calculations identified these surface groups as key to improving adhesion to SiO2 films. Surfaces of amorphous CeO2, rich in -OH and -NO3 groups, showed significantly higher adhesion levels than their crystalline counterparts, connecting crystallinity to chemical functionality. This new insight leads to the possibility of designing next-generation CeO2 abrasives with increased chemical activity.

Azoles as corrosion inhibitors in alkaline medium for ruthenium chemical mechanical planarization applications:Electrochemical and theoretical analysis

The adsorption performance and inhibition mechanism of azoles; Imidazole (IMD), 1, 2, 4-Triazole (TAZ), and 1, 2, 3-Benzotriazole (BTAH) inhibitors on ruthenium (Ru) at 9 pH, were investigated in this study using electrochemical techniques and density functional theory (DFT) simulations. The electrochemical data demonstrate that the three azole compounds being investigated are mixed type corrosion inhibitors with anodic predominance, and the order of corrosion inhibition efficiency for Ru is BTAH > TAZ > IMD. The azole compounds suppress the metal dissolution reaction rate by adhering on to the Ru surface and nature of adsorption (combined physisorption and chemisorption) is explained via Langmuir adsorption isotherm model. The increase in contact angle on the Ru surface verified the successful adsorption of the three organic inhibitors on the Ru surface. Furthermore, the suppression of corrosion reaction kinetics is validated with field emission scanning electron microscopy (FESEM) images. The results of quantum chemistry calculations indicate that the corrosion inhibition effect of BTAH is superior to that of IMD and TAZ. Further, using molecular dynamics modelling, the reliable configuration of the organic inhibitor molecules on the Ru (001) surface in aqueous medium was investigated and the total adsorption energy was computed.

Bridging Technology and Environment: Sustainable Approaches in Semiconductor Chemical Mechanical Planarization (CMP)

As semiconductor technologies continue to advance in areas such as autonomous driving, artificial intelligence, 5G communications, the Internet of Things, and large-scale data processing, the demand for a reliable semiconductor industry is on the rise.(1) This growing demand necessitates the use of advanced device architectures, which heavily rely on two crucial processes: Chemical Mechanical Planarization (CMP) and post-CMP cleaning.(2) This talk will focus on the development of CMP slurries and post-CMP cleaning solutions, emphasizing their vital roles in these processes. We will delve into the comprehensive development of CMP slurries and post-CMP cleaning solutions, highlighting how synthesis methods can significantly affect the surface chemistry of ceria abrasives and impact the removal rates of SiO2 surfaces during STI CMP.(3, 4) Our research also demonstrates how our cleaning solutions can effectively remove even the most 10 nm-sized ceria particles from SiO2 surfaces,(5) thereby enhancing process efficiency. Furthermore, we will discuss the use of aliphatic amino acids as environmentally friendly corrosion inhibitors in CMP slurries, offering a sustainable alternative to the traditionally used benzotriazole (BTA) and addressing key environmental challenges.(6) In the context of the rapidly expanding semiconductor industry, it becomes critical to address global sustainability concerns and environmental health and safety (EHS) objectives. Our research proposes a comprehensive methodology for evaluating the sustainability of CMP consumables in semiconductor manufacturing, with a primary focus on CMP slurries due to their significant market share and shorter usage lifetimes. This research serves as a foundation for future CMP sustainability analyses, encouraging self-correction strategies within the CMP community to reduce environmental impact. We will also introduce a robust framework for the Life Cycle Assessment (LCA) of CMP consumables, marking a crucial step toward achieving these sustainability goals. In summary, this talk will explore the intricate details of CMP and post-CMP processes, their pivotal roles in the advancement of semiconductor manufacturing, and the imperative task of aligning these processes with environmental and sustainability objectives.This talk is dedicated to the special session in honor of Prof. Babu. S. Babu, Advances in Chemical Mechanical Planarization (CMP), Woodhead Publishing (2021).J. Seo, Journal of Materials Research, 36, 235 (2021).J. Seo, J. W. Lee, J. Moon, W. Sigmund and U. Paik, ACS applied materials & interfaces, 6, 7388 (2014).J. Seo, J. H. Kim, M. Lee, J. Moon, D. K. Yi and U. Paik, Journal of colloid and interface science, 483, 177 (2016).J. Seo, A. Gowda and S. Babu, ECS Journal of Solid State Science and Technology, 7, P243 (2018).H. T. T. Tran, J. Gichovi, E. J. Podlaha and J. Seo, in Electrochemical Society Meeting s 243, p. 1809 (2023).

Moore's Law Scaling and Chemical Mechanical Planarization (CMP)

Since the invention of the first integrated circuit in 1958, chemistry and materials have played a critical role in semiconductor process technologies, which has led to an exponential growth of transistors packed into circuits. Decades ago, Gordon Moore posited there would be a doubling of components every two years (revised from his original doubling every one-year prediction). This observation became known as Moore’s law.As Denard scaling took on more complexity, the number of new materials used to build semiconductors increased at a torrid pace. The number of elements in the periodic table, used to fabricate devices, increased roughly five-fold from the 1980’s to the 2000’s.In the earlier years, lithography, etch, thin films, implant, and diffusion were foundational technologies used to fabricate a silicon wafer into hundreds of microchips. In the late 1980’s a new technology Chemical Mechanical Planarization (CMP) was invented. It was developed out of necessity to reduce topography, critical for lithography’s depth of focus requirements. Without this key invention, patterning and building layer upon layer from front end transistors to back-end interconnects would not have been possible.Intel implemented CMP into manufacturing in the early 1990’s on the 0.8 micron technology node which manufactured the 486 microprocessor. CMP was required to planarize dielectric oxide used to insulate the aluminum metal interconnects. Since then, the number of CMP applications over the last three decades has exploded, enabling the scaling of Moore’s Law.CMP is not only used to improve lithography depth of focus. CMP also enables a method of metal interconnect and contact formation called damascene. Planarization is used to create dielectric isolation trenches, discrete plugs for insulation, aid advanced patterning architectures, build through silicon vias (TSVs), and enable complex wafer and chip bonding for die-to-die interconnects for disaggregated products.Transistor scaling alone is no longer sufficient to meet device performance, power, and cost requirements. Complex material and architectural changes are required. And novel CMP applications continue to be added at each new technology node. This author will make an argument that CMP is critical to push scaling and enable future process nodes. Figure 1

Decoding CMP Challenges: A Metrospection Insight

We live in a digitally connected world with Global data to exceed 180 ZB by 2025 per some estimates1. Memory is the fiber connecting our world. New applications drive continued demand growth for memory and storage applications. Micron is a leader in the memory and storage industry, helping the world use information to enrich lives. As memory devices scale and new memory technologies arise, the requirements for Chemical Mechanical Planarization (CMP) processes are becoming tighter and more stringent node over node. Furthermore, memory scaling continues to become more dependent upon CMP, with not only a steady increase in the number of CMP steps but that of unique CMP steps as well node over node. In this presentation we focus on CMP challenges from a METROSPECTION (Metrology & Inspection) lens. We explore the critical role of inspection and metrology techniques in optimizing CMP for semiconductor memory fabrication. The ability and need for the integration of cutting-edge inspection techniques and metrology strategies emerges as a pivotal element in enhancing CMP cycles of learning and hence the reliability, yield, and overall quality of semiconductor memory devices.1 - Statista

(Invited) Chemical Mechanical Planarization Integrated Data Collaboration: Uncover Hidden Interactions for Predictive Maintenance and PCN

This article introduces an innovative analytical methodology that employs machine learning to optimize and predict consumable impacts for Chemical Mechanical Planarization (CMP). By harnessing fleet CMP equipment performance and individual equipment characteristics, our proposed approach aims to elevate wafer-level quality, maximize equipment utilization rates, and minimize unnecessary downtime. CMP, a multifaceted process, its performance is often influenced by strong interactions from its critical components including slurry, pad, machine recipe, and dresser usage. This requires control beyond hardware advancements, especially when equipment is pushed to its limits. Therefore, the demand for higher precision on-wafer performance mandates a data collaboration with sophisticated analytical strategy. In addition, a digitalized product change notification (PCN) concept is also introduced to demonstrate effectiveness of applying integrated data analytics collaboratively across semiconductor chain to accelerate material manufacturing process changes, minimizing impacts on wafer results and shortening the learning cycle and ramp time to full production.Our study leverages data analytics to explore differences between equipment within the same fleet of similar processing. Engineers can deploy a process based on the historical performance of specific equipment, supported by a model trained on data from the same fleet. Furthermore, our approach enables each equipment to predict its own fingerprinted consumable maintenance, accurately forecasting the maintenance time for consumable changes. This concept is equally applicable for consumable PCN migrations.The first use case is to demonstrate the use of integrated data for fleet matching of CMP equipment and/or consumable batches running similar processes. This is particularly crucial as the demand for process precision increases and the need to reduce post-CMP result variability in removal rates and wafer-level uniformity intensifies. This approach could add proactive data driven strategy for process engineers who traditionally concentrate on the removal rate, a highly influential factor, with the standard deviation of platen and machine data identified as a key parameter.The second use case employs heatmaps analysis and proposes scatter plots as an intuitive method to comprehend intricate connections between average removal rates and various parameters. Machine learning is particularly advantageous in this context, as no single parameter plays a dominant role. Preliminary observations suggested, for example that dresser and pad characteristics may have compounding impacts to the wafer level performance.In summary, this article provides a roadmap for in-depth CMP data analysis fed into machine learning, aiming to unravel trends and influential factors that can enhance process optimization and shorten the PCN qualification timeline to meet the increasing demands for CMP process precision and efficiency in High Volume Manufacturing (HVM).

Towards Digital Twin Standards in Chemical Mechanical Planarization (CMP) for Advanced Packaging

A digital twin is an integrated multi-physics, multiscale, probabilistic simulation of a system that uses the best available physical models, sensor updates, process history, etc., to mimic and to predict the performance of the system. In the semiconductor industry, there is a need to establish such fundamental, mechanism-based, correlations between process conditions and observed process performance. Such understanding can lead to the creation of industry-wide technical standards, and digital twins (i.e., real time digital replicas of unit processes), that will enable inter-operability, ease process selection and integration, as well as help reduced cost of ownership.In this paper, we revisit our decades old, but still relevant, quest for appropriate mechanism-based metrology to support the digitization of Chemical-Mechanical Polishing (CMP) for the back-end-of line (BEOL), with advanced packaging, specifically hybrid bonding for 3D interconnects, in mind. Here, we consider the digitization of the nanoscale tribological aspects of CMP. For example, many CMP processes use chemically unstable polyurethane pads in a variety of slurry formulations which make the process difficult to understand and to model. We had previously described how the chemical instability of the PU-pads affects the CMP process performance. Here we contextualize the historical performance data, identify data gaps, and propose some next steps towards digital twin CMP modules.

(Dielectric Science and Technology Division Poster Award, 3rd Place) Radical Oxidation for Enhancing Polishing-Rate and Improving Slurry Stability in Ag-Film Chemical–Mechanical-Planarization

Recently, Ag-film has been utilized as a reflective layer in organic-light-emitting- diode on silicion(OLEDoS). The formation of a reflective Ag-film layer was conducted by Ag-film deposition and following Ag-film chemical-mechanical planarization (CMP). The Ag-film has ductility property (i.e., hardness of 0.3 GPa) so that a reletively soft CMP pad should be used to minimize the generation of the CMP induced scratches. However, using a soft CMP pad, it is notably difficult to achieve a high Ag-film polishing-rate (i.e., 300 nm/min). Thus, to enhance Ag-film polishing-rate, a Fenton reaction between ferric ions and H2O2 has been applied. Although, a Fenton reaction enhancing dissolved oxygen concentration can increase remarkably the Ag-film polishing-rate, the CMP slurry using Fenton reaction has produced a detrimental slurry stability after mixing with H2O2 (i.e., extremely low H2O2 pot life time. In this study, as a solution, the Ag-film CMP slurry was designed via radical oxidation on the Ag-film surface during CMP, without using Fenton reaction (i.e., mixing ferric ions with H2O2). The radical oxidation was achived by using halide oxidant (i.e., H5IO6), which radical oxidation degree principally depended on halide oxidant concentration and slurry pH, showing a notable high Ag-film polishing-rate (i.e., 400 nm/min) without the precence of corrosion. Without using Fenton reaction, the secondary diameter of colloidal abrasives in the designed Ag-film CMP slurry was not changed for several months. In our presentation, we will prove the mechanism of the radical oxidation on the polished Ag-film surface. In addition, we will present the dependencies of the chemical dominant polishing properties (i.e., OH radical, chemical oxidation degree of the Ag-film surfcae, chemical composition of chemical oxidation, slurry adsortion degree, and corrosion potential and current) as well as the mechanical dominant polishing properties (i.e., electrostatic force between abrasives and Ag-film surface) on the halid oxidant concentration.

Developing CMP for Future of Memory

Micron is an industry leader in innovative memory and storage solutions, transforming how the world uses information to enrich life for all. Every day, innovations driven by our team fuel the data economy, enabling advances in 5G applications and artificial intelligence applications. At the core of these innovations are development of the process and equipment technologies faster yet at lower manufacturing costs. Over the past four decades, since its inception, Chemical Mechanical Planarization (CMP) has evolved from lab to fab in most significant ways. In this presentation, we focus on four aspects of CMP, namely, technology, applications, consumables, and cost to enable the memory roadmap for today and tomorrow. Wafer-to-wafer bonding, a revolutionary technology for memory roadmap, will also be discussed to lay out challenges ahead for CMP.

Investigating Slurry Flow Patterns in Chemical Mechanical Polishing (CMP) Using Computational Fluid Dynamic (CFD) Simulations

Chemical Mechanical Polishing has emerged as a leading area approach for planarizing wafer surfaces during semiconductor manufacturing due to its ability to provide defect-free and uniform surfaces. Achieving nanoscale planarity on a wafer and die is one of the most significant steps in the process [1]. As part of the CMP process, it is essential to understand the interactions between consumables to facilitate the production of smooth and mirror-like surfaces [2], [3]. Simulation and numerical modeling have become critical means for elucidating intricate flow patterns to probe the underlying fundamentals of CMP processes. The computational fluid dynamics (CFD) simulations provide a detailed understanding of fluid flow behavior for various conditions [4], [5]. This study uses a three-dimensional CFD simulation to provide an understanding of the slurry flow pattern and its effects on CMP performance. Several CFD simulations were performed to study the effect of different parameters on slurry flow patterns. The simulations provided information on the interaction between the slurry, the wafer surface, and the polishing pad, in addition to the abrasive distribution, slurry velocity, and pressure variations within the CMP tool. It was observed that changing the pad and wafer rotation speeds, the wafer-pad gap size and the center-to-center distance affect the slurry flow conditions. For the same rotational speeds, as the center-to-center distance decreases, the flow velocity increases toward the wafer edge. Moreover, with the same rotation speed, the pad rotation dominates the wafer rotation speed.[1] B. Suryadevara, Advances in Chemical Mechanical Planarization (CMP). Woodhead Publishing, 2021.[2] J. Seo, Journal of Materials Research, 36, 235–257, 2021.[3] A. R. Mazaheri and G. Ahmadi, J Electrochem Soc, 150, G233, 2003.[4] J. Tu, K. Inthavong, and G. Ahmadi, Springer Science & Business Media, 2012.[5] G. Ahmadi, “Chapter 2 -, R. Kohli and K. L. Mittal, Eds., Oxford: William Andrew Publishing, 2012, pp. 81–105.

(Dielectric Science and Technology Division Poster Award, 1st Place) The Influence of Pad Micro-Features on Chemical Mechanical Polishing (CMP) Performance: Insights from Computational Fluid Dynamics (CFD)

With semiconductor chip dimensions shrinking below 7 nanometers, Chemical Mechanical Planarization (CMP) becomes more critical [1], [2]. To meet the increasing demand for precision and uniformity in the fabrication of wafers and chips, enhancements in CMP consumables and operating conditions are necessary. To address these requirements, novel pad designs have been developed, particularly those that do not require conditioning [3]. It is known that the CMP polishing rate depends on pressure, pad wafer relative velocity, and the distribution of pad asperities [4]. As conventional pads provide small and random contact areas, the external pressure applied by the head determines the material removal rate (MRR) [5] Advanced pads with micro-features provide more contact areas and help deliver consistent pressure and slurry distribution during Chemical Mechanical Polishing (CMP) [6], [7]. This study uses computational fluid dynamics (CFD) to simulate the flow between pad and wafer surfaces to determine how pad surface micro-features affect the CMP process. The abrasive residence time, total fluid pressure, and slurry flow velocity are evaluated for four distinct pad micro-feature geometries: square, square-circle, circle, and ellipse. Increasing the number of edges in the pad micro-feature patterns increases pressure drop, leading to more interaction between pad and slurry and enhancement of MRR. The findings of this study confirm the effectiveness of micro-featured pads in optimizing CMP processes and provide valuable insights into the influence of microfeature geometries on critical parameters for improving the semiconductor fabrication process.[1] J. Seo, Journal of Materials Research, 36, 235–257, Jan, 2021.[2] B. Suryadevara, Advances in Chemical Mechanical Planarization (CMP). Woodhead Publishing, 2021.[3] S. Lee and E. Hwang, “Smart pad fabrication for CMP,” LMA Res Rep, vol. 10, pp. 100–104, 2002.[4] G. Ahmadi and X. Xia, J Electrochem Soc, 148, G99, 2001.[5] X. Xia and G. Ahmadi, Particulate Science and Technology, 20, 187–196, 2002.[6] S. Lee, G. Kim, M. Mcgahay, H. Kim, and H. Cho, “Pad Designs-To navigate the fundamentals of CMP.”[7] M. Mcgahay, G. Kim, S. Lee, H. Cho, and H. Kim, “Critical Feature Size of Polishing Pad and Its Performance.”

Amine-Based Chemistries for the Megasonic Removal of Alumina Nanoparticles from Oxidized Silicon Carbide

Increasing demand for improved Integrated Circuit (IC) technology has propelled the advancement from silicon as a semiconductor material to Wide Band Gap (WBG) materials (i.e., Silicon carbide (SiC), Gallium nitride (GaN)) due to their intrinsic properties (i.e., increased thermal stability, wear resistance, etc.). While these traits make WBGs ideal semiconductor materials, the Chemical Mechanical Planarization (CMP) process becomes difficult as these surfaces are more chemically inactive. To overcome this, the CMP process has shifted to incorporate more aggressive chemical and mechanical conditions (i.e., highly oxidative chemistries, increased shear force, etc.) to reach desired material removal rates (MRR). Traditional post-CMP (pCMP) cleaning processes combine high shear forces via a Polyvinyl Alcohol (PVA) brush with oxidative cleaning chemistries to remove CMP residue. This, however, results in secondary defect generation (i.e., scratches, pitting, brush debris) on the substrate surface. A low-shear force, non-contact cleaning process via megasonic energy is one way to combat secondary defect generation. The megasonic energy serves a dual function of reducing the substrate’s surface boundary layer, which allows for enhanced surface interaction with various cleaning solutions while also generating reactive oxygen species (ROS) that activate the chemistry. This work focuses on amine-based cleaning chemistries for oxidized SiC substrates. The introduction of the amine leads to a reduction of the oxidized surface, allowing for a weakened residue-substrate bond for an improved particle removal efficiency (PRE). Initial results have shown that amine-based standard clean 1 (SC-1) produced comparable results to previously utilized cleaning chemistries (i.e., Supramolecular chemistries), with a PRE of 11.4%. The PRE of SC-1 increases significantly in proportion to sonication power, with the highest PREs ranging between 90% to 96%. This work will provide insight into oxidized SiC surface behavior by incorporating other amine-based cleaning chemistries.

(Dielectric Science and Technology Poster Award, 2nd Place) Activation of Amine Chemistries for the Enhanced Particle Removal Efficiency of CeO2 Nanoparticles Via Megasonic Processing Conditions

With the persistent advancement of semiconductor technology, the demand for high-efficiency device manufacturing processes has surged. Chemical Mechanical Planarization (CMP) is a cornerstone for achieving angstrom-scale surface uniformity crucial for integrated circuits (IC) and logic devices. Shallow Trench Isolation (STI) CMP involves the selective removal of bulk oxide to electrically isolate active components on wafer surfaces. The modulation of the Ce3+ to Ce4+ surface state is essential for improved performance in both CMP and post-CMP (p-CMP) applications. Ce3+ is ideal for oxide material polishing due to its strong adherence to oxide surfaces, while Ce4+ is optimal for p-CMP cleaning, given its weak bond to oxide surfaces. Current p-CMP industry-standard methods utilize mechanical approaches, such as polyvinyl alcohol (PVA) brush scrubbing. However, this process induces high levels of shear force (SF), leading to secondary defects on the wafer surface (i.e. scratches, corrosion, increased surface roughness). To address these limitations, non-contact cleaning methods utilizing megasonic energy have emerged, which rely on generating reactive oxygen species (ROS) to induce particle removal. Thus, this study focuses on enhancing ceria particle removal during post-CMP cleaning by employing amine-based chemistries coupled with megasonic energy. While preliminary results imply that the mechanical cavitations induced by megasonic waves improve cleaning efficiency, this method will be optimized via the introduction of amine-based chemistries. Specifically, this work aims to leverage the unique properties of amines coupled with megasonic energy to facilitate enhanced ceria removal through electron donation, inducing a reduction in the oxidation state of ceria from Ce³⁺ to Ce⁴⁺. This approach improves particle removal while limiting secondary defects, enhancing redox activity induced by megasonic waves and chemical interactions. The mechanisms behind this method will be validated with CeO2 oxidation state kinetics, interfacial frictional changes, wafer surface roughness analysis, and SEM validation of particle removal efficiency.

(Invited) Design of Reduced Shear Force Cu Cleaning Processes Via α-β-Unsaturated Chemistries for Enhanced BTA Residue Removal

As integrated circuit and logic devices continue to decrease, limiting induced defectivity during Chemical Mechanical Planarization (CMP) processes (polishing and substrate cleaning) is imperative. Defects resulting from the CMP process can be classified as mechanical (i.e., scratching), chemical (i.e., corrosion), or physiochemical (i.e., adsorbed contaminants) according to the mechanism of formation. Traditionally, a contact cleaning method implements a polyvinyl alcohol (PVA) brush to transfer cleaning chemistry to the substrate of interest and provides the necessary mechanical energy for defect removal. While this process effectively removes contaminants, its reliance on shear forces can induce secondary defect modes, such as scratching. One major challenge for the post-CMP cleaning of Cu substrates is the polymeric residue film comprised of BTA-Cu+ complexes that propagate during the CMP polishing process. The current and most effective mode to mitigate this “residue defect” is coupling brush-induced shear force with additives that promote interfacial redox reactions to remove residues through an undercutting mechanism. This work focuses on developing a “softer” and additive structure-based approach that drives less aggressive interfacial shear between the brush and wafer substrate. More specifically, α-β-unsaturated additives with diverse functionality (i.e., -unsaturated carboxylic acids, carboxylic acids, and unsaturated benzaldehydes) will be tested to evaluate their efficacy to “overcut” the organic residue via a proposed aza-Michael addition reaction pathway. This “overcutting” mechanism relies on additional modes of interaction (i.e., p-stacking, H-bonding, conformational relationships, etc.) with the BTA- Cu+ polymeric residue film. A suite of dynamic techniques (i.e., Tafel analysis, OCP vs. time, contact angle, additive diffusion analysis, and shear force) will attempt to correlate the additive structure and reaction mechanism to organic residue removal efficiency and measured interfacial shear forces. Initial results have shown that implementing an “overcutting” mechanism will decrease the overall shear force and significantly reduce the generation of secondary defects without sacrificing overall defect removal efficiency.

Evolving Preston’s Equation in Chemical Mechanical Planarization

The evolution of semiconductor devices necessitates greater control parameters for enhancing CMP process controllability. Historically, CMP engineers have sought to improve polishing process performance by real-time control of time, pressure, and velocity using Preston’s equation. However, Preston’s equation has traditionally addressed blanket-wafer or non-patterned wafer’s vertical or horizontal scale controllability, such as wafer center to edge or the in-wafer non-uniformity expressed by percentage. However, limited control variables cannot determine patterning profile changes.Upon closer examination of the basic Preston’s equation, other factors were considered constant or environmental parameters, excluding pressure and velocity. Current and future scaled-down devices demand additional control parameters to achieve nanometer-scale vertical controllability with patterned wafers. This presentation introduces an extended Preston’s equation by incorporating more control parameters, including temperature and slurry concentration. The study reveals that lowering and controlling the polishing temperature induces slurry selectivity changes by modulating the activation energy between the slurry and wafer. This temperature control also drives pad material changes that impact selectivity. Furthermore, the study evaluates in-situ slurry composition control to assess its real-time impact on wafer performance. When all five active parameters are combined into the extended Preston’s equation, it is demonstrated that real-time nanometer vertical scaling is achievable. The results of this study provide insights into the future design direction of CMP equipment, which will be communicated in this talk along with the concept of future CMP equipment.

(Invited) Metal Corrosion Mitigation in Fine Geometries during Chemical Mechanical Planarization

In the Si semiconductor industry, aggressive device geometry scaling has given rise to new processing challenges to each new technology nodes over the past 6 decades. When the feature size shrinks to nanometer regime, new phenomenon emerges whereby significant loss in metal vias and lines can be observed after CMP.Findings from our previous studies suggest just a few nanometers of metal loss imposes serious yield loss in sub-5nm technology nodes MOL and BEOL metallization. Post CMP clean process can be responsible for ~ 50% of the metal loss after CMP. The phenomenon was observed with W, Co, and Cu alike. It affects conductors as well as liner/barrier metals, and exhibits strong dependence on pattern density, feature size, and even underlying layer. [1, 2]. Properly formulated slurries and post CMP clean chemicals can modulate the amount of metal loss and partially alleviate the issue.In this study, we continue to assess how post CMP clean chemicals and modified de-ionized water can influence the amount of metal loss for Cu interconnects. As a starter, blanket wafers resembling several different Cu/liner/low-k stacks were evaluated. The were subjected to polish with the same alkaline slurry followed by various alkaline post clean chemicals (Clean 1, pH ~ 10.2; Clean 2, pH 9.8). It was observed on the attached figure that brush clean only process with DIW alone can induce small amount of Cu loss. For wafers with polish and post clean, on a comparison basis, Clean1 resulted in slightly more Cu loss than Clean2. However, when dilute NH4OH solution (pH ~ 9.6) was introduced to replace DIW during brush clean with Clean1, the amount of Cu loss is reduced, on par with that of Clean2. The observation suggests NH4OH-treated DIW can help alleviate part of Cu loss during post CMP clean process. Patterned wafers with various combination of liner stacks will be subjected to clean process with various combinations of chemistries and/or NH4OH-treated DIW. The amount of Cu or liner loss will be characterized.

MFRL-BI: Design of a model-free reinforcement learning process control scheme by using Bayesian inference

Design of the process control scheme is critical for quality assurance to reduce variations in manufacturing systems. Taking semiconductor manufacturing as an example, extensive literature focuses on control optimization based on certain process models (usually linear models), which are obtained by experiments before a manufacturing process starts. However, in real applications, pre-defined models may not be accurate, especially for a complex manufacturing system. To tackle model inaccuracy, we propose a Model-Free Reinforcement Learning (MFRL) approach to conduct experiments and optimize control simultaneously according to real-time data. Specifically, we design a novel MFRL control scheme by updating the distribution of disturbances using Bayesian inference to reduce their large variations during manufacturing processes. As a result, the proposed MFRL controller is demonstrated to perform well in a nonlinear chemical mechanical planarization process when the process model is unknown. Theoretical properties are guaranteed when disturbances are additive. The numerical studies also demonstrate the efficiency of our methodology.