Channel Charging Research Articles

The Impact of Width Downscaling on the High-Frequency Characteristics of InGaAs Nanowire FETs

This work demonstrates the high-frequency characteristics of In0.53Ga0.47As nanowire with scaled wire width by implementing TCAD simulations. The physical models and correlated parameters have been calibrated to the experiments in the literature 19. As the width of the nanowire is scaled to 10 nm, the electron density peaks are no longer located close to the oxide/semiconductor interface. Instead, the peaks merge and volume inversion effects appear due to the strong quantum confinement. The volume inversion effects lead to higher cut-off frequency due to the reduced total transport delay time. To have a better understanding of this phenomena, the high-frequency properties of nanowire were quantified with the assistance of small-signal analysis and delay time analysis using TCAD. It is found that the channel charging delay increases with narrower wire width due to the raise of source/drain resistance. Regarding the extrinsic and intrinsic delay, they increase with smaller wire width and drop at width of 10 nm due to the volume inversion effects. Electron distribution which aims to clarify the abovementioned observation is also plotted.

Batteries State of Health Estimation via Efficient Neural Networks With Multiple Channel Charging Profiles

The prognostics and health management (PHM) plays the main role to handle the risk of failure before its occurrence. Next, it has a broad spectrum of applications including utility networks, energy storage systems (ESS), etc. However, an accurate capacity estimation of batteries in ESS is mandatory for their safe operations and decision making policy. ESS comprises of different storage mechanisms such as batteries, capacitors, etc. Consequently, the measurement of different charging profiles (CPs) has a strong relation to battery capacity. These profiles include temperature (T), voltage (V), and current (I) where the CPs patterns vary as the battery ages with cycles. Consequently, estimating a battery capacity, the conventional methods practice single channel charging profile (SCCP) and hop multiple channel CPs (MCCPs) that cause incorrect battery health estimation. To tackle these issues, this article proposes MCCPs based battery management system (BMS) to estimate batteries health/capacity through the deep learning (DL) concept where the patterns in these CPs are changed as the battery ages with time and cycles. Thus, we deeply investigate both machine learning (ML) and DL based methods to provide a concrete comparative analysis of our method. The adaptive boosting (AB) and support vector regression (SVR) are widely compared with long short-term memory (LSTM), multi-layer perceptron (MLP), bi-directional LSTM (BiLSTM), and convolutional neural network (CNN) to attain the appropriate approach for battery capacity and state of health (SOH) estimation. These approaches have a high learning capability of inter-relation between the battery capacity and variation in CPs patterns. To validate and verify the proposed technique, we use NASA battery dataset and experimentally prove that BiLSTM outperforms all the approaches and obtains the smallest error values for MAE, MSE, RMSE, and MAPE using MCCPs compared to SCCP.

Delay-time analysis in radio-frequency β -Ga2O3 field effect transistors

β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) with gate lengths (Lg) of 50–1000 nm were fabricated, employing a thin channel layer formed by a shallow Si-ion implantation doping to maintain a high aspect ratio between an Lg and a gate-to-channel distance. The MOSFETs with Lg = 200 nm had a maximum drain current density of about 250 mA/mm and a peak extrinsic transconductance of 17 mS/mm. The short-channel effect was well suppressed for the devices with Lg ≥200 nm, leading to excellent RF device characteristics represented by a record maximum oscillation frequency of 27 GHz at Lg = 200 nm. From simple delay-time analysis on the MOSFETs, the effective electron velocity passing through a region under the gate was estimated to be about 2 × 106 cm/s. Moreover, it was analyzed that the parasitic channel charging delay occupied a substantial proportion of the total delay due to a large sheet resistance of the Ga2O3 channel and thus limited their high-frequency device performance. These results suggest that both suppressing the short channel effect with a reduction in Lg to the sub-0.1-μm range and minimizing the access resistance are important to further improve RF device characteristics of Ga2O3 MOSFETs.

Electrochemistry of Symmetrical Ion Channel: Three-Dimensional Nernst-Planck-Poisson Model

The paper provides a physical description of ionic transport through the rigid symmetrical channel. A three-dimensional mathematical model, in which the ionic transport is treated as the electrodiffusion of ions, is presented. The model bases on the solution of the 3D Nernst-Planck-Poisson system for cylindrical geometry. The total flux includes drift (convection) and diffusion terms. It allows simulating the transport characteristics at the steady-state and time evolution of the system. The numerical solutions of the coupled differential diffusion equation system are obtained by finite element method. Examples are presented in which the flow characteristics at the stationary state and during time evolution are compared. It is shown that the stationary state is achieved after about 2×10 -8 s since the process beginning. Various initial conditions (channel charging and dimensions) are considered as the key parameters controlling the selectivity of the channel. The model allows determining the flow characteristic, calculating the local concentration and potential across the channel. The model can be extended to simulate transport in polymer membranes and nanopores which might be useful in designing biosensors and nanodevices.

Dynamic and Transient Analysis of Silicon-Based Thin-Film Transistors: Channel Propagation Model

The quasi-static approach in the dynamic modeling considers that a thin-film transistor (TFT) reaches the steady-state instantaneously, and how to insert its behavior before steady-state is an important issue. In this paper, dynamic responses of silicon-based TFTs under gate-voltage pulse are studied in details. We experimentally distinguish quasi-static and non-quasi-static cases and we identify two charging regimes of the channel formation: channel propagation and charging of the fully propagated channel. We propose a model for the channel propagation, with a compact model-like approach to take into account the effect of defect states.

Time-dependent quantum transport and nonquasistatic effects in carbon nanotube transistors

Nonquasistatic effects in ac characteristics of carbon nanotube field-effect transistors are examined by solving a full time-dependent, open-boundary Schrödinger equation. The nonquasistatic characteristics, such as the finite channel charging time, and the dependence of small signal transconductance and gate capacitance on the frequency, are explored. The validity of the widely used quasistatic approximation is examined. The results show that the quasistatic approximation overestimates the transconductance and gate capacitance at high frequencies, but gives a more accurate value for the intrinsic cutoff frequency over a wide range of bias conditions.

Study of Impact of Access Resistance on High-Frequency Performance of AlGaN/GaN HEMTs by Measurements at Low Temperatures

This letter studies the effect of access resistance on the high-frequency performance of AlGaN/GaN high-electron-mobility transistors. To systematically reduce the sheet access resistance, the transistors were measured at different temperatures. The increase of mobility at lower temperatures allowed more than four-fold reduction in the sheet access resistances. Both the current- and power-gain cutoff frequencies are observed to increase at low temperatures. Also, the intrinsic effective velocity has been estimated in these devices, as well as the parasitic delays involved in the final performance. Channel charging delay, which was expected to be most sensitive to parasitics, is observed to decrease at low temperatures. However, the drain delay, intrinsic delay, and effective electron velocity remain unaffected by temperature

Plasma channel charging by an intense short pulse laser and ion Coulomb explosion

The combined effects of relativistic self-focusing and the expulsion of electrons by the ponderomotive force of a radially focused laser create an ion channel, depleted of electrons, of radius r0∼c∕ωp, where ωp is the electron plasma frequency. This charging process takes place on plasma period, ωp−1, time scale. The Coulomb explosion of the channel accelerates ions to several hundreds of keV energy in about an ion plasma period, constituting an important ion acceleration mechanism by short pulse intense laser. In the case of a deuterium-tritium plasma, the accelerated ions can produce fusion energy with an efficiency of ∼0.5%.

MOSFET drain/source charge partition under nonquasi-static switching

The channel charge partition of metal-oxide-semiconductor transistors in nonquasi-static switching has been studied. A new approach, with the help of a two-dimensional device simulator is used to separate the direct current and transient current component during device switching. Unlike the commonly accepted 40/60 drain/source channel charge partition ratio, our results show that it is closer to the 0/100 as long as the switch speed is higher than the channel charging time. The result is important for pass-gate type circuits to evaluate the amount of charge transferred to the source and drain nodes.

Modeling of Submicron Si-MOSFET s for Microwave Applications with Unique Extraction of Small-Signal Characteristic Parameters

parameter extraction method (zero-gm method), based on the measured S-parameters, are proposed for microwave applications of submicron (Lg=0.6 m) Si-MOSFET’s. The ambiguity between the channel charging resistance Rgsi and the transconductance delay in conventional models (gm=gmoe j ) are also claried. Without a conventional de-embedding process, which uses additional test patterns with exactly the same geometrical structures as the device under test, extrinsic parameters, including contact pads and interconnection lines of the DUT, are uniquely extracted at zero-gm bias condition (VGS jgm=0= 0.25 V, VDS=0 V) from 45 MHz to 30 GHz. For a simple and accurate smallsignal model for microwave applications, a nonlinear curve tting of an analytical 2-port network parameter equation is employed.

Delay time analysis of AlGaAs/In xGa 1− xAs (0.15≤×≤0.45) pseudomorphic HJFETs with InGaAs channel grown under suppressed In-surface segregation conditions

This study uses delay time analysis to investigate the dependence of current gain cutoff frequency ( f T ) on the In composition of an InGaAs layer grown by MBE under suppressed In surface segregation conditions for an AlGaAs/InGaAs hetero junction field effect transistor (HJFET). The experimental results show that the maximum f T is obtained at an In composition ( X In) of 0.30, in the range from 0.15 to 0.45. Delay time analysis reveals that the tendency of f T is determined mainly by the channel charging delay time ( τ char). To explain the dependence of τ char on In composition, the novel expression for τ char is proposed. From this expression, it is found that the decrease in f T at X In>0.30 is caused mainly by the increase in sheet resistance (1/ q N s μ) of the InGaAs layer. This shows that the improved electron mobility resulting from suppression of In surface segregation is useful in reducing τ char. Furthermore, use of an InGaAs layer thickness above 100 Å at X In≥0.30 can effectively reduce τ char. Delay time analysis also reveals that the saturation velocity is saturated at X In=0.30 and declines at X In>0.35. Consequently optimum In composition and InGaAs thickness are proposed to be 0.30 and 110 Å for an AlGaAs/InGaAs HJFET on a GaAs substrate.

A robust and physical BSIM3 non-quasi-static transient and AC small-signal model for circuit simulation

A new non-quasi-static (NQS) MOSFET model, which is applicable for both large-signal transient and small-signal ac analysis, has been developed. It employs a physical relaxation time approach to take care of the finite channel charging time to reach equilibrium and the effect of instantaneous channel charge re-distribution. The NQS model is formulated independently from the dc I-V and the charge-capacitor model, thus can be easily applied to any existing simulators. The model has been implemented in the newly released BSIM3 version 3, and comparison has been made among this model, common quasi-static (QS) SPICE models and PISCES two-dimensional (2-D) numerical device simulator. While predicting accurate NQS behavior, the time penalty for using the new model is only about 20-30% more than the common QS models. It is much less than the time required by other NQS models reported. Limitations and compromises between simplicity, efficiency and accuracy are also discussed.

Delay time analysis for short gate-length GaAs MESFETs

GaAs MESFETs with gate lengths from 55 to 150 nm have been fabricated and characterized. By using selective etching for the gate recess, the channel thickness as well as the aspect ratio of the devices of each gate length are known accurately. A cutoff frequency as high as 112 GHz was obtained for a 100 nm × 150 μm device. To study the intrinsic characteristics of these devices, the effects of the pad and the substrate parasitics were first measured and corrected for. Two independent methods adopted to perform this correction have been compared with both resulting in the same intrinsic delay times. Delay time analysis was used to determine the transit time of the electrons in the channel, the channel charging delay, and the drain delay, all as functions of gate length. The results show that the high speed performance of devices with ultra-small gate lengths is limited by the pad parasitics and the intrinsic channel charging and drain delay.

Carrier transit delays in nanometer-scale GaAs MESFET's

MESFETs with gate lengths in the range of 40 to 300 nm with GaAs and AlGaAs buffer layers were characterized by high-frequency transit-time measurements. The total carrier transit time is interpreted as being composed of an intrinsic part, a drain delay, and a channel charging delay. The drain field's effect on the geometry of the gate depletion region, and the injection of carriers into the buffer layer are used to describe the origin of these delays and their limiting effect on the high-frequency performance of sub-0.1- mu m gate-length MESFETs. >

Characterization of Ultrahigh-Speed Pseudomorphic InGaAs/AlGaAs Inverted High Electron Mobility Transistors

A detailed characterization of ultrahigh-speed pseudomorphic InGaAs/AlGaAs inverted high electron mobility transistors (pseudomorphic I-HEMT's) is reported. Charge control analysis indicates that the pseudomorphic I-HEMT accomplishes improved transconductance (gm) and reduced short channel effects due to higher concentration and excellent confinement of two-dimensional electron gas (2DEG) in the InGaAs channel. The 0.2 µm gate pseudomorphic I-HEMT's reported here exhibit superior DC and RF performances, i.e., maximum transconductance (gmmax) of 565 mS/mm, cutoff frequency (fT) of 110 GHz and propagation delay times (τpd's) of 6.6 ps/gate at R.T. and 4.9 ps/gate at 120 K. Delay time analysis reveals the reduction of both the electron transit time (τtransit) and the channel charging time (τchannel) in the pseudomorphic I-HEMT, which are significant factors in the ultrahigh-speed performance. Higher electron saturation velocity (υs:2.1×107 cm/s) and improved gm are considered to contribute to the reduction in τtransit and τchannel.

Measurement of multigigahertz waveforms and propagation delays in modulation-doped field-effect transistors using phase-space absorption quenching

High-speed waveforms (up to 20 GHz) in InGaAs/InAlAs modulation-doped field-effect transistors (FETs) are measured using 10–20 ps optical probe pulses via the quenching of the absorption in the quantum well gate channel due to Pauli exclusion. The technique is a noncontact probe of the charge density in the gate, and hence, of the logic state of the FET. This charge-sensitive probing technique is combined with voltage-sensitive electro-optic sampling to study internal dynamics of the FET. A gate channel charging time of 11 ps and a gate to drain propagation delay of 15 ps are measured.

A general four-terminal charging-current model for the insulated-gate field-effect transistor—I

A general form of equivalent circuit model for the IGFET is presented in which a complete representation is given of the charging currents in the device. At the heart of the model is the essential step of “partitioning” the channel charging current between the source and drain terminals. This is carried out in terms of the distinct physical mechanisms associated with the charging of the device via the gate and substrate terminals respectively. The circuit elements of the model are all defined on a quasi-static (charge control) basis by the relationships between the charges stored in the IGFET and the voltages applied to its four terminals.