Cascaded Delayed Signal Cancellation Research Articles

A Novel Multilayer N-LMS Adaptive-Filter-Based Control for Synchronization and Power Quality Improvement in Grid-Tied SPV System

In the power distribution grid, a solar photovoltaic (SPV) system may experience voltage sag, swell, harmonics distortion, unbalance, and DC offset at its point of interconnection (POI). These conditions decline the power quality indices, which are escalated when the SPV system supplies power to unbalanced/ distorted loads. In this context, a multilayer normalized least mean square (N-LMS) adaptive filter-based control is proposed for the grid-tied SPV system, where the sensed grid voltages and load currents are filtered using the proposed method. Then, their dq-axis components are estimated and used to resolve synchronization issues. The estimated components are immune to negative sequence components, distortion, low-order odd harmonics (3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> , 5 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> , 7 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> , 9 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> ), and DC offset. The proposed control scheme has a simple structure with two tuning parameters. Moreover, it has no integrator compared with the generalized-integrator-based algorithm and only has three delay units compared with the methods based on the cascaded delay signal cancellation (CDSC). Hence, it is computationally faster than the advanced CDSC and other multilayer structure-based algorithms. Performance of the proposed method is demonstrated experimentally by implementing it on a laboratory setup of a grid-tied SPV system operating under non-ideal voltages and currents.

Multiple Delayed Signal Cancellation Filter-Based Enhanced Frequency-Locked Loop Under Adverse Grid Conditions

An accurate and prompt estimation of phase angles, frequency, and magnitudes of the grid voltage is extremely important in paving a good platform for a fast and reliable operation of power grid monitoring, protection, and control. The phase-locked loop (PLL) served this purpose for decades, while the concept of the frequency-locked loop (FLL) has been proposed more recently. Even though the FLL and the PLL share some similarities, some differences still exist. Further research on FLLs can boost their capabilities and open up new windows in designing devices for grid synchronization. Multiple delayed signal cancellation (MDSC) filters are a peculiar system of filters. Their applications to FLLs can enrich FLL’s performance. This article focuses on applying the stationary reference frame MDSC filters at in-loop and prefiltering stages of the FLL and compares its effectiveness with widely used cascaded delayed signal cancellation (CDSC) and complex bandpass filter (CBF) based filtering techniques. The application of the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$K$</tex-math></inline-formula> -factor-methodology-based controller design to FLLs has also been explored for dynamic performance enhancements. A new cascaded multiple delayed signal cancellation (CMDSC) filter is proposed and is compared with its CDSC counterpart proposed in the literature to address the effects of dc offsets and imbalances under adverse grid conditions. The effectiveness of the proposed method is verified through OPAL-RT real-time simulations and dSPACE ds1104 and TMS320F28335 microcontroller experimental test bench.

Enhanced Grid Synchronization Technique Based on Frequency Detector for Three-Phase Systems

An adaptive cascaded delayed signal cancellation (CDSC) method relying on a simple frequency detector is combined with a third-order function for three-phase grid synchronization application. In this article, the proposed synchronization technique shows a high degree of insensitivity to harmonics at both nominal and off-nominal frequency environments. When compared to a similar method relying on adaptive CDSC and phase-locked loop (CDSC-PLL), the proposed technique generates alike results but demands less computational effort due to avoiding real-time evaluation of computationally demanding trigonometric functions and square root operation. Moreover, unlike the CDSC-PLL method, the proposed one eliminates the interdependent loops exist between the phase and frequency estimation, thus a simpler tuning process is achieved. In addition, the proposed method stays away from the tuning of the loop filter in the PLL by removing the phase loop. The usefulness of the proposed method is established by both simulation and experimental results.

Robust Predictive Rotor Current Control of a Doubly Fed Induction Generator Under an Unbalanced and Distorted Grid

Under unbalanced and distorted grid conditions, the performance of conventional control methods for doubly fed induction generators (DFIGs) severely deteriorates, resulting in highly distorted stator and rotor currents. Furthermore, the performance can further degrade when the machine parameters used in such a controller differ from their actual values due to temperature, saturation and so on. To solve these problems, this paper proposes a robust predictive rotor current control (R-PRCC) scheme for a DFIG with multiple aims, even under unbalanced and distorted grid conditions. First, the reference value of the positive-sequence component of the rotor current is obtained from the outer power loop with the help of cascaded delayed signal cancellation (CDSC), which ensures the control aim of sinusoidal and balanced rotors currents. By investigating the relationship between stator currents and rotor currents, a new rotor current reference without using DFIG parameters can be obtained to satisfy multiple control aims, including sinusoidal and balanced stator currents, constant output active power and constant electromagnetic torque. Second, by introducing an extended state observer (ESO), the total disturbance caused by model uncertainty can be quickly estimated, and deadbeat control is further incorporated to achieve fast and accurate control of the rotor current. The proposed R-PRCC scheme is compared to conventional field-oriented control (FOC) and model predictive rotor current control (MPRCC). Simulated and experimental results are obtained for a 1.5-kW laboratory. The DFIG system confirms the effectiveness of the proposed method.

Implementation of enhanced non-adaptive cascaded DSC-PLLs for renewable energy systems

In recent years, to fast and accurately extract the grid voltage information, using cascaded delayed signal cancellation (CDSC) operators in the prefiltering stage of phase locked loops (PLLs) has become highly popular. Non-adaptive CDSC (NCDSC) operators do not cause the stability problems unlike adaptive CDSC operators. So, researchers use the NCDSC operators intensely. Nonetheless, the NCDSC operators have two main drawbacks: (1) the dynamic responses of NCDSC-PLLs are not fast enough, similar to adaptive CDSC operators-based PLLs; and (2) the imbalance rejection capability of the NCDSC-PLLs dramatically deteriorates in case of large frequency variations. In this paper, to overcome these problems, two enhanced NCDSC-PLLs, which are called the ENCDSC-PLL1, and ENCDSC-PLL2, are suggested. The parameter design procedures of suggested PLLs are given by means of their small- signal models. Since the proposed ENCDSC-PLLs are the nonminimum-phase systems, their stability analyses are evaluated by Nyquist diagram. The feasibility and effectiveness of the proposed ENCDSC-PLLs are validated by experimental results.

Control of transformerless T-type DVR using multiple delayed signal cancellation PLL under unbalanced and distorted grid condition

In the near future, the power system network may experience severe voltage distortions due to association of renewable energy sources (RES), and the large penetration of power electronic based loads into the microgrid. To protect sensitive loads from these distorted and unbalanced grid conditions, the commonly used dynamic voltage restorer (DVR) requires effective control algorithms. The effective control algorithm comprises a controller, and accurate estimation of grid phase angle/frequency, and magnitude, thereby the reference DVR voltage is accurately estimated. The synchronous reference frame based phased locked loop (SRF-PLL) is commonly used for phase angle estimation. However, during unbalanced, distorted, and dc-offset conditions, the performance of SRF-PLL is unsatisfactory. To improve its performance, it is cascaded with prefilters such as dual second order generalized integrator (DSOGI), cascaded delayed signal cancellation (CDSC), and multiple delayed signal cancellation (MDSC). Among these prefilters, MDSC has superior performance under all grid conditions with less delay time and memory requirement. In addition to an effective control algorithm, the DVR system requires high power density converters. The power density of the system is increased using transformerless T-type converter. In this paper, the effectiveness of MDSC-PLL for the transformerless T-type converter based DVR is evaluated in MATLAB/Simulink for various grid conditions such as voltage sag/swell, unbalance voltage sag/swell, harmonics, and dc-offset.

Grid-Voltage Sensorless Model Predictive Control of Three-Phase PWM Rectifier Under Unbalanced and Distorted Grid Voltages

The sensors in a three-phase pulse width modulation (PWM) rectifier control system are the basis of high-performance methods. Line voltage sensors are utilized to obtain information about the grid voltage amplitude and phase. To eliminate the grid voltage sensors and to decrease the cost of PWM rectifier control systems, various grid-voltage sensorless methods have been developed. In this article, a virtual-flux-based grid voltage estimation method is utilized in the model predictive control (MPC) of a PWM rectifier. The extended reactive power is introduced in the proposed MPC method; the MPC is then able to realize the control targets of eliminating input-side power oscillations and ensuring sinusoidal currents under unbalanced network conditions without any power compensation terms. The cascaded delayed signal cancellation (CDSC) method is applied to obtain the fundamental rectifier voltages in the virtual flux-based grid-voltage sensorless method. The proposed method can operate under unbalanced and distorted network conditions. Moreover, a startup current suppression method is applied in this method to avoid over-currents during the startup process. Experimental tests are performed to verify the effectiveness of the proposed method.

A Novel Grid Synchronization Method Based on Hybrid Filter Under Distorted Voltage Conditions

The phase-locked accuracy of conventional phase-locked method is reduced when the grid voltage contains fundamental frequency negative sequence(FFNS) component, harmonic component, and DC offset component. Aiming at this problem, a novel adaptive notch filter (NANF) is proposed, and a dual NANF (DNANF) structure is designed to eliminate the FFNS component and extract the fundamental frequency positive sequence(FFPS) component based on NANF. Furthermore, dc DNANF with DC offset rejection capability is proposed by adopting DNANF. Then a novel hybrid filter in dq -frame is designed by combining dc DNANF and the cascaded delay signal cancellation operator filter whose delay parameters are 4 and 24 in dq -frame ( dq CDSC4,24). Meanwhile, a new SRF-PLL design method is proposed based on the novel hybrid filter. This proposed method employs dq CDSC4,24 to separate the positive and negative sequences of the voltage and eliminate the high frequency harmonics in the grid voltage, and uses dc DNANF to reject the DC offset, so as to achieve the accurate acquisition of the fundamental voltage information under distortion and unbalanced grid. Simulation and experimental results show that compared with the conventional SRF-PLL methods, the proposed method can obtain faster phase tracking speed, better phase-locked effect, faster dynamic response, and better stability.

Adaptive cascaded Delayed Signal Cancellation PLL for three-phase grid under unbalanced and distorted condition

Grid synchronization is an important part in monitoring, accessing, and automatically controlling the grid-connected generators and other power electronic converters. The phase of fundamental frequency needs to be tracked in real-time to control energy delivery. However during normal operation the waveforms’ frequency, magnitude, and symmetry are varying due to load change, distortions generated by certain electrical power devices and the occurrence of faults. In this paper, an efficient and fast synchronization scheme based on Delayed Signal Cancellation (DSC) for harmonics rejection purposes has been proposed for extracting the fundamental signal. Also, a detailed αβ-frame Cascade DSC (αβCDSC) analysis is presented and an αβCDSC-PLL scheme with fast dynamic response under transients is proposed. Based on the proposed PLL, an adaptive control loop is also developed to improve disturbance resistance during faults. Both simulation and real-time hardware-in-the-loop (HIL) experiments are used to verify the unbalance resistance, distortion rejection as well as performance improvement of the two proposed αβCDSC-PLL schemes.

Open-Loop Approach for Robust Detection of Selective Harmonic in Single-Phase System

This paper proposes an open-loop approach for selective harmonic detection from the single-phase power system under changeable frequency environment. It consists of a frequency tracking algorithm relying on a fixed tuned demodulation method and a selective harmonic detection scheme based on an adaptively tuned cascaded delayed signal cancellation (CDSC) strategy. It can be easily arranged to detect one or several harmonic(s) from the input signal contaminated by different harmonics. The open-loop configuration makes the proposed technique robust, free of interdependent loop, easy tuning, and unconditionally stable. The real-time utilization of trigonometric and inverse trigonometric functions is also avoided in the technique. When compared with the discrete Fourier transform and CDSC-based technique reported in the technical literature, it demands less computational effort and can create faster dynamics and better steady-state accuracy in the estimated frequency. The usefulness of the technique is confirmed by simulation and real-time experimental results.

Three-Phase PLL for Grid-Connected Power Converters Under Both Amplitude and Phase Unbalanced Conditions

This paper proposes a technique for accurate phase estimation of distorted three-phase grid voltages including unbalanced amplitudes and/or phase angles. An adaptive cascaded delayed signal cancellation (CDSC) strategy is used for the generation of the amplitude balanced three-phase voltages. The CDSC strategy also eliminates both odd and even harmonics from the input voltage. An algorithm is also reported for removing the phase angle deviations from the three-phase voltages including unbalanced phase angles. Finally, a phase-locked loop (PLL) is applied to estimate the phase angle of the reference phase voltage. It requires only one PLL to estimate three phase angles of the thee-phase voltages, respectively, suffering from the unbalanced amplitudes and phase angles. It is also immune to harmonic distortions at changeable frequency environment. When compared to the CDSC-PLL and dqCDSC-PLL techniques reported in the technical literature, it can provide improved phase estimation under amplitude and phase unbalanced condition. Simulated and experimental results of the technique are acquired from the MATLAB/Simulink and dSPACE1104 control board platform, respectively, for a number of case studies observed in the grid voltage.

Single-Phase Enhanced Phase-Locked Loops Based on Multiple Delayed Signal Cancellation Filters for Micro-Grid Applications

The grid voltage information such as the phase-angle, the frequency, and the amplitude is crucial for the design of synchronization and control of power converters in the micro-grid. The conventional approach to estimate the grid voltage information is accomplished by phase-locked loop (PLL) techniques. Among various existing PLL techniques, filter-based PLLs can provide more accurate estimations even under adverse grid conditions. In this paper, a new single-phase filtering technique based on multiple delayed signal cancellation (MDSC) is proposed for extracting both in-phase and quadrature components of the selected harmonic order of the single-phase grid voltage signal. This MDSC technique can be realized in both the direct-form and the recursive-form. In comparison with existing single-phase cascaded delayed signal cancellation (CDSC) techniques, this MDSC technique utilizes less memory for the extraction of grid voltage fundamental frequency component. The proposed MDSC filter can be applied as a pre-filter to the enhanced PLL (EPLL) for the prompt and accurate estimations of the grid voltage information under adverse grid conditions. Both frequency adaptive and non-adaptive MDSC-based EPLL schemes are proposed in this paper. To validate the effectiveness of the proposed methods, experiments are conducted on the MDSC-based EPLLs and compared with the CDSC-EPLL under various grid voltage disturbances.

A novel adaptive auto-reclosing scheme for transmission lines with shunt reactors

In this paper, a novel adaptive single-phase auto-reclosing method for high voltage transmission lines with shunt reactors is presented. The proposed method applies a low-pass filter and the cascaded delayed signal cancellation (CDSC) technique to the fault phase voltage in order to reveal different characteristics between transient and permanent faults. For transient fault, the fundamental and oscillation components of arc voltage are retained, while in permanent fault situation, only the fundament component is preserved. Based on the above analysis, the average distortion rate (ADR) and the corresponding threshold are designed to discriminate transient and permanent faults and also to identify the arc extinction time if the fault is transient. The proposed method is easy to implement with small computation. Simulation results based on EMTP and calculation results based on Matlab as well as the result of a real case relate to a 500 kV transmission line validate the performance of the proposed method.

Dual Role CDSC-Based Dual Vector Control for Effective Operation of DVR With Harmonic Mitigation

For the effective operation of a dynamic voltage restorer (DVR), a control strategy plays a significant role. This paper presents an enhanced control strategy for DVR using dual role cascaded delay signal cancellation (CDSC)-based dual vector control (DVC) under unbalanced and distorted grid conditions. Based on the numerical analysis, it is found that the CDSC prefilter is a promising solution when grid voltage is distorted by symmetric, asymmetric harmonics, and unbalanced sag. Mainly, the CDSC prefilter extracts instantaneous symmetrical components of the grid voltage required for voltage sags detection and generation of fundamental component of reference voltage for the DVR. A CDSC-based DVC algorithm with inductor current and capacitor voltage feedback is implemented in a synchronous reference frame, which tracks the fundamental DVR reference voltages. An extractor based on the modified CDSC strategy is designed to extract harmonics from load voltage during distorted grid conditions. These extracted harmonic components (nonfundamental) are added in phase opposition with fundamental component and fed to pulse width modulation block to generate reference voltages. Experimental studies are conducted on scaled down (100 V, 0.5 kVA) laboratory prototype DVR to verify the effectiveness of the proposed control algorithm under unbalanced and distorted grid conditions.

Adaptive CDSC-Based Open-Loop Synchronization Technique for Dynamic Response Enhancement of Active Power Filters

The shunt active power filters (SAPFs) are broadly utilized to improve the power quality (PQ) issues of electric power systems. A crucial issue in implementing these filters is the accurate estimation of the grid voltage phase/frequency. Indeed, the dynamic behavior and the performance of the SAPF strongly rely on this point. To deal with this challenge, a fast yet effective open-loop synchronization (OLS) technique based on Cascaded Delayed Signal Cancellation (CDSC) is presented in this paper. The proposed technique can reject the odd-order harmonics, the DC offset of the grid voltage, and its dynamic response during transients take an only half cycle of the fundamental frequency. To adapt the proposed OLS technique to the frequency changes, an efficient frequency estimator is also presented. The effectiveness of the proposed OLS technique is demonstrated using simulation and experimental results.

Effective design and implementation of GSS‐PLL under voltage dip and phase interruption

The robust operation of grid-connected converters under non-ideal grids is a challenging topic. Synchronising of converters requires accurate estimation of the grid vector angle which is traditionally performed by phase locked loops (PLLs). Separating the grid voltage and current sequence components is essential for controlling converters under non-ideal grids. In this study, an efficient method to separate the grid sequence components using cascaded delayed signal cancellation (CDSC) is developed. The proposed method is a reduced version of the conventional delayed signal cancellation separation technique. Implementing CDSC in the stationary frame enables for using a higher bandwidth without degrading its filtering capability which enables for using the GSS as a pre-filter stage for the traditional synchronous reference frame PLL. Therefore, the obtained grid sequence separator PLL (GSS-PLL) accurately estimates the grid vector angle under severe conditions. The performance of GSS method as well as GSS-PLL is compared to the conventional multiple second-order generalised integrator (MSOGI) method under unbalance, phase interruption and harmonically distorted grids. The accuracy of the proposed method is verified through simulation and experimental tests. The low computational effort of GSS scheme compared to the MSOGI is a significant advantage which encourages its implantation for most of the grid-connected converters.

A method to improve the transient response of dq-frame cascaded delayed-signal-cancellation PLL

The cascaded delayed signal cancellation (CDSC) based PLL in dq rotate frame (dqCDSC-PLL) can totally eliminate the disturbances of phase error. However, its open-loop bandwidth is significantly affected after incorporating CDSC into the PLL structure, so the transient response performance of three dqCDSC-PLLs are deteriorated. This paper proposes an improved dqCDSC-PLL by cascading a digital filter based phase-lead compensator into CDSC-based PLL to improve the dynamic response without sacrificing the stability. The filter shows flat gain in the passband, which can compensate the phase delay induced by CDSC and simultaneously maintain the attenuation of the notch point. The improved dqCDSC-PLLs significantly increases the open-loop bandwidth and enhances the dynamic performance. Besides, in order to further minimize the undesirable steady-state error, the frequency adaptive control was adopted without using any additional circuits. In order to verify the effectiveness of the proposed method, the simulation based on Matlab/Simulink is carried out for various conditions. Furthermore, experimental results for typical scenarios are provided, which highlight the advantage of the improved dqCDSC-PLL in terms of the dynamic performance.

Fast voltage detection method for grid‐tied renewable energy generation systems under distorted grid voltage conditions

A fast voltage detection method to assist with the low-voltage ride-through operation of grid-tied renewable energy generation systems is proposed in this study. It is designed to detect every phase voltage, so that it can be applied in both three-phase and single-phase applications. The whole voltage detection approach consists of two stages, the pre-filtering stage and the voltage detection stage. In the pre-filtering stage, a cascaded delayed signal cancellation (CDSC) module and a low-pass filter are connected in series to filter low-order harmonics and high-frequency noises. For eliminating the low-order harmonics of interest, different types of CDSC methods are studied in detail. Subsequently, a new orthogonal signal generator is built to calculate the voltage amplitude in the voltage detection stage. Finally, the proposed voltage detection method is verified by experimental results.

Multiple DSC Filter-Based Three-Phase EPLL for Nonideal Grid Synchronization

This paper originally analyzes the effect of the harmonics, dc offsets, and unbalance on the three-phase enhanced phase-locked loop (3P-EPLL). It proves that 3P-EPLL is not able to accurately estimate the amplitude, phase angle, and frequency of the grid in such cases. In order to correctly estimate the grid synchronous information even under the nonideal grid conditions, an improved 3P-EPLL combined with the multiple delayed signal cancellation (DSC) filters is proposed. A DSC operator is set at the each input of 3P-EPLL to eliminate the input dc offsets and even-order harmonics. And the cascaded DSC (CDSC) module is plugged in both the frequency and amplitude loops to remove the effect of most of the odd-order harmonics and unbalance. The relationship between the delay constant of the DSC operator and the order of the harmonics hoping to eliminate is derived to design the structure of the CDSC module and determine the delay constant of each DSC operator in the CDSC module. Detailed experimental results of the standard 3P-EPLL and proposed one validate the theoretical analysis and the proposed phase-locked loop.

Modified &lt;italic&gt;pq&lt;/italic&gt;-Theory-Based Control of Solar-PV-Integrated UPQC-S

This paper proposes a modified pq-theory-based control of a solar photovoltaic (PV)-array-integrated unified power quality conditioner (PV-UPQC-S). The system incorporates clean energy generation along with power quality improvement, thus increasing functionality of the system. The fundamental-frequency positive-sequence components of voltages at the point of common coupling (PCC) are extracted using the generalized cascaded delay signal cancellation technique, which are then used in pq-theory-based control to estimate reference signals for the PV-UPQC-S. This modification in pq theory enables its application for PV-UPQC-S control under conditions of distorted PCC voltages. The series voltage-source converter (VSC) of the PV-UPQC-S operates such that it shares a part of the reactive power of the load even under nominal grid conditions. This increases the utilization of the series VSC while reducing the rating of shunt VSC. The PV array is integrated at the dc bus of the UPQC and provides a part of active load power, thus reducing demand on the supply system. The dynamic performance of the modified pq-theory-based PV-UPQC-S is verified by simulating the system in MATLAB-Simulink with a combination of linear and nonlinear loads. The steady-state and dynamic performances of the system are then experimentally validated through extensive testing on a scaled-down laboratory prototype.