Carrier-based Pulse Width Modulation Strategy Research Articles

Comparative study of single-phase multilevel cascaded transformerless inverters with different modulation methods

This paper presents an in-depth exploration of a single-phase multilevel cascaded H5 (CH5) transformerless inverter employing both phase-shifted PWM (PS-PWM) and level-shifted PWM (LS-PWM) methodologies. A comparative analysis is conducted with the conventional multilevel inverter (MLI) topologies, specifically the cascaded H-bridge (CHB) and H5 inverter configurations. The investigation delves into the impact of modulation index variations, load fluctuations, and modulation methods on the inverter's operational performance.While switches in the CHB-MLI operate continuously at the carrier frequency state using PS-PWM and LS-PWM methods, the CH5-MLI exhibits a unique behavior with some switches toggling at high frequency, while others synchronize with the grid frequency. The CH5-MLI topology demonstrates efficiency improvements and a reduction in total harmonic distortion (THD). Notably, employing the LS-PWM method yields more significant efficiency enhancements and THD reduction compared to the PS-PWM method. To analyze power loss characteristics under diverse operating conditions, the PLECS simulation environment is leveraged for calculating conduction and switching losses.The application of phase-shifted and level-shifted carrier-based pulse width modulation strategies to high and low-frequency switching switches results in minimized output harmonics, elevated operator safety, and enhanced overall reliability and efficiency. This work contributes significantly to the field by offering a detailed exploration of the CH5-MLI topology's dynamic behavior, modulation strategies, and their collective impact on performance metrics such as efficiency, THD, and power losses.

A CB-PWM Technique for Eliminating CMV in Multilevel Multiphase VSI

A generalized Carrier-Based Pulse Width Modulation (CB-PWM) scheme is proposed here for the elimination of common-mode voltage (CMV) in a multilevel multiphase voltage source inverter (VSI). In this CB-PWM scheme, the switching function of x-level, q-phase VSI is obtained from the switching function of virtual y-level and (y+1) level, q-phase VSI, where y = (x+1)/2 when x is odd and y = x/2 when x is even. It is established here that the pole voltages of q-phase x-level VSI thus obtained generate zero CMV. The proposed CB-PWM technique is computationally less intensive and hence can be easily implemented in hardware. Extensive simulation and experimental results are presented to validate the proposed CMV elimination technique in 3-phase 7-level VSI, 5-phase 5-level VSI, and 6-phase 4-level VSI. A comparative study of the proposed PWM scheme with the existing technique shows the superiority of the proposed technique in eliminating CMV.

Modular three phase asymmetrical cascaded multilevel inverter with lower number of switches

ABSTRACT This paper introduces a modular circuit for three-phase asymmetrical multilevel inverter, which is composed of series basic unit cells. It requires fewer number of switches as compared to conventional MLI circuits. Carrier-based pulse width modulation scheme is used to generate switching pulses circuit switches. The proposed circuit is compared with conventional MLI circuit. In order to verify the superiority of proposed circuit, a single phase 4-level inverter and three phase 7-level inverter are simulated in MATLAB/Simulink environment and hardware porotype is also demonstrated using dSPACE 1104 real-time controller.

An Improved Carrier-Based PWM Strategy with Reduced Common-Mode Voltage for a Three-Level NPC Inverter

Double modulation wave carrier-based pulse width modulation (CBPWM) is a solution for eliminating the deviations of the neutral-point voltage (NPV) in three-level neutral-point clamped inverters. In this paper, a new hybrid CBPWM strategy is proposed that not only eliminates the neutral-point voltage oscillations but also reduces the common-mode voltage (CMV) by half. Furthermore, the harmonic content is also reduced compared with the available reduced CMV modulation by adjusting the modulation waves based on the location of the reference vector in the space vector diagram. An active neutral-point voltage controller is also realized in order to maintain the performance of the modulation strategy under the NPV perturbations. The performance of the proposed algorithm is compared to the available CBPWM-based techniques in the literature. The effectiveness of the proposed method is also verified by experimental results.

Matrix-Based Approach for Open-Circuit Fault-Tolerant Analysis and PWM Design of Active Neutral-Point-Clamped Converters

Active neutral-point-clamped converter adds open-circuit fault-tolerant (OCFT) capability compared with the widely used original neutral-point-clamped (NPC) topology. However, such capability is hard to utilize due to difficulties in pulse-width modulation (PWM) design and the randomness of failure points, particularly in high-level converters. Current research mainly focused on low-level topologies with a limited number of fault scenarios; moreover, the analysis and design are performed in a nonsystematic way. In this article, the OCFT operations of active NPC (ANPC) converters with multiple fault switches are investigated and the systematic PWM design process is proposed. First, different matrices are proposed for the ANPC converters to capture the complicated topology information and achieve an exhaustive analysis of the topological redundancy. Then, a step-by-step process is proposed to derive the suitable OCFT PWM patterns. The five-level ANPC converter is investigated as an example. Its experimental results validate that the proposed approach can 1) properly predict the behavior of converters systematically so that the tolerable faults and intolerable can be identified during the design procedure, and 2) the inherent fault-tolerant capability of the five-level ANPC converter can be guaranteed through the proposed method, and 3) multiswitch open-circuit faults can be easily dealt with by implementing suitable carrier-based PWM schemes.

A New Carrier-Based Pulse Width Modulation Technique for an Indirect Matrix Converter

In this work, a new carrier-based pulse width modulation (CPWM) scheme is built for three-to-three phase indirect matrix converter (IMC). In the existing CPWM schemes, the control schemes of the source side converter of the IMC are developed based on either sector based complex calculations or over-modulation operation to obtain the required performance. In the new CPWM scheme, the simplified modulation equations for the source side converter of the IMC are proposed which provide the required performance without resorting to the sector based duty cycle calculations or over-modulation operation. The source and load side converter stages of the IMC are modulated with the standard CPWM principles of the conventional inverter and rectifier topologies in the present work. This work also compares the new CPWM scheme with the SVPWM scheme based on the mathematical calculations which proves that the new CPWM scheme requires less mathematical operations as compared to SVPWM scheme. The simulation and experimental results for both modulation schemes are presented which proves that the new CPWM scheme provides the equivalent input and output performances to those of the SVPWM scheme. The control devices DSP (TMS320F28335) and FPGA (Spartan-6) are used to implement the CPWM and SVPWM schemes.

Active Modulation Strategy for Capacitor Voltage Balancing of Three-Level Neutral-Point-Clamped Converters in High-Speed Drives

In this article, the equivalent relationship between the nearest-three-virtual space vector and carrier-based pulsewidth-modulation scheme is established based on space vector coordinate for a three-level neutral-point-clamped (3L-NPC) converter. Moreover, to solve the neutral-point voltage imbalance problem of the studied 3L-NPC converter-fed high-speed drives, an active modulation strategy with the generalized bias-offset injection technique is proposed. Meanwhile, the excessive computational burden is significantly overcome by the fast calculation approach. The effectiveness of the proposed modulation algorithm is validated through both simulation and experimental results obtained from a 45 kW, 32 kr/min aircraft electric starter/generator prototype system.

Simple Carrier-Based PWM for Prolonged High DC-Link Utilization for Symmetrical and Asymmetrical $n$-Phase AC Drives

Square voltage waveforms enable high dc-link utilization (DLU) in multiphase ac drives. Circulating-current filters were devised to attenuate the harmonics in no-torque low-impedance subspaces. Nonetheless, the square-wave harmonics that generate torque ripple are not reduced. Recently, it was proposed to combine circulating-current filters with a carrier-based pulsewidth modulation (PWM) method, which injects harmonics in no-torque subspaces (attenuated by the filter) of five-phase motors to achieve high DLU, without harmonics associated with torque ripple. The filter allows prolonged high-DLU operation without overheating. Compared with other PWM techniques capable of high-DLU operation (overmodulation), the one proposed for said filters is especially convenient because of its simplicity. However, it is unclear if this PWM method can be extended to machines of any phase number n and winding arrangement (symmetrical or asymmetrical); and if so, the resulting performance is also unknown. This article extends this simple carrier-based PWM strategy to n-phase drives, and evaluates its behavior in terms of DLU, distortion, and computational burden. Symmetrical and asymmetrical winding arrangements are considered. The improvement in DLU, compared with conventional PWM with zero-sequence injection, is considerable. Current distortion is negligible with a suitable filter. The simplicity over other high-DLU PWM techniques is remarkable. Experimental results are provided.

Carrier-based PWM Method for Indirect Matrix Converters based on Space Vector Analysis

In this paper, a novel approach to realize the carrier-based pulse width modulation (CBPWM) method for indirect matrix converter (IMC) is presented. The advantage of the proposed CBPWM method is that only one triangular carrier signal with constant gradient falling and rising edges is used to generate the PWM to the power switches in both the rectifier and the inverter stages of IMC. The analysis of the proposed CBPWM method is based on the space vector approach and the relationship between CBPWM and space vector pulse width modulation (SVPWM) methods is provided. In this paper, four CBPWM methods called: sinusoidal PWM, third harmonic injection PWM, symmetrical PWM and discontinuous PWM are presented. These different CBPWM schemes are established according to the distribution of zero vectors and the switching pattern of the SVPWM method. The comparison of output voltage performance with different CBPWM schemes are investigated. Compared to the conventional method the calculation time of the proposed method is reduced around 50%. Concretely, the calculation time of the SVPWM method is 45 μs, while the calculation time of the proposed method is 22 μs. The experiments have been carried out to show the effectiveness of the proposed method.

Hybrid Improved Carrier-Based PWM Strategy for Three-Level Neutral-Point-Clamped Inverter With Wide Frequency Range

The three-level neutral-point-clamped inverter used in the variable frequency system has the characteristics of a wide frequency range, and the pulsewidth modulation (PWM) strategy needs to be designed for the low-frequency region with low modulation index and the high-frequency region with low carrier ratio, respectively. The traditional carrier-based PWM (CBPWM) is simple to implement, but in the low-frequency region, CBPWM will cause narrow pulse and output voltage distortion; while in the high-frequency region, CBPWM can only achieve the synchronized modulation with half-wave symmetrical (HWS) and three-phase symmetrical (TPS) waveforms when the carrier ratio is an odd integer multiple of three, and it cannot realize the square-wave modulation. To solve the defects of CBPWM, this article proposes improved CBPWM (ICBPWM) I, which can avoid narrow pulse and generate line voltage accurately at any low modulation index, ICBPWM II, which can ensure the voltage to meet TPS and HWS when the carrier ratio is an arbitrary integer multiple of three, and ICBPWM III, which can achieve square-wave modulation, separately. On this basis, by using ICBPWM I, ICBPWM II, and ICBPWM III in combination, a hybrid ICBPWM strategy with wide frequency range is further proposed. Finally, the proposed strategy is verified by simulation and experiment.

CBPWM and SVPWM equivalent relationship on single‐phase NPC N ‐level inverters with arbitrary sequence

Single-phase multilevel neutral-point-clamped (NPC) voltage source inverter has been widely applied in AC traction drive system, the carrier-based pulse width modulation (CBPWM) method and the space vector pulse width modulation (SVPWM) method are mainly two modulation methods for single-phase NPC multilevel converters, and there is a certain relationship between these two modulation strategies. In this study, the unified relationship between SVPWM and CBPWM in single-phase three-level and five-level NPC has been analysed. Then by injecting the zero-sequence component into the initial modulation wave, the same switching state and output current as SVPWM can be achieved through modulation waves decomposed under the CBPWM strategy. Finally, the unified theory of SVPWM and CBPWM in an N-level inverter with an arbitrary number of segments sequence was deduced. The simulation and experimental results illustrate that the unified theory between CBPWM and SVPWM is correct. With the zero-sequence injected, CBPWM can realise the same effect as SVPWM, but the former is simpler than the latter, which is easy to promote for higher-level applications.

Uniform carrier‐based PWM method for three‐phase three‐level three‐wire and four‐wire converter system with neutral‐point balancing

In this study, a simple carrier-based pulse-width modulation (CBPWM) method is proposed for a three-phase three-level neutral-point-clamped converter with neutral-point (NP) balancing, which can be applied to three-phase three-wire (TPTW) and three-phase four-wire (TPFW) converter systems simultaneously. First, the effect of each switching state for the NP potential in TPTW and TPFW systems is analysed in detail, and a newly NP control strategy by reconstructing the switching state and adjusting the corresponding duration time is deduced for all operation conditions, it only needs to add the offset voltage to the modulation reference voltage to guarantee the NP balance and is easy to implement. Then, under all operating conditions, the mathematical model of NP current is derived and analysed to evaluate the low-frequency voltage oscillation in the NP. Finally, the effectiveness and feasibility of the proposed CBPWM strategy are verified by the experimental results based on a 12 kVA laboratory prototype.

A New Carrier-Based Pulse Width Modulation Scheme with Reduced Output Voltage Total Harmonic Distortion for Multi-Level Inverters

This paper proposes a novel Pulse Width Modulation (PWM) switching technique based on Optimized Carrier Peaks-PWM (OCP-PWM) which can be used to control both single phase and three-phase multilevel inverters. The proposed PWM scheme is designed according to multi-peak selection on carriers a way to define the optimum values for carrier peaks and then minimizing the output voltage Total Harmonic Distortion (), switching frequency (f s), and also switching losses, in comparing with the other carrier-based PWM methods. To examine the performance of the presented PWM scheme, a five-level converter has been employed including six power MOSFETs to produce five level in the output. In comparison with typical PWM switching methods for single-phase inverters, the presented PWM scheme produces low harmonic components in the output voltage. To investigate the reliability of the presented PWM scheme for single-phase five-level converters a 2.5kVA/400 V prototype is carried out by applying a TMS320F28335 digital signal processor.

A Novel 2$N$ + 1 Carrier-Based Pulse Width Modulation Scheme for Modular Multilevel Converters With Reduced Control Complexity

This article presents a simple pulse width modulator to achieve both N + 1 and 2N + 1 modulation in a modular multilevel converter. The proposed implementation needs a single triangular waveform to control a modular multilevel converter with a large number of submodules. Hence, the proposed approach significantly reduces the required triangular carrier count and solves the practical implementation issues associated with the carrier-based pulse width modulation schemes in the digital control platforms. The performance of the proposed approach is validated with detailed experimental studies. The results show that the proposed strategy effectively generates a multilevel voltage waveform at the load terminals. Furthermore, the performance of the proposed approach is compared with the traditional phase-shifted carrier pulse width modulation schemes. In addition, it can be easily applied to the n-level modular multilevel converter with any type of submodule configuration.

Critical analysis of random frequency inverted sine carrier PWM fortification for half-controlled bipolar three-phase inverters

The inverted sine carrier-based pulse width modulation scheme has been acknowledged for fundamental fortification in DC–AC conversion. This paper suggests a randomized inverted sine carrier for the half-controlled PWM switching strategy of a three-phase voltage source inverter to enhance its ability to spread harmonic power. A detailed study of the proposed modulation technique is presented through MATLAB-Simulink, and switching pulses are generated in the ModelSim digital environment. Harmonic analyses and assessments of different performance measures such as power spectrum density, harmonic spread factor, total harmonic distortion and dominating harmonic orders for various modulation indices have been carried out. Simulation and experimental results show that the proposed PWM method can spread harmonic power in output voltage better than the conventional SPWM or SVPWM. For real-time digital implementation, the gating signals are generated using a field-programmable gate array Spartan XC3S500E − 320F device.

Neutral Point Voltage Analysis for Three-Phase Four-Wire Three-Level Grid-Connected Converter Based on CBPWM Strategy

In order to ensure the safe and reliable operation of three-phase four-wire (3P4W) three-level grid-connected converter (TL-GCC) from the point view of neutral point voltage (NPV) self-equilibrium, a sufficient condition based on carrier-based pulse width modulation (CBPWM) strategy is presented. The analysis of NPV self-equilibrium based on the sufficient condition is presented while different forms of current are outputted. Then, a novel active control method based on producing zero sequence direct current is proposed to balance NPV. The theoretical analysis of NPV self-equilibrium as well as the effectiveness of the proposed active NPV control method are verified by experimental results.

A Zero-Sequence Steerable CBPWM Strategy for Eliminating Zero-Sequence Current of Dual-Inverter Fed Open-End Winding Transformer Based PV Grid-Tied System With Common DC Bus

Aiming at the issue of zero-sequence current (ZSC) in the dual-inverter fed open-end winding transformer (OEWT-DI) based photovoltaic (PV) grid-tied system with common DC bus, a carrier-based pulse width modulation (CBPWM) strategy with steerable zero-sequence is proposed. The modulation wave of the dual-inverter is decomposed into two modulation waves with same amplitude and 120° phase difference, and each of the modulation waves is modified through adding steerable zero-sequence component. The zero-sequence component is regulated by the ZSC control loop based on a quasi-proportional resonant regulator, which is designed to suppress the ZSC caused by the dead-time effect and other nonlinear factors. Meanwhile, the effective modulation range is also analyzed. The proposed strategy is an alternative approach to the conventional zero-sequence steerable phase shift based space vector pulse width modulation (SVPWM) strategy, but has the advantage of easy implementing and low computation cost. With the proposed strategy, both the high-frequency and low-frequency ZSC in the system can be effectively suppressed. Effectiveness of the proposed strategy is validated by experimental results on a 30-kW OEWT-DI experimental platform.

Bidirectional Three-Phase DC–AC Converter With Embedded DC–DC Converter and Carrier-Based PWM Strategy for Wide Voltage Range Applications

A bidirectional three-phase dc–ac converter with embedded dc–dc converter for bidirectional storage interface is proposed in this paper. With the help of the embedded dc–dc converter, the voltage of the storage battery can vary in a wide range. To minimize the power rating and power losses of the embedded dc–dc converter, a simple carrier-based pulsewidth modulation (PWM) strategy with zero-sequence injection is proposed. By adopting the proposed PWM strategy, only a small ratio of total power needs to be processed by the embedded dc–dc converter, while most of the power is only processed by the three-phase dc–ac stage within a single conversion stage. As a result, quasi single-stage power conversion is achieved to improve the conversion efficiency of the overall dc–ac power system. Principles, characteristics, and implementations of the proposed three-phase dc–ac converter and its PWM strategy are analyzed in detail. The feasibility and effectiveness of the proposed solutions are verified with experimental results.

A New Two-Phase Five-Level Converter for Three-Phase Isolated Grid-Tied Systems With Inherent Capacitor Balancing and Reduced Component Count

This paper presents a single dc source fed five-level converter topology for medium-voltage high-power isolated grid-tied systems with reduced power switch count. The proposed converter generates two-phase systems of voltages that are further converted to three phases by using Scott-T transformer connection. Compared to existing topologies, the proposed converter requires fewer power switches, gate drivers, and power diodes. An added advantage is that only a single dc source is required. An important feature of this topology is that the dc-link capacitor voltages have an inherent ability to self-balance by themselves without the need for extra balance circuitry and special control algorithms. The voltage stress across the power devices of the proposed converter is equal to half of dc-link voltage. A level-shifted carrier-based pulsewidth modulation scheme is used to inject current into the grid at unity power factor. Analysis and simulation and experimental results are presented to validate the performance of the proposed converter under grid-tied operation.

Reduced carrier PWM scheme with unified logical expressions for reduced switch count multilevel inverters

The significant reduction in switch count of symmetrical/asymmetrical reduced switch count multilevel inverters (RSC-MLI) topologies has modified the operation of inverter such that the conventional carrier-based pulse width modulation (PWM) schemes such as level-shifted PWM and phase-shifted PWM can no more realise them. To control these RSC-MLI topologies, reduced carrier PWM schemes with modified switching logic gained more prominence. These schemes involve suitable logical expressions to realise the switching states of the inverter. However, these logical expressions vary with topological arrangement and number of levels. Moreover, these schemes produce high total harmonic distortion (THD) in line-voltages. Therefore, to improve the line-voltage THD and generalise the switching logic, a modified reduced carrier PWM scheme with unified logical expressions is presented here. The proposed PWM scheme is directly valid for any topology and can be easily scalable to any number of levels in the inverters. To validate the implementation of the proposed PWM to control any RSC-MLI, experimental studies of various asymmetrical RSC-MLI topologies with the proposed PWM scheme are carried out. Further, to verify the superiority of the proposed scheme in terms of THD, complexity, scalability, and computation burden, its performance is compared with carrier-based PWM schemes reported in the literature.