Bridgeless Power Factor Correction Rectifier Research Articles

Quasi-Two-Level Bridgeless PFC Rectifier for Cascaded Unidirectional Solid State Transformer

With the advancements in wide-bandgap power devices, the solid state transformer (SST) becomes attractive to industry due to its merits of high efficiency and power density, modularity, and scalability. However, the complexity and cost remain obstacles to widespread adoption. This article presents a unidirectional SST with a cascaded three-level bridgeless power factor correction rectifier stage and a series-half-bridge (SHB) <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> dc–dc stage, which is simpler and more cost effective than its bidirectional counterpart. The quasi-two-level (Q2L) modulation method is proposed for the three-level bridgeless PFC rectifier. In contrast with the three-level modulation, the Q2L modulation almost eliminates the neutral-point (NP) voltage ripple at line frequency, resulting in much less dc-link capacitor volume. Further, the only safe switching sequence to implement the Q2L modulation is identified and analyzed. The NP voltage shall be balanced by the SHB <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> dc–dc stage for proper operation of the system. A phase-shift-based three-level operation mode is proposed for the SHB <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LLC</i> converter to balance the NP voltage. The proposed methods are experimentally verified on a 10 kW silicon carbide-based three-level converter cell and a single-phase multicell SST prototype.

High-Efficiency Zero-Voltage-Switching Totem-Pole Bridgeless Rectifier With Integrated Inrush Current Limiter Circuit

A totem-pole bridgeless power factor correction rectifier with the soft-switching capability is proposed in this article. The proposed converter utilizes an inrush current limiter (ICL) circuit, which is applied to satisfy the inrush current limit requirement to achieve the soft switching of main switches for high efficiency, so that high efficiency can be achieved by accomplishing the zero-voltage-switching operation. It can also relieve the reverse recovery problem of main switches, and minimize the soft-switching circuit by integrating the ICL circuit. Besides, the validity of the proposed converter is performed by the experimental results of a prototype converter with a 100–240 ${V}_{\text{AC}}$ universal line input and an 800-W (400 V/2 A) output.

Bridgeless Buck-Boost PFC Rectifier with Positive Output Voltage

A bridgeless buck-boost power-factor-correction (PFC) rectifier with positive output voltage is proposed herein. This PFC rectifier operates in the discontinuous conduction mode (DCM). Owing to the DCM, a good performance on PF is easily achieved as well as no reverse recovery currents being generated from the diodes. By means of output voltage sensing along with the traditional voltage-follower control, a proper control force is created to drive the switches. By doing so, not only the output voltage is stably controlled at a given value, but also the input current tracks the input voltage as tightly as possible. In addition, the accompanying harmonic distortion meets the requirements of the IEC6100-3-2 Class C harmonics standard, and accordingly, the proposed rectifier is suitable for the AC-DC LED driver. Finally, via mathematical deductions and experimental results, the effectiveness of the proposed bridgeless buck-boost PFC rectifier is verified.

A new bridgeless buck PFC rectifier

SummaryIn this study, a new bridgeless buck power factor correction (PFC) rectifier is presented. The proposed buck PFC rectifier is designed to operate in the discontinuous conduction mode (DCM). Because of the DCM operation, the control scheme of the proposed buck PFC rectifier is simple and easy, and the reverse recovery problem of the diodes can be alleviated. Because the input current follows the input voltage naturally, the current loop circuit is not required. Thus, only the traditional voltage‐mode control is employed to sense the output voltage, and a suitable control effort for the proposed buck PFC rectifier is generated to drive the power switches. Consequently, the output voltage of the proposed buck PFC rectifier can be kept at a desired value. Finally, the mathematical deductions and experimental results are provided to verify the effectiveness of the proposed bridgeless buck PFC rectifier. Copyright © 2016 John Wiley &amp; Sons, Ltd.

Zero‐voltage‐transition bridgeless power factor correction rectifier with soft‐switched auxiliary circuit

This study presents a zero-voltage-transition (ZVT) bridgeless power factor correction (PFC) rectifier, which uses an auxiliary circuit with a transformer to achieve soft-switching for the main power switches. With the auxiliary circuit, the main switches can be ZVT turned-on without any additional voltage or current stresses. In addition, the auxiliary switch is turned-off with zero-current switching. Therefore, the switching loss of all power switches is reduced, and the overall rectifier efficiency is improved. The circuit topology, operation analysis and the components selection of the proposed rectifier are described in detail. Finally, a laboratory prototype of 700 W is implemented and tested to verify the performance of the proposed PFC rectifier.

A Gallium Nitride-Based Power Module for Totem-Pole Bridgeless Power Factor Correction Rectifier

The totem-pole bridgeless power factor correction (PFC) rectifier has recently gained popularity for ac-dc power conversion. The emerging gallium nitride (GaN) high-electron-mobility transistor (HEMT), having a small body diode reverse recovery effect and low switching loss, is a promising device for use in the totem-pole approach. The design, fabrication, and thermal analysis of a GaN-based full-bridge multi-chip module (MCM) for totem-pole bridgeless PFC rectifier are introduced in this work. Four cascode GaN devices using the same pair of high-voltage GaN HEMT and low-voltage silicon (Si) power metal-oxide-semiconductor field-effect transistor (MOSFET) chips, as used in the discrete TO-220 package, were integrated onto one aluminum nitride direct-bonded-copper (AlN-DBC) substrate in a newly designed MCM. This integrated power module achieves the same function as four discrete devices mounted on the circuit board. In this module design, the Si and GaN bare die were arranged in a stack-die format for each cascode device to eliminate the critical common source inductance, and thus to reduce parasitic ringing at turn-off transients. In addition, an extra capacitor was added in parallel with the drain-source terminals of the Si MOSFET in each cascode GaN device to compensate for the mismatched junction capacitance between the Si MOSFET and GaN HEMT, which could accomplish the internal zero-voltage switching of the GaN device and reduce its turn-on loss. The AlN-DBC substrate and the flip-chip format were also applied in the module design. This GaN-based MCM shows an improved heat dissipation capability based on the thermal analysis and comparison with the discrete GaN device. The totem-pole bridgeless PFC rectifier built using this integrated power module is expected to have a peak efficiency of higher than 99% with a projected power density greater than 400 W/in3.

Thermal analysis and improvement of cascode GaN device package for totem-pole bridgeless PFC rectifier

The totem-pole bridgeless power factor correction (PFC) rectifier has a simpler topology and higher efficiency than other boost-type bridgeless PFC rectifiers. Its promising performance is enabled by using high-voltage gallium nitride (GaN) high-electron-mobility transistors, which have considerably better figures of merit (e.g., lower reverse recovery charges and less switching losses) than the state-of-the-art silicon metal-oxide-semiconductor field-effect transistors. Cascode GaN devices in traditional packages, i.e., the TO-220 and power quad flat no-lead, are used in the totem-pole PFC boost rectifier. But the parasitic inductances induced by the traditional packages not only significantly deteriorate the switching characteristics of the discrete GaN device but also adversely affect the performance of the built PFC rectifier. A new stack-die packaging structure with an embedded capacitor has been introduced and proven to be efficient in reducing parasitic ringing at the turn-off transition and achieving true zero-voltage-switching turn-on. However, the thermal dissipation capability of the device packaged in this configuration becomes a limitation on further pushing the operating frequency and the output current level for high-efficiency power conversion. This paper focuses on the thermal analysis of the cascode GaN devices in different packages and the GaN-based multichip module used in a two-phase totem-pole bridgeless PFC boost rectifier. A series of thermal models are built based on the actual structures and materials of the packaged devices to evaluate their thermal performance. Finite element analysis (FEA) simulation results of the cascode GaN device in a flip-chip format demonstrate the possibility of increasing the device switching speed while maintaining the peak temperature of the device below 125 °C. Thermal analysis of the GaN-based power module in a very similar structure is also conducted using the FEA method. Experimental data measured using the fabricated devices and modules validate the simulation results. The developed new package in a flip-chip configuration enhances the thermal dissipation capability of the cascode GaN device in the stack-die format. The GaN-based power module built using the same packaging structure also demonstrates desirable thermal performance.

A Bridgeless SEPIC PFC Rectifier with Reduced Conduction Losses

A bridgeless single-ended primary inductor converter (SEPIC) power factor correction (PFC) rectifier is introduced in this paper. In order to maximize its efficiency more than a conventional bridgeless SEPIC PFC Rectifier, a new driving scheme is proposed. In the proposed converter, conduction losses are reduced by eliminating bridge diodes. In addition, the impedance of the return current paths is lowered and conduction losses are reduced by applying a gate-on signal which is maintained during half line cycle to inactive switches. Consequently, the conduction losses of the proposed converter are significantly reduced and high efficiency is achieved. Besides high efficiency, the proposed converter provides high power factor (PF) and a continuous input current. Input current ripple can be easily removed by a simple filter capacitor. The operational principles, steady-state analysis and design equations of the proposed converter are described in detail. Experimental results from a 130 W prototype at a constant switching frequency of 100 kHz are presented to verify the performance of the proposed converter.

High Power Factor Boost Converter with Bridgeless Rectifier

A bridgeless power factor correction rectifier with boost converter is introduced. This converter substantially improves efficiency at low line of the universal-line range. By eliminating input bridge diodes during conduction, the proposed rectifier's efficiency is further improved. Moreover, the rectifier doubles its output voltage, which extends useful energy of the bulk capacitor after a dropout of the line voltage. Also second stage boost converter is included to maximize the output. The efficiency difference between low line and high line is less than 0.5% at full load. A second-stage half-bridge converter is also included to show that the combined power stages easily meet Climate Saver Computing Initiative Gold Standard. Keywords— power factor (Pf), bridgeless rectifier, boost converter, phase difference. I. Introduction In universal-line (90-264V) applications, maintaining a high efficiency across the entire line range poses a major challenge for ac/dc rectifiers that require power factor correction (PFC). Driven by economic reasons and environmental concerns, maintaining high efficiency across the entire load and input-voltage range of today's power supplies is in the forefront of performance requirements. Specifically, meeting and exceeding U.S. Environmental Protection Agency's (EPA) Energy Star, and Climate Saver Computing Initiative (CSCI) efficiency specifications have become a standard requirement for both multiple- and single-output offline power supplies. Generally, the EPA and CSCI specifications define minimum efficiencies at 100%, 50%, and 20% of full load with peak efficiency at 50% load. For decades, a bridge diode rectifier followed by a buck converter has been the most commonly used PFC circuit because of its simplicity and good PF performance. This drop of efficiency at low line can be attributed to an increased input current that produces higher output voltage. However, in practical application the Buck PFC converter has the following disadvantages: 1) The output voltage is below the limit of the input voltage. 2) There is the poor performance during the startup, the overloading and the non-load. 3) The high switching losses and EMI. They are resulted from the great ripple current flowing from the power switch and diode. 4) The bridge type converter increases the losses. 5) The control circuit is complex and high cost. In order to overcome these problems, in this paper, a single-phase bridgeless PFC rectifier with boost converter is presented. In conventional method, a bridgeless buck PFC rectifier that further improves the low-line (115 V) efficiency of the buck front-end by reducing the conduction loss through minimization of the number of simultaneously conducting semiconductor components is introduced. It also works as a voltage doubler, it can be designed to meet harmonic limit specifications with an output voltage that is twice that of a conventional buck PFC rectifier. As a result, the proposed rectifier also shows better hold-up time performance. Although the output voltage is doubled, the switching losses of the primary switches of the downstream dc/dc output stage are still significantly lower than that of the boost PFC counterpart. Also the buck PFC converter does not shape the line current around the zero crossings of the line voltage, i.e., during the time intervals when the line voltage is lower than the output voltage, it exhibits increased total harmonic distortion (THD) and a lower PF compared to its boost counterpart. As a result, in applications where IEC61000-3-2 and corresponding Japanese specifications (JIS-C-61000-3-2) need to be met, the buck converter PFC employment is limited to lower power levels. The conventional buck converter operation and control is described in (1)(2)and(3). In proposed method PFC rectifier with boost converter is introduced to improve the PF furthermore, which is different from the normal bridge type rectifier and boost converter where, the operation consists of two diodes in conduction at each half cycle simultaneously ,one is in from upper leg and other is from lower leg. Here, the positive half cycle has two diodes and similarly the negative half cycle has two diodes. This type of operation requires high power to switching than the bridgeless operation. Also it increases the conduction loss. The bridgeless rectifier with boost converter increases the output nearly double the value or higher than that. When the supply is positive the first half cycle has one diode and one switch in conduction another will not conduct for a while this will continue until the switch is ON. When the switch is open another diode starts freewheels the current. In the same way, for negative half cycle the diode in lower leg with second switch will conduct until the switch will open. When the switch is open another diode in the lower leg