Abstract The static current–voltage characteristics (CVCs) of samples from p-type and n-type monocrystal silicon with a layer of porous silicon (PS) are measured in air at room temperature (samples with solid-state contact-SSC) and in electrolyte at temperatures 250–320 K (samples with electrolytic contact-EC). By straightening character of the CVC of samples with SSC, it is concluded that samples have a thin PS layer. A hysteresis on CVC obtained on samples with EC is found. For p-Si/PS samples with EC, the hysteresis is observed on both branches of CVC, whereas for n-Si/PS samples with EC, the hysteresis is present only on the direct branch. The form of the CVC of the samples with EC depends on a material of a counter-electrode. By using a noble metal counter-electrode (gold, platinum or silver), the CVC is of a straightening kind. Using a semiconductor counter-electrode leads to symmetric CVC. It indicates the existence of two back-to-back barriers in system sample/electrolyte/semiconductor counter-electrode. Measurements of the current temperature dependence revealed that the conductivity grows up monotonously with the temperature in the low temperature region. In the temperature range of the electrolyte phase transition temperature, the conductivity sharply grows. For aged samples, the growth of the conductivity in the region of the phase transition of electrolyte occurs more sharply than for newly prepared samples. The non-ideality factor ( n ) is equal to 20 and 15 for the samples with SSC and for the samples with EC, respectively, i.e. in electrolyte n decreases.