Gain Degradation In Bipolar Transistors Research Articles

Recent advances in understanding total-dose effects in bipolar transistors

Gain degradation in irradiated bipolar transistors can be a significant problem, particularly in linear integrated circuits. In many bipolar technologies, the degradation is greater for irradiation at low dose rates than it is for typical laboratory dose rates. Ionizing radiation causes the base current in bipolar transistors to increase, due to the presence of net positive charge in the oxides covering sensitive device areas and increases in surface recombination velocity. Understanding the mechanisms responsible for radiation-induced gain degradation in bipolar transistors is important in developing appropriate hardness assurance methods. This paper reviews recent modeling and experimental work, with the emphasis on low-dose-rate effects. A promising hardness assurance method based on irradiation at elevated temperatures is described.

Circuit Reliability Simulation

AbstractIn designing a complex circuit, designers make a large number of circuit simulations, design changes and optimizations and can predict the circuit's performance reasonably accurately before committing it to silicon. It would be unthinkable to bypass detailed circuit simulation and optimization and rely on simple design rules and the testing of finished IC's to discover errors or to find out if the performance of the circuit meet specifications. Yet, this is basically the way IC reliability is treated today. A logical alternative is to predict circuit reliability at the circuit design stage through reliability simulation.Reliability simulator BERT is used to illustrate the physical models and approaches used to simulate the hot electron effect, oxide time-dependent breakdown, electromigration, bipolar transistor gain degradation, and radiation effects. The goal is to make circuit reliability simulation a part of the IC design process.

The Berkeley reliability simulator BERT: an IC reliability simulator

BERT (Berkeley reliability simulator) is a CAD tool developed for the purpose of design for reliability. This paper describes its intended application, the physical models and approaches used to simulate the hot electron effect, oxide time-dependent breakdown, electromigration, and bipolar transistor gain degradation.

IC reliability simulation

The motivation and challenges of IC reliability simulation are discussed. The reliability simulator BERT is used to illustrate the physical models and approaches used to simulate the hot-electron effect, oxide time-dependent breakdown, electromigration, and bipolar transistor gain degradation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>