Bare Si Wafer Research Articles

Evaluation of Metal Contamination Behavior on Silicon Wafer Surfaces Rinsed with Deionized Water Containing pg/L-Level Impurities

Two tests were performed to investigate the contamination behavior of bare Si wafers by rinsing them using deionized water (DIW) contaminated with metals at the pg/L-level in a single-wafer cleaning process. First, we found that Al, Ti, Mn, Co, Cu, Sr, and Pb exhibited strong correlations between the metal concentrations in DIW and the wafer surface concentrations under different concentrations in DIW and the same rinse time of 480 min. Second, we observed that the wafer surface concentrations of Al, Ti, Cu, and Pb increased with the rinse time, whereas those of Mn, Co, and Sr were constant at rinse times ranging from 10 to 960 min at metal concentrations of 60 pg/L in DIW. In this test, Cu exhibited a high adsorption ratio on bare Si wafers, even at the pg/L level. These data provide novel insights into wet processes for device manufacturing.

Facile fabrication of Au thin film substrates with crack-like nanogaps for surface-enhanced Raman spectroscopy

Surface-enhanced Raman spectroscopy (SERS) has the advantage of nondestructive, quick, and accurate detection of harmful substances. Among the methods used to fabricate SERS substrates, a conventional evaporation equipment can achieve nanostructure of various shapes and sizes by adjusting the process pressure. In this study, general thermal evaporation equipment was utilized to fabricate SERS substrates. Au thin films with nanogaps were deposited on bare Si wafers with different process pressures and film thicknesses to vary the shape and size of the nanogaps. The microstructure was observed through scanning electron microscopy and transmission electron microscopy. In addition, the contact angle and reflectance of the Au thin films were measured. As the process pressure increased, the light reflectance decreased and the contact angle of the film increased. The SERS effect was found to be influenced by the width, depth, and number of nanogaps, reflectivity, and contact angle of the thin films. Optimal performance was observed under a process pressure of 13.3 Pa and film thickness of 215 nm. Under these conditions, the 2 µM rhodamine 6 G, allura red AC, and sunset yellow FCF were detected, and the uniformity and reproducibility of the thin film were also confirmed over a 6-inch substrate.

Unlocking the monolithic integration scenario: optical coupling between GaSb diode lasers epitaxially grown on patterned Si substrates and passive SiN waveguides

Silicon (Si) photonics has recently emerged as a key enabling technology in many application fields thanks to the mature Si process technology, the large silicon wafer size, and promising Si optical properties. The monolithic integration by direct epitaxy of III–V lasers and Si photonic devices on the same Si substrate has been considered for decades as the main obstacle to the realization of dense photonics chips. Despite considerable progress in the last decade, only discrete III–V lasers grown on bare Si wafers have been reported, whatever the wavelength and laser technology. Here we demonstrate the first semiconductor laser grown on a patterned Si photonics platform with light coupled into a waveguide. A mid-IR GaSb-based diode laser was directly grown on a pre-patterned Si photonics wafer equipped with SiN waveguides clad by SiO2. Growth and device fabrication challenges, arising from the template architecture, were overcome to demonstrate more than 10 mW outpower of emitted light in continuous wave operation at room temperature. In addition, around 10% of the light was coupled into the SiN waveguides, in good agreement with theoretical calculations for this butt-coupling configuration. This work lift an important building block and it paves the way for future low-cost, large-scale, fully integrated photonic chips.

In English

Zinc oxide nanostructures (NS) were grown on thin discontinuous films of noble metals of silver and gold in order to study their structure, optical properties as well as photocatalytic and antiviral activity. The paper presents the results of X-ray diffraction study, scanning electron microscopy study, photoluminescence and Raman measurements. X-ray diffraction experiments demonstrate similar patterns for all grown ZnO nanostructures. The SEM images of ZnO NS grown on Ag/Si and Au/Si wafers demonstrate more dense surface microstructure compared to ZnO NS grown on bare Si wafers. The most intensive ultraviolet and deep level emissions are observed for ZnO NS grown on Ag/Si wafers. Increase in thicknesses of Ag island film from 5 nm to 10 nm gives significant increase in intensity of ultraviolet and deep level emissions. Photocatalysis of grown ZnO nanostructures was studied by methyl orange dye degradation. Superior photocatalytic results are demonstrated by ZnO nanostructures grown on Ag/Si wafers, for which constants of dye degradation were twice higher than for ZnO nanostructures grown on Si and Au/Si substrates. The photocatalytic results correlates with photoluminescence spectra: more intensive photoluminescence in ultraviolet and visible ranges of optical spectrum leads to better photocatalytic performance. The cytotoxic effect of ZnO nanostructures was studied without photoactivation by the help of cell cultures MDCK and Hep-2 while the virucidal effect of ZnO nanostructures was studied by the help of Influenza A virus (H1N1) (strain FM / 1/47) and human adenovirus serotype 2 (HAdV2). ZnO nanostructures in a 1:10 dilution were not toxic to Hep-2 and MDCK cells. Most of the tested ZnO nanostructures exhibited no virucidal activity against human adenovirus serotype 2 (HAdV2) and influenza A virus (H1N1) (strain FM / 1/47) in the absence of photoexcitation.

Smart optical measurement probe for autonomously detecting nano-defects on bare semiconductor wafer surface: highly sensitive observation system using phase-contrast microscopy with a spatial light modulator

Nowadays, the yield rate of semiconductor process is strongly affected even by nanoscale defects on bare Si wafer surfaces. Therefore, a non-destructive and high-speed method for detection of nanoparticle contamination is highly demanded. In this research, a nanoparticle detection method is proposed based on the fact that the volatilization process of the volatile inert liquid behaves as an autonomous nanoparticle search probe. Dynamic phase contrast microscopy (Dynamic PCM) is proposed to detect small thickness changes of a thin liquid film with high sensitivity. The dynamic PCM is expected to have double sensitivity compared to normal PCM and it is experimentally verified. Based on previous results, 4% intensity change is expected for 10 nm particles and even over 1.5% intensity change is expected for 5 nm particles by using this proposed dynamic PCM.

Step-By-Step Development of Vertically Aligned Carbon Nanotubes by Plasma-Enhanced Chemical Vapor Deposition

In this work, the growth process of self-sustained vertically aligned carbon nanotubes (VA-CNTs) is investigated in full: from bare Si wafers to fully grown VA-CNTs on 4″ wafers. Each developmental step, from supporting and catalyst layers’ depositions to CNT growth, is analyzed through X-ray diffraction, X-ray reflectivity, and scanning electron microscopy, respectively. The crystalline structure of the titanium nitride supporting layer is investigated through grazing incidence X-ray diffraction, while X-ray reflectivity provides information regarding the density, thickness, and roughness of the titanium nitride layer via extended Fourier analysis. Further, the nickel layers’ and CNTs’ morphologies are investigated by scanning electron microscopy.

Surface-Enhanced IR-Absorption Microscopy of Staphylococcus aureus Bacteria on Bactericidal Nanostructured Si Surfaces.

Surface-enhanced IR absorption (SEIRA) microscopy was used to reveal main chemical and physical interactions between Staphylococcus aureus bacteria and different laser-nanostructured bactericidal Si surfaces via simultaneous chemical enhancement of the corresponding IR-absorption in the intact functional chemical groups. A cleaner, less passivated surface of Si nanoripples, laser-patterned in water, exhibits much stronger enhancement of SEIRA signals compared to the bare Si wafer, the surface coating of oxidized Si nanoparticles and oxidized/carbonized Si (nano) ripples, laser-patterned in air and water. Additional very strong bands emerge in the SEIRA spectra on the clean Si nanoripples, indicating the potential chemical modifications in the bacterial membrane and nucleic acids during the bactericidal effect.

Influence of Heat Treatments on the Properties of ZnO Nanorods Prepared by Hydrothermal Synthesis

ZnO nanorods were grown on bare or SiO2-coated Si wafers by the hydrothermal method. The ZnO nanorods were annealed at 200, 400, and 600°C, respectively. The structural, optical, and electrical property variation of the ZnO nanorods with the annealing temperature was investigated by X-ray diffraction, field-emission scanning electron microscopy, photoluminescence, and current–voltage measurements. For the ZnO nanorods, compressive strain was detected, which decreased with annealing. Moreover, annealing at 600°C led to nanorod agglomeration. The ZnO nanorods annealed at 400°C exhibited the highest crystallinity.

New Thin Adhesive for High Density 2.5D Heterogeneous Device Integration with Cu-Cu Hybrid Bonding

Abstract Heterogeneous integration of logic, memory, and sensor chips on interposers (2.5D) has attracted a lot of attention as a candidate for More-than-Moore technology. For the high performance 2.5D devices, high density integration of chips with narrow spacing and high density interconnections with small pitch bonding electrodes are a key technology. In the current bonding technology, solder micro-bumps (>20 μm in diameter) and non-conductive adhesives have been adopted. There may be some limitations for high density device integration with these technologies because of the protrusion of adhesives around the chips, the thermal sliding at the bonding, and the limit of solder micro-bump minimization. Hybrid bonding with a small Cu electrode (<10 μm in diameter) is a strong candidate for improving advanced device integration technology. Our goal is to develop a new adhesive which gives no protrusion, no thermal sliding, no voids, and high electrical reliability. A spin coating thin adhesive was therefore developed. The new adhesive can be cured at 200 °C. The cured adhesive film has no tackiness and has an optically flat surface. The adhesive film can be temporarily bondable to SiO2 at room temperature. After 200 °C baking, a permanent bonding can be achieved, and there is no degradation of bonding strength and no voids even after 400 °C of baking. For the applicability to the chip-on-wafer process, the adhesive film/Si wafer can be cut into chips by blade dicing without any delamination and without any apparent particles. After bonding the adhesive/Si chip to a bare Si wafer at room temperature, the thermal sliding amount after the thermal compression process (250 °C, 10 min, 1 MPa) was less than 1 μm (under the detection limit) according to optical microscopic measurements. In addition, there was no protrusion of adhesive around the chip corner from SEM. A first trial result for hybrid bonding is also reported.

High-throughput laser generation of Si-nanoparticle based surface coatings for antibacterial applications

High-productivity regime of nanosecond IR-laser ablative generation of silicon colloidal solutions in water for anti-bacterial applications was found in terms of GW/cm2-level laser intensity and scanning velocity by measuring multi-shot ablative mass loss and extinction coefficients of the colloids as sub-linear and third-power intensity functions, respectively. This advantageous regime implies sub-linear mass loss versus laser intensity at the simultaneous third-power yield of nanoparticles, resulting from the subcritical-density, opaque ablative plasma regulating the sample ablation rate and the related plasma-mediated dissociation (dispergation) of the ablation products. In contrast, at higher intensities, there is a drastic increase in mass loss with the corresponding increased yield of (sub) micrometer-sized particles owing to intense plasma-driven expulsion of micro-scale melt droplets and the corresponding saturation of the extinction coefficient of the colloidal solutions because of their dynamic local “self-limiting” effect during the high-rate ablation. The optimal low-intensity regime for Si nanoparticle production demonstrates the monotonous correlated increase of mass loss and extinction coefficient in terms of increasing laser scanning velocity, indicating the diminished cumulative effects. Surface coatings prepared from the generated Si nanoparticles exhibit minor surface oxidation, as acquired as their elemental composition via energy-dispersive X-ray spectroscopy, making their contact angle for water droplets (≈51°) close to that of bare Si wafer (≈58°) with its nanometer-thick native oxide layer. Owing to good wetting, the nanoparticle-based surface coatings show strong antibacterial response regarding Gram-negative Pseudomonas auereginosa bacteria even despite their minor oxidative passivation.

KPFM and XPS Metrology of Self-Assembled Monolayer Barrier for Copper Metallization

Silane based Self assembled monolayer (SAM) has been demonstrated as a diffusion barrier layer on lowK dielectrics for sub 10 nm Cu interconnects for Integrated Circuit (IC) applications. A key problem in developing barrier layer is its monitoring capability, especially its thickness, uniformity, its coverage and defect density. The aim of this work is to develop surface analysis methods for characterizing those variables providing in line monitoring techniques that can predict barrier quality and reliability. The approach presented in this paper was to examine the defect density and coverage properties of the SAM on LowK dielectric using physical methods for the characterization of monolayer thick films, i.e. Variable Angle X-Ray Photoelectron Spectroscopy (VA -XPS) and Kelvin Probe scanning Force Microscopy (KPFM). The SAMs were deposited on three different substrates: bare-Si wafers, thermal oxide/Si and Low-k dielectrics on silicon wafers. The silanization was performed by chemical deposition from various solvents, both polar and non-polar, containing 1-2% silane in ethanol as a solvent at temperature range between 60oC to 120oC. The deposited films where characterized as follows: Variable Angle XPS measurement of High Resolution Multiplex . Next, the XPS data was analyzed as follows: a plot of ln [\U0001d475\U0001d494\U0001d496\U0001d483 \U0001d740\U0001d494\U0001d496\U0001d483 \U0001d470\U0001d490)/(\U0001d475\U0001d490 \U0001d740\U0001d490 \U0001d470\U0001d494\U0001d496\U0001d483+1] Versus 1/sin(α) was drawn , where Nsub is the atomic number density for the substrate , No is the atomic number density for the overlayer, \U0001d740\U0001d494\U0001d496\U0001d483 is the substrate Inelastic Mean free Path, \U0001d740o is the overlayer Inelastic Mean free Path, Isub is the signal intensity of electrons coming from the substrate, Io is the signal intensity of electrons coming from the overlayer and α is the take of angle from the sample surface. The Thickness of the overlayer was calculated from the slope of the graph. Using that data thickness of the SAM was obtained. The method and results will be shown and compared to other methods such as TEM. The XPS data yielded average values on large areal spots (> 10-4 cm2). To achieve high resolution analysis a Kelvin probe force microscopy (KPFM) were performed on SAM. KPFM gives a good image of SAM on low K material. We can learn a lot about Homogeneity and Coverage properties. A study of the nucleation and growth of the SAM, dependent on temperature and time was conducted. It seems that after 60 minutes, the SAM had the best homogeneity and surface coverage. (Figure 1). After mastering the use of the two methods for SAM, the results are compared in order to find the most suitable method for SAM metrology and monitoring that can be employed by the Semiconductor industry. Figure 1

Surface recombination velocity imaging of wet-cleaned silicon wafers using quantitative heterodyne lock-in carrierography

InGaAs-camera based heterodyne lock-in carrierography (HeLIC) is developed for surface recombination velocity (SRV) imaging characterization of bare (oxide-free) hydrogen passivated Si wafer surfaces. Samples prepared using four different hydrofluoric special-solution etching conditions were tested, and a quantitative assessment of their surface quality vs. queue-time after the hydrogen passivation process was made. The data acquisition time for an SRV image was about 3 min. A “round-trip” frequency-scan mode was introduced to minimize the effects of signal transients on data self-consistency. Simultaneous best fitting of HeLIC amplitude-frequency dependencies at various queue-times was used to guarantee the reliability of resolving surface and bulk carrier recombination/transport properties. The dynamic range of the measured SRV values was established from 0.1 to 100 m/s.

Uniform Surface Characteristics in Sequentially Polymerized Polyurea Films

We successfully fabricated uniformly aligned polyurea thin films using molecular layer deposition (MLD) technique. By measuring the film thickness as a functional of the number of cycles, we confirmed the linear growth behavior of the polyurea MLD film. We also fabricated a spin-coated polyurea films after synthesis of the polyurea polymer in solution, and compared their roughness and surface potential with the prepared MLD film. The polyurea MLD film had a low root-mean square value and homogeneous surface potentials, whereas the spin-coated film had very rough surface and a highly variable surface potential. We believe that our results will contribute to performance improvement of polymer-based electrical devices and provide greater insight into the fabrication of uniformly aligned polymer thin films. Table S1. All FTIR peaks measured for the polyurea film along with vibration mode assignment for the in situ FTIR spectra of the (PDI/PDA)n polyurea MLD film. Figure S1. Two-dimensional (a) AFM and (b) SKPM images of the bare Si (100) wafer. (a) The surface of the bare Si (100) wafer is smooth with a RMS roughness of 0.068 nm, in agreement with the line profile. (b) At a 0 V sample bias, the average surface potential is 0.161 V and the standard deviation of the surface potential is 0.024 V. The scan area of each image is 4 μm × 4 μm. Please note: The publisher is not responsible for the content or functionality of any supporting information supplied by the authors. Any queries (other than missing content) should be directed to the corresponding author for the article.

Embedded Si Fan Out: A Low Cost Wafer Level Packaging Technology Without Molding and De-bonding Processes

The growing and diversifying system requirements have continued to drive the development of a variety of new package technologies and configurations: small form factor, low weight, low profile, high pin count and high speed and low cost. Embedded chip in EMC, also called fan-out wafer-level packaging (FOWLP), has been used in various products such as baseband, RF (radio frequency) transceiver, and PMICs (power management ICs). Currently, INFO technology developed by TSMC®, NANIUM® were in mass production for 3D integration for processor and memory, which inspires other packaging foundries to develop their own embedded FOWLP for the forecasted explosive growth of this market in the next few years. There are a number of challenges for FOWLP. For process point of view, temporary bonding and de-bonding are required. EMC wafers are difficult to handle due to its large warpage driven by the big CTE difference between the Si and molding material. In addition, the manufacturing of fine pitch RDL on EMC surface is also difficult. In this paper, the concept of wafer level embedded Si Fan-Out (eSiFO) technology was introduced and the development progress was reported. For eSiFO, cavities with certain depth were formed by Si dry etch. Then device dies were thinned to designed thickness. The dice were then placed into the cavities and bonded by the attached film on the bottom of the dice. A reconstructed wafer was formed. The micro gap between the chip and sidewall of the cavity as well as the surface of the reconstructed wafer were filled by dry film using vacuum process. Next, the pads were opened, followed RDL fabrication, repassivation, BGA, wafer thinning and dicing. Finally, an eSiFO package was fabricated. There are a number of advantages for eSiFO technology. There is nearly no warpage since the Si was used as reconstruct substrate. The process is relatively simple since no molding, temporary bonding and de-bonding are required. RDL manufacturing is easier on Si wafer vs with molding compounds and can achieve high density routing. Furthermore, it can provide small form factor since the thinning of wafer is the last step. To prove the concept of eSiFO, a 3.3 x 3.3mm package with 50 BGA bumps at 400μm pitch was fabricated. The device wafer was thinned to 100μm. The die size is 1.96 × 2.36mm with pad pitch at about 90μm. The depth of the cavities on 8 in. wafer formed by Bosch process on bare Si wafer was 107μm with 8μm variation. The length and width of Si cavities is 20μm larger than die size. In the package, there is one layer Cu RDL with thickness of 3μm, minimum line width of 13.72μm. The BGA ball diameter is 280μm. All the processes were evaluated and the results showed such packages can be produced. Reliability tests including THS, T/C, HTS and HAST were carried out and no failure issue was observed. Mechanical simulation was used to analyze the stress distribution during TC test and the results showed the maximum stress was located at the RDL near the UBM. In summary, a low cost wafer level fan out technology using reconstructed Si wafer was developed. The process is simple without molding, temporary bonding and de-bonding. The reliability tests of test vehicles proved that such package is reliable. The newly developed eSiFO technology can be widely used for chips requiring fan-Out, small form factor and high density interconnects.

Pulsed laser deposition of epitaxial MgO buffer layer for proton-conducting ceramic electrolytes

This work studies the deposition of epitaxial MgO thin films with thickness of 40nm deposited on bare Si (100) wafer using pulsed laser deposition (PLD), which can serve as a buffer layer for subsequent growth of textured Y-BaZrO3 with high proton-conductivity. The success of epitaxial deposition were achieved by careful preparation of Si substrate by pre-etching with HF solution, as well as by optimizing deposition parameters including oxygen partial pressure and substrate temperatures. Epitaxial (100) MgO film with cubic lattice structure and the lattice constant of 4.21Å were obtained, which showed highly lattice match with Y-BaZrO3 perovskite of 4.21Å.

Fabrication of direct Z-scheme Ta3N5-WO2.72 film heterojunction photocatalyst for enhanced hydrogen evolution

A combination of atomic layer deposition (ALD) and sol-gel techniques was applied to fabricate a direct Z-scheme Ta3N5-WO2.72 heterojunction film photocatalyst for improved H2 generation. The Ta3N5 was deposited by ALD on WO2.72 sol coated on Si wafer. Ta3N5 film coated on bare Si wafer showed 13.2μmol/g of H2 generation after 6h under irradiation by a 150W Xe lamp with a cut-off filter (λ>420nm). In comparison, the direct Z-scheme Ta3N5-WO2.72 heterojunction film demonstrated a more than two-fold increase in H2 production (31.9μmol/g). The efficiency of the Ta3N5-WO2.72 heterojunction film further increased to 46.4μmol/g upon coating with Pt nanoparticles by ALD. Additionally, the direct Z-scheme Ta3N5-WO2.72 heterojunction film generated 18 times more H2 than a Ta3N5-WO3 liquid-state (using NaI as the shuttle redox mediator) Z-scheme system prepared by mixing Ta3N5 and WO3 powders. The H2 generation of the direct Z-scheme Ta3N5-WO2.72 heterojunction film coated with Pt nanoparticles further increased to 3072.5μmol/g without the 420nm cut-off filter.

Characterization of Boron Diffusion Phenomena According to the Specific Resistivity of N-Type Si Wafer

This paper is directed to characterize the boron diffusion process according to the specific resistivity of the Si wafer. N-type Si wafers were used with the specific resistivity of 0.5-3.2 omega-cm, 1.0-6.5 omega-cm and 2.0-8.0 omega-cm. The boron tribromide (BBr3) was used as boron source to create the PN junction on N-type Si wafer. The boron diffusion in N-type Si wafer was characterized by sheet resistance of wafer surface, secondary ion mass spectroscopy measurements (SIMS) and surface life time analysis. The degree of boron diffusion was depended on the variation in specific resistivity and sheet resistance of the bare N-type Si wafer. The boron diffused N-Si wafer exhibited the average junction depth of 750 nm and boron concentration of 1 x 10(19). N-type Si wafer with the different specific resistance considerably affected the boron diffusion length and life time of Si wafer. It was found that the lifetime of boron diffused wafer was proportional to the sheet resistance and resistivity. However, optimization process may necessary to achieve the high efficiency through the high sheet resistance wafer, because the metallization process control is very sensitive.

Photocurrent Response of Two ­Metal(II) Complexes Based on Rigid Ligands

AbstractTwo metal(II) complexes formulated as Cd3L(L1)3(H2O) (1) and Zn3L(BTC)2(H2O)·7H2O (2) {L = 4‐[4‐(1H‐imidazol‐1‐yl)phenyl]‐2,6‐di(pyridin‐4‐yl)pyridine, H2L1 = 2,5‐bis(3′‐carboxylphenyl)pyridine, H3BTC = 1,3,5‐benzenetricarboxylic acid} were synthesized and structurally characterized by single‐crystal X‐ray diffraction. Complex 1 displays a two‐nodal (3,7)‐connected 3D architecture with a novel (4.62)(48.610.83) topology, in which a Cd3 unit with a Cd···Cd separation of 3.5 Å is observed. Complex 2 possesses two kinds of Zn2 units, and it shows a (3,4,7)‐connected 3D architecture with a novel (4.62)6(43.66.811.10)2(64.82) topology. Complexes 1 and 2 both exhibit quasireversible redox properties, and a photocurrent could be produced on the two complexes upon visible‐light illumination (650 nm > λ > 350 nm). However, different photocurrent responses were observed on the two complexes, and complex 1 yielded a photocurrent density that was higher than that of the bare Si wafer and complex 2, probably because of different charge‐transfer impedances at the interfaces and charge‐carrier concentrations in the photoelectrodes.

Improvement of Triboelectric Efficiency using SnO2 Friction Layer for Triboelectric Generator

The triboelectric property of a material is important to improve an efficiency of triboelectric generator (TEG) in energy harvesting from an ambient energy. In this study, we have studied the TEG property of a semiconducting which has yet to be explored so far. As a counter triboelectric material, PET and glass are used. Vertical contact mode is utilized to evaluate the TEG efficiency. thin film is deposited by atomic layer deposition on bare Si wafer for various thicknesses from 5.2 nm to 34.6 nm, where the TEG output is increased from 13.9V to 73.5V. Triboelectric series are determined by comparing the polarity of output voltage of 2 samples among , PET, and glass. In conclusion, , as an intrinsic n-type material, has the most strong tendency to be positive side to lose the electron and PET has the most strong tendency to be negative side to get the electron, and glass to be between them. Therefore, the -PET combination shows the highest TEG efficiency.

A multijunction of ZnIn2S4 nanosheet/TiO2 film/Si nanowire for significant performance enhancement of water splitting

Photoelectrodes with a specific structure and composition have been proposed for improving the efficiency of solar water splitting. Here, a novel multijunction structure was fabricated, with Si nanowires as cores, ZnIn2S4 nanosheets as branches, and TiO2 films as sandwiched layers. This junction exhibited a superior photoelectrochemical performance with a maximum photoconversion efficiency of 0.51%, which is 795 and 64 times higher than that of a bare Si wafer and nanowires, respectively. The large enhancement was attributed to the effective electron–hole separation and fast excited carrier transport within the multijunctions resulting from their favorable energy band alignments with water redox potentials, and to the enlarged contact area for facilitating the electron transfer at the multijunction/electrolyte interface.