Bandwidth Power Amplifier Research Articles

Design of Broadband Highly Efficient Power Amplifier Based on Low‐Pass Filtering Network With Periodic Structure

ABSTRACTIn this paper, a broadband high‐efficiency power amplifier (PA) is designed by using an easily implementable low‐pass filtering network with periodic structure as the output matching circuit to achieve bandwidth expansion of the PA. The proposed periodic structure is based on right‐handed T‐type basic cells, which can achieve wideband filtering responses. In addition, the load design space of the extended continuous Class‐F mode is combined as the target impedance to achieve an efficiency improvement in bandwidth PAs. For verification, a broadband highly efficient PA across 0.6–3.6 GHz with a relative bandwidth of 143% is designed, fabricated, and measured. The test results have shown a drain efficiency of 60.8%–70.4% and gain of 8.5–11.9 dB with a saturation output power under 3‐dB gain compression of 38.5–41.9 dBm.

Ultra-Wideband Transformer Feedback Monolithic Microwave Integrated Circuit Power Amplifier Design on 0.25 μm GaN Process.

This paper presents an ultra-wideband transformer feedback (TFB) monolithic microwave integrated circuit (MMIC) power amplifier (PA) developed using a 0.25 μm gallium nitride (GaN) process. To broaden the bandwidth, a drain-to-gate TFB technique is employed in this PA design, achieving a 117% relative -3 dB bandwidth, extending from 5.4 GHz to 20.3 GHz. At a 28 V supply, the designed PA circuit achieves an output power of 25.5 dBm and a 14 dB small-signal gain in the frequency range of 6 to 19 GHz. Within the 6 to 19 GHz frequency range, the small-signal gain exhibits a flatness of less than 0.78 dB. The PA chip occupies an area of 1.571 mm2. This work is the first to design a power amplifier with on-chip transformer feedback in a compound semiconductor MMIC process, and it enables the use of the widest bandwidth power amplifier on-chip transformer matching network.

High Gain Broadband Power Amplifier Design Based on Integrated Diplexing Networks

This letter presents an enhanced gain broadband power amplifier (PA) design approach that is based on using an integrated diplexer with a phase compensation network to combine PAs of narrower bandwidths (BWs) over a wider overall bandwidth PA. The input and output matching networks of each amplifier are individually synthesized using a wideband matching network. The diplexer is designed using a lowpass/highpass topology approach. The separate amplifiers are integrated with the proposed diplexer, resulting in extended bandwidth and enhanced gain. For verification purposes, a broadband PA is designed and implemented over the frequency range of 2–4 GHz. Measurements demonstrate that the output power varies between 40.1 and 41.2 dBm with a drain efficiency (DE) of 61%–75%. The proposed design achieves a high small-signal gain of 12.5–15.3 dB. The reported saturated power gain is 10.1–11.2 dB.

Design of a multi‐octave power amplifier using broadband load‐pull X‐parameters

AbstractThe design of a multi‐octave power amplifier (PA) based on a broadband load‐pull X‐parameter model is described for the first time in this work. A 10‐W GaN package transistor is employed for model X‐parameter model extraction. Once the model is extracted, it is compared with the equivalent circuit model provided from the device manufacturer, and it is found that the X‐parameter model accuracy is comparable to that of the original circuit model. In particular, the X‐parameter model can accurately determine the areas of the load Smith chart leading to optimal output power and drain efficiency, essential considerations for extracting maximum device performance. A Chebyshev low‐pass architecture is utilized for both the input and the output matching network designs. Finally, a multi‐octave bandwidth PA, from 0.6 to 2.3 GHz, is designed. Simulation results of the broadband X‐parameter model and the measured results of the realized PA are compared, with a high fidelity match evident, thus demonstrating the efficacy of the design procedure of multi‐octave PA with broadband X‐parameters. The output power of the realized PA across the operating frequency band remains between 39.51 and 42.41 dBm, while the drain efficiency remains above 60%, reaching as high as 73% around 2 GHz. The gain of the PA is greater than 11 dB over the complete frequency band.

Practical Estimation of Accuracy in Power Hardware-in-the-Loop Simulation Using Impedance Measurements

Power hardware-in-the-loop (PHIL) simulation is a technique whereby actual power hardware is interfaced to a virtual surrounding system, simulated in real-time, through PHIL interfaces making use of power amplifiers and/or actuators. While PHIL simulation affords many advantages for flexible testing of power hardware, the accuracy of the experiment can be degraded through the non-ideal aspects of the PHIL interface, including distortion in the frequency domain, delays, and disturbances. This paper presents a practical method to estimate a subset of the closed-loop transfer function accuracy metrics of a PHIL experiment based on impedance measurements from the experiment. The method of assessing the impacts of the PHIL interfaces is demonstrated through application to an experiment in which two simulated systems are coupled through two PHIL interfaces with high bandwidth power amplifiers, enabling comparison of results with those from the ideal system.

A 20-GHz Bandwidth Power Amplifier for Phased Array 5G New Radio Transmitters

A 27–47-GHz differential cascode power amplifier for millimeter-wave 5G new radio applications is presented. The PA is a three-stage design using inductively coupled impedance transformers with 31-dB nominal power gain. A device periphery ratio of 1:2:6 is adopted for predriver, driver, and final stage, respectively. A gain equalization technique was used in the interstage transformers to obtain the required bandwidth with high gain flatness. To enable the use of 2.7-V supply, a cascode topology was employed in all three stages. A small signal gain of 31 dB was achieved with a 3-dB bandwidth of 20 GHz, equivalent to a 54% fractional bandwidth centered at 37 GHz. A saturated output power of 20.6 dBm was measured at 38.5 GHz. With a 100-MHz 64-QAM OFDM modulated signal at 37 GHz and at EVM = −25 dB, an output power of 11.6 dBm and an ACLR1 of −32/−30.8 dBc were obtained. An SiGe HBT BiCMOS process with $f_{\mathrm{ MAX}} = 330$ GHz was used for fabrication. The PA has an active area of 0.28 mm2 and is measured to a best in class FOM of 94.7 dB.

Design of multioctave power amplifiers based on high order resistive‐reactive series of continuous modes

AbstractIn this article, the high order resistive‐reactive series of continuous modes (H‐R‐R‐SCMs) approach is presented to design multioctave bandwidth power amplifiers (PAs). By introducing the high order resistive term, the ranges of the second harmonic impedances are expanded, which will be very effective for designing the multioctave bandwidth PAs. Based on the proposed method, a broadband high‐efficiency PA working from 0.5 to 3.1 GHz (144% relative bandwidth) is designed. According to the measured results, the PA achieves 12.0–14.3 dB power gain and 12.6–21.4 W output saturation power in the operation band. The drain efficiency varies from 56.3 to 76.6% over the whole multioctave bandwidth.

Design of Multioctave Bandwidth Power Amplifier Based on Resistive Second-Harmonic Impedance Continuous Class-F

In this letter, a generic method is presented for multioctave power amplifier (PA) based on extended version of the continuous class-F. The theory allows resistive second-harmonic impedance and sacrifices part of efficiency to get a bandwidth over one octave. A high-voltage GaN HEMT is adopted to achieve high output power and drain efficiency. Finally, a 0.2–2.5 GHz miniature multioctave PA is designed and fabricated. Experimental results show the drain efficiency of 55.5%–70.3% and the output power of 43.7–46.9 dBm across 0.2–2.5 GHz (170%). The compact size of the proposed PA can also be observed with only 2.6 cm $\times5.5$ cm, which is greatly reduced compared with other PAs with similar performances.

A Novel Design Approach for Highly Efficient Multioctave Bandwidth GaN Power Amplifiers

This letter presents a novel approach to design highly efficient multioctave bandwidth power amplifiers (PAs). The fundamental load impedances are slightly detuned out of their optimum values to reduce the in-band harmonics influence on output power and power-added efficiency. The design of the output matching network includes a 4:1 planar Guanella transformer for wide bandwidth and low complexity. In the frequency band 0.5–2.7 GHz, the PA achieves 9.2 ± 1.2 dB power gain and more than 20-W output power. The drain efficiency varies from 56% to 70% over the bandwidth.

Wide-Bandwidth Power-Combining and Inverse Class-F GaN Power Amplifier at $X$-Band

In this paper, we present a wide bandwidth power amplifier (PA) utilizing a Marchand balun to achieve power combining and inverse class-F (class-F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> ) matching. We have used a 4-to-1 balun and its out-of-band characteristics to achieve matching at the second and third harmonic for differential class-F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> operation. Thus, the balun simultaneously acts as a combiner and harmonic matching network. The experimental results demonstrate that the prototype PA achieves an output power of 41.5 dBm at the 1-dB compression point (P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1 dB</sub> ), power-added efficiency of 55%, and gain of 10 dB over a fractional bandwidth of 40% from 8 to 12 GHz. Due to the differential operation, the class-F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> PA has also achieved a measured second harmonic distortion of -50 dBc.