Bandgap Reference Generator Research Articles

Segment-compensated Bandgap Reference Generator with Low-temperature Drift

Abstract In this paper, a segment-compensated low-temperature-drift bandgap reference generator is proposed and designed to get the high-order nonlinear temperature characteristics for the bandgap reference circuit. Based on the Nuvoton 0.35 μm BCD process, the circuit is simulated and analyzed. The result is that a temperature coefficient of 1.12 ppm/℃ over the range of -40℃ to 125℃ is obtained, which is much lower than the 6.88 ppm/℃ before compensation. It is demonstrated that the power supply rejection ratio is 141.3 dB at 1, 000 HZ, low-frequency open-loop gain is 75 dB, and a phase margin is 57°.

A CMOS Band Gap Reference Generator for Low Voltage Supply with High SNR the Application of a (-ve) Feedback Loop

A CMOS Band Gap Reference Generator for Low Voltage Supply with High SNR the Application of a (-ve) Feedback Loop

A CMOS Band Gap Reference Generator for low voltage supply and for constant gain with the application of a (-ve) feedback loop.

A CMOS Band Gap Reference Generator for low voltage supply and for constant gain with the application of a (-ve) feedback loop.

A CMOS Band Gap Reference Generator for Low Voltage Supply with Reduced Psrr with the Application of A (-ve) Feedback Loop

A CMOS Band Gap Reference Generator for Low Voltage Supply with Reduced Psrr with the Application of A (-ve) Feedback Loop

A CMOS Band Gap Reference Generator for Low Voltage Amplification with the Application of a (-Ve) Feedback Loop

We all know that the basic building block of any communication system is the reference voltage generator. The objective of reference generation is to establish a DC voltage or current that is independent of the supply and process and has a well-defined behavior with temperature. Band Gap Reference (BGR) is one of the most popular reference generators. In the conventional BGR circuit, the reference voltage Vref is the summation of thermal voltage VT and the base to emitter voltage of a transistor (Vf).The thermal voltage VT has a (+Ve) temperature coefficient (TC), whereas Vf has a (-Ve) temperature coefficient (TC).So BGR is independent of temperature .The traditional BGR circuit generates a reference voltage about 1.12V.So this circuit limits a low supplyvoltage operation below 1v. In this paper a new BGR circuit in 0.25μm iCMOS technology, and a new BGR in BiCMOS technology is proposed which are containing a extra (-ve) feedback loop to get very low reference voltage as well as to stabilize this reference voltage even when it is operating below 1v supply. The TC of this reference generator is getting even zero by applying a (-ve) feedback loop. For a temperature variation between -40 C and 100 C,the BGR of CMOS technology, and for a temperature variation between 40 C and 60 C, the BGR of BiCMOS technology, the produced reference voltages are absolutely independent of temperature variation together with the capability of operating at very low supply voltage (less than 1V).

A Novel Wide-Temperature-Range, 3.9 ppm/$^{\circ}$C CMOS Bandgap Reference Circuit

This paper presents an innovative CMOS Bandgap Reference Generator topology that leads to an improved curvature compensation method over a very wide temperature range. The proposed design was implemented in a standard 0.35 μm CMOS process. The compensation is performed by using only poly-silicon resistors. This is achieved by using a second Op-amp that generates a CTAT current, which is subsequently used to enhance the curvature compensation method. The performance of the circuit was verified experimentally. Measured results have shown temperature coefficients as low as 3.9 ppm/°C over a temperature range of 165°C ( -15°C to 150°C ) and temperature coefficients as low as 13.7 ppm/°C over an extended temperature range of 200°C (-50°C to 150°C ). In addition the circuit demonstrated very good line regulation performance for a broad range of supply voltages. The measured line regulation at room temperature is 0.039% V.

Characterization of Si-PIN radiation detector with photon counting mode CMOS readout front-end

An X-ray pixel detector with photon counting technique for digital X-ray imaging was designed and developed. Si detector was fabricated starting from 5 in., FZ-refined, 620 μm-thick, 〈1 1 1〉 oriented, n-typed silicon wafer with high resistivity of 6000–12,000 Ω cm. Readout front-end, which consists of the preamplifier, comparator, and bias circuits including the band-gap reference circuits, was designed and fabricated using 0.25 μm-triple-well CMOS standard process. In detector, the several types of guard-ring structures were tested. The biased p-type guard ring showed more reasonable results in the leakage current and breakdown voltage. The experimental results for the readout chip prove that its functionality is correctly operated up to 100 mV, 2.5 M events/s. In radiation experiment under irradiation of 60Co at dose rate 10 krad/h the measurement indicate that the band gap reference generator (BGR) circuits work up to 240 krad and the maximum variation of output voltage is 0.4% (peak-to-peak) of operational voltage at the range of 0–240 krad. It cannot lead to any critical problem for use in its operation.

A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques

A temperature-compensation circuit technique for a dynamic random-access memory (DRAM) with an on-chip voltage limiter is evaluated using a 1-Mb BiCMOS DRAM. It was found that a BiCMOS bandgap reference generator scheme yields an internal voltage immune from temperature and V/sub cc/ variation. Also, bipolar-transistor-oriented memory circuits, such as a static BiCMOS word driver, improve delay time at high temperatures. Furthermore, the BiCMOS driver proves to have better temperature characteristics than the CMOS driver. Finally, a 1-Mb BiCMOS DRAM using the proposed technique was found to have better temperature characteristics than the 1-Mb CMOS DRAM which uses similar techniques, as was expected. Thus, BiCMOS DRAMs have improved access time at high temperatures compared with CMOS DRAMs. >