Back-illuminated CMOS Image Sensor Research Articles

Performance verification of next-generation Si CMOS soft X-ray detector for space applications

All-sky surveys of X-ray transient objects in the soft X-ray band are essential for observing high-redshift events to probe unexplored physical conditions in the early universe and discovering mysterious electromagnetic counterparts of gravitational-wave sources. HiZ-GUNDAM is a future satellite mission that intends to perform a wide-field survey in the soft X-ray band (0.4–4 keV). The HiZ-GUNDAM X-ray detector has Si pixel sensors that require fine positioning accuracy (e.g. tens of micrometers), high detection efficiency, a large detection area (tens of cm2) and, a relatively high frame rate of ∼10 frames per second that can be achieved by a back-illuminated Si CMOS image sensor. One of the most promising candidates is GSENSE6060BSI with 6144 × 6144 pixels fabricated by Gpixel Inc. In this paper, for the initial performance test, we used a smaller-sized CMOS sensor, GSENSE400BSI-TVISB, which is similar to GSENSE6060BSI in terms of pixel characteristics, such as pixel size, epilayer thickness, and resistivity, except for the number of pixels (2048 × 2048). We conducted a detailed study on the spectroscopic performance of GSENSE400BSI-TVISB in the soft X-ray band and its radiation tolerance for space applications. For the spectroscopic performance, low-energy X-ray lines such as Al-Kα (1.5 keV), Mn-Kα (5.9 keV), and Mn-Kβ (6.5 keV) were clearly detected. Furthermore, using the obtained X-ray events, we estimated >50% detection efficiency in the 0.4–4 keV band, corresponding to a ∼10-μm Si thickness of the detectable layer. We also performed radiation tolerance tests against gamma rays from 60Co, 100-MeV protons and 5.5-MeV alpha rays (5–30 krad, corresponding to 6–30 year operation in orbit). After the irradiation tests, we observed that GSENSE400BSI-TVISB has strong radiation tolerance for our purpose: the lower detectable energy of ∼0.4 keV can be obtained if the CMOS is operated with an exposure of 0.1 s at −20 °C.

Smartphone imaging of subcutaneous veins

The identification of veins by medical personnel is a critical skill that is necessary to draw blood or administer intravenous fluids and medications. Because a normal consumer camera can act as a multispectral imaging apparatus, operating with three broadband detectors, we hypothesized that a standard smartphone camera might be employed for enhanced visualization of veins in human skin. Video and images of subcutaneous veins were acquired using the rear-facing iSight camera from an iPhone 6, with a fixed aperture of f/2.2, and Sony Exmor RS back-illuminated CMOS image sensor with pixel generation of 1.5 microns. A custom program was written for the iOS operating system that performs a scaled matrix subtraction of different spectral channels and displays results as a grayscale image. A scaled subtraction of green channel pixel values from red channel pixel values enabled greatly improved identification of subcutaneous veins. Wavelengths of light at which the green detector is most sensitive (520-580 nm) correspond to local absorption maxima of both oxyhemoglobin (542 and 576 nm) and deoxyhemoglobin (556 nm); consequently, the algorithm obtained images of light transport weighted toward deeper skin layers. We identified and developed a simple algorithm by which a standard smartphone camera can be employed for enhanced video-rate visualization of veins in human skin. Lasers Surg. Med. 50:1034-1039, 2018. © 2018 Wiley Periodicals, Inc.

IR sensitivity enhancement of CMOS Image Sensor with diffractive light trapping pixels

We report on the IR sensitivity enhancement of back-illuminated CMOS Image Sensor (BI-CIS) with 2-dimensional diffractive inverted pyramid array structure (IPA) on crystalline silicon (c-Si) and deep trench isolation (DTI). FDTD simulations of semi-infinite thick c-Si having 2D IPAs on its surface whose pitches over 400 nm shows more than 30% improvement of light absorption at λ = 850 nm and the maximum enhancement of 43% with the 540 nm pitch at the wavelength is confirmed. A prototype BI-CIS sample with pixel size of 1.2 μm square containing 400 nm pitch IPAs shows 80% sensitivity enhancement at λ = 850 nm compared to the reference sample with flat surface. This is due to diffraction with the IPA and total reflection at the pixel boundary. The NIR images taken by the demo camera equip with a C-mount lens show 75% sensitivity enhancement in the λ = 700–1200 nm wavelength range with negligible spatial resolution degradation. Light trapping CIS pixel technology promises to improve NIR sensitivity and appears to be applicable to many different image sensor applications including security camera, personal authentication, and range finding Time-of-Flight camera with IR illuminations.

Noise reduction effect and analysis through serial multiple sampling in a CMOS image sensor with floating diffusion boost-driving

We have developed a 1/2.3-in. 10.3 mega pixel back-illuminated CMOS image sensor utilizing serial multiple sampling. This sensor achieves an RMS random noise of 1.3e− and row temporal noise (RTN) of 0.19e−. Serial multiple sampling is realized with a column inline averaging technique without the need for additional processing circuitry. Pixel readout is accomplished utilizing a 4-shared-pixel floating diffusion (FD) boost-driving architecture. RTN caused by column parallel readout was analyzed considering the transfer function at the system level and the developed model was verified by measurement data taken at each sampling time. This model demonstrates the RTN improvement of −1.6 dB in a parallel multiple readout architecture.

Paper] A 1/1.7-inch 20Mpixel Back-Illuminated Stacked CMOS Image Sensor with Multi-Functional Modes

Paper] A 1/1.7-inch 20Mpixel Back-Illuminated Stacked CMOS Image Sensor with Multi-Functional Modes

高速・高画質・高機能を実現する1/1.7型2000万画素積層型CMOSイメージセンサ(固体撮像技術および一般)

高速・高画質・高機能を実現する1/1.7型2000万画素積層型CMOSイメージセンサ(固体撮像技術および一般)

The Impacts of Back-Surface Passivation Using Shallow Ion Implantation and Pulsed Laser Thermal Annealing on Back-Illuminated CMOS Image Sensors Performances: Physical and Electrical Characterizations

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The Study of New Trend for DSC Scene Effects Technology

Since early 2007, many ambitious DSC manufactures in Japan have paid special attention for built in digital effects, in order to create better quality of picture, such as: Face Detection, Smile Shutter Mode, Full frame CCD, Anti Shake system, Live View, CMOS sensor..., which were highly appreciated by many photo fans around the world, and created hot-selling record on favorite model. In fact, these fancy “Digital Technologies” could be standardized in selected new cameras right now. In late 2009, new artificial intelligence image chips such as: back-illuminated CMOS image sensor, 30x Optical Zoom (or more), Full HD Video, Sweep Panorama, Interchangeable Unit Camera System,Super High Speed ISO, Super Steady, Motion Remover.., have been promoted in new generation of camera. It could change not only the performance of new camera (DSC/DC) but to challenge the current DV market seriously, and may inspire new record-high selling again. In our experiment, we collect more than 300 cases from the telephone survey during Sep, 2010 and Dec, 2010. Total of 220 cases comply with the conditions. To probe mainly into the relationship between new generation DC Confidence level and 3 potential customers: Amateur Photographer (AP), Senior Photographer (SP), and college student (CS). That is the reason what we are probe into this highly competitively market with brilliant creative design, and hope to offer an objective suggestion for both industry and education administers.

Investigation of a Sequential Three-Dimensional Process for Back-Illuminated CMOS Image Sensors With Miniaturized Pixels

A new 3-D CMOS image sensor architecture is presented as a potential candidate for submicrometer pixels. To overcome the scaling challenge related to miniaturized pixel design rules, far beyond traditional 3-D stacking alignment capabilities, a sequential construction is applied. This paper gives a technical overview of this 3-D scheme and validates a part of its building blocks. As a consequence of a sequential process, the thermal budget is limited to ensure bottom device immunity. Subsequently, high-quality SOI film transfer above the first layer by direct bonding and etch back is demonstrated. Finally, the low-temperature processing of HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /TiN fully depleted silicon-on-insulator readout transistors is detailed and evaluated from a low frequency noise point of view.