Average Drain Efficiency Research Articles

A Broadband Three-Way Series Doherty Power Amplifier with Deep Power Back-Off Efficiency Enhancement for 5G Application

This article presents a new broadband three-way series Doherty power amplifier (DPA) topology, which enables a broadband output power back-off (OBO) efficiency enhancement of up to 10 dB or higher. The proposed DPA topology achieves Doherty load modulation and three-way power combining through a transformer, which requires only a low coupling factor, thus facilitating its implementation in double-sided PCBs or monolithic microwave integrated circuit (MMIC) processes. The design equations for the proposed DPA topology are proposed and analyzed in detail. A proof-of-concept PA at the 2.1–2.8 GHz band using commercial GaN transistors was designed and fabricated to validate the proposed concept. Within the operating frequency band, it achieves a saturated output power (Psat) of 44.5–46.5 dBm with a peak drain efficiency (DE) of 60–72%, and 43–52% DE at 10 dB OBO. Moreover, under a 20 MHz long-term evolution (LTE)-modulated signal, the PA demonstrates a 36.8–37.5 dBm average output power (Pavg) and 47–53% average drain efficiency (DEavg). Notably, the adjacent channel leakage ratio (ACLR) is as low as −35–−28.2 dBc without any digital predistortion (DPD).

A new approach for ultra-wideband continuous class B/J power amplifier design and fabrication based on increasing efficiency in power loss-less case

A new theoretical approach to designing an ultra-wideband continuous class B/J power amplifier is presented. In the conventional design of continuous class J, the maximum accessible bandwidth is limited to one octave, which is equivalent to 66 % fractional bandwidth. In this paper, it will be shown by reforming the voltage expression of resistive-reactive class J, high efficiency continuous class B/J power amplifier design can be realized sothat the output power level maintains across more than one octave. Using a new defined correction factor in the output voltage of resistive-reactive class J while the third harmonic element with a proper coefficient is added to it, not only could help to decrease the compromise between the design space and efficiency but also improve the PA output power than conventional one. To check the feasibility of the suggested approach and validate the theoretical and simulation results, a broadband PA using CGH40010F GaN transistor in 0.5–2 GHz is designed and fabricated on RO4003c substrate with 20 mil thickness. The measured 39.8–42.2 dBm output power with 63.68 % average drain efficiency over more than 120 % fractional bandwidth confirmed both the theoretical and simulation results.

Dual-Band Dual-Output Four-Way Doherty Power Amplifier for Unsynchronized Time-Division Duplexing

This article proposes a dual-input dual-output dual-band four-way Doherty power amplifier (DPA) architecture, capable of linearized operation at one frequency band without being disturbed by arbitrary load switching at the other frequency band. The proposed technique is demonstrated through the design, implementation, and measurement of a prototype circuit operating at 1.85-and 2.65-GHz bands with 70-MHz bandwidth for each band. The prototype dual-band DPA (DB-DPA) achieves a peak output power of 49.1 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm$</tex-math> </inline-formula> 0.2 dBm for the 1.85-GHz band and 49.3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm$</tex-math> </inline-formula> 0.5 dBm for the 2.65-GHz band. Furthermore, the measured drain efficiency at 9-dB power back-off (PBO) is 59%–64% and 60%–65% for the 1.85-and 2.65-GHz bands, respectively. Concurrent dual-band performance, dynamic power sharing capability, and utility of the proposed DB-DPA in unsynchronized time-division duplexing (TDD) applications are demonstrated by using 20-MHz new radio (NR) signals with 9-dB peak-to-average power ratio (PAPR). For an average output power of 39 dBm per band, the concurrent dual-band measurement yields 49% average drain efficiency and better than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 48-dBc adjacent channel leakage ratio (ACLR).

Design of High-efficiency Continuous Class F Doherty Power Amplifier

The high efficiency of the saturation state and rollback state is an important part of the front end of modern wireless communication systems. Improving the efficiency of RF power amplifiers is of great significance for energy saving and amplifier performance. Based on the traditional Doherty power amplifier, the harmonic suppression network is introduced before the fundamental frequency matching, so that the second harmonic impedance and third harmonic impedance can achieve continuous class F impedance matching conditions, and then the saturation efficiency and regression efficiency can be improved without affecting the fundamental wave matching. The results of the simulation show that the saturation efficiency of the Doherty amplifier reaches 73.94%~77.22%. The drain efficiency of back-off 6 dB reaches 61.80%~62.92%. The average saturation drain efficiency is 75.58%, and the average back-off 6 dB drain efficiency is 62.36%.

Techniques for Adaptive Input-Power Distribution in Doherty Power Amplifier and Load Modulation of Its Driver-Stage Power Amplifier

Techniques for adaptive input-power distribution in Doherty power amplifier (DPA) with the modified Wilkinson power divider and load modulation of its driver-stage PA are described. Combination of these techniques improves the linearity and efficiency of the two-stage PA with DPA as a final stage. Both the techniques leverage the nonlinearity of the input impedance of the auxiliary power amplifier in the DPA. The first technique is applied to a 3.5-GHz 32-W single-stage DPA using GaN high electron mobility transistor (HEMT) devices. Evaluation results showed that by using the technique, adjacent channel leakage ratio (ACLR) improvement of 9 dB was obtained under 8.5-dB peak to average power ratio (PAPR) 10-MHz long-term evolution (LTE) signal without digital predistortion (DPD), and the demonstrator achieved an average drain efficiency (DE) of 55% and ACLR of −50 dBc with DPD. Using the same DPA as a final stage, a two-stage PA was also designed and fabricated to verify the second technique. Due to the load modulation of the driver stage PA, efficiency improvement of 2.6% for the two-stage power added efficiency (PAE) is confirmed by simulation, and the demonstrator achieved a two-stage PAE of 45.4% under 8.5-dB PAPR 20-MHz LTE signal with ACLR of −50 dBc with DPD.

Load-Modulating Loop Combiner for Linear Power Amplification

This work presents a novel power amplifier (PA) architecture employing a feedforward-like loop structure for the linearization of a load-modulated PA. The load-modulating loop combiner (LMLC) is related to a feedforward amplifier, but with the interaction between the main and auxiliary amplifiers to generate both distortion cancellation and load modulation. A brief overview of the underlying theory is presented, followed by a hardware demonstrator operating at 3.5 GHz with 42-dBm peak output power and 55% peak drain efficiency in CW. When excited by a 100-MHz LTE signal, it maintains a 3-ppt EVM improvement and a 2–5-ppt average drain efficiency improvement compared to its standalone main amplifier.

A new design for mode transfer-based harmonic tuned power amplifier (MHPA)

Available onlineThis paper presents the design, implementation and measurement results for a 0.8–2.1 GHz Mode transfer-based Harmonic tuned Power Amplifier (MHPA). The design based on a new combination of the hybrid modes. The proposed design approach uses the mode transfer technique to combine two harmonic tuned power amplifier modes, i.e., classes F3 and F3-1, in order to obtain a broadband hybrid mode PA. First, theoretical limitations of maximum attainable Fractional Bandwidth (FBW) in a single mode harmonic tuned PA (HTPA) are investigated where we have n harmonic impedances and there is no overlapping between harmonics. Then, mode transfer technique is applied to overcome bandwidth restriction of F3 and F3-1 modes of HTPA. As a result, the maximum FBW in a single mode HTPA with 3 harmonic impedances is improved from 40 % to 66 % (equivalent to one octave) when it being used in a hybrid structure. To evaluate the proposed design approach, a broadband PA, which is working at one octave bandwidth (1–2 GHz), is designed and fabricated. Performance of the designed MHPA is acceptable at the 0.8–2.1 GHz frequency band. Experimental results show that the designed MHPA achieves 89.9 % maximum and 76.3 % average drain efficiency in the 0.8–2.1 GHz frequency band.

High‐efficiency broadband power amplifier design via ideal de‐embedding and direct compensation of GaN‐HEMTs parasitics

In this work, a design approach for broadband high-efficiency power amplifiers is presented. The proposed technique is based on deductive de-embedding of the nonlinear parasitics of packaged GaN-HEMT devices. A new transistor parasitics equivalent network is proposed that utilises a model-based extraction flow. A simple two-element compensation network is then used to accurately compensate the extracted nonlinear device parasitics; this enables optimum load resistance to be presented to the device current generator using a real-to-real matching network. In order to validate the proposed concept, a single-ended Class-AB power amplifier is designed and fabricated using a Wolfspeed 25-W GaN HEMT ‘CGH40025F’ transistor. At a centre frequency of 2.35 GHz, a fractional bandwidth of 55% is achieved. The measured average drain efficiency and power gain of the designed power amplifier are 71% and 10.4 dB, respectively.

CW and Modulated Input Second Harmonic Injection for Efficiency Enhancement in Broadband Power Amplifiers

The second-harmonic input impedance plays a critical role on the performance of GaN power amplifiers. In a recent paper, a drain efficiency enhancement for a continuous-mode power amplifiers was reported to be achieved using active broadband second-harmonic injection at the PA input. In this paper, the strategy for selecting the second-harmonic input impedance and the necessity for using active injection in such broadband PAs are discussed in detail. Additionally, the methodology for designing an embedded broadband diplexer in the input matching network is reported. Finally, the importance of the phase of the second-harmonic signal injected is demonstrated for both CW and modulated signals using both simulation and measurement, respectively. The effectiveness of the CW and modulated active second-harmonic injection methodology presented here are validated by previously reported measurements that demonstrated an average drain efficiency improvement of 9.4% from 1.3 to 2.4 GHz for CW signals and of 9.7% at 2 GHz for a frequency-modulated 30 MHz chirp radar signal.

A Novel 3-Way Dual-Band Doherty Power Amplifier for Enhanced Concurrent Operation

This article presents the architecture and design methodology for a new type of dual-band Doherty power amplifier (DB-DPA), referred to as 3-Way DB-DPA, which consists of a main amplifier for each band and an auxiliary amplifier handling both bands. The 3-Way DB-DPA improves the average drain efficiency in concurrent dual-band operation compared to the traditional 2-Way DB-DPA, by avoiding early clipping in the main amplifiers, while benefiting from load—pulling from the auxiliary power amplifier (PA). This improvement is verified in theory and simulation at the current-source reference planes and in measurement with a fabricated 1.5- and 2-GHz dual-band PA. A statistical analysis using 2-D continuous-wave (CW) signals with long-term evolution (LTE) probability distribution functions (PDFs) is performed and demonstrated an improvement in the concurrent average efficiency by 15 percentage points compared to the conventional 2-Way DB-DPA. In nonconcurrent operation, the measured CW drain efficiency in the lower band (1.5 GHz) is 82.8% at peak and 66.6% at 9.6-dB backoff, and the measured CW drain efficiency in the upper band (2.0 GHz) is 70.0% at peak and 48.4% at 9.4-dB backoff. The CW concurrent-balanced drain efficiency reaches 66.2/52.0% in the 3-Way DB-DPA at 3-/6-dB backoff. In single-band operation at 1.5/2.0 GHz, the average power and average drain efficiency after linearization by digital predistortion (DPD) are 35.1/37.4 dBm and 65.0/53.7%, respectively, for an LTE signal with 10-MHz bandwidth and 6.1-dB peak-to-average power ratio (PAPR). In concurrent operation, the 3-Way DB-DPA is driven by two 10-MHz LTE uncorrelated signals at 1.5 GHz with 6.86-dB PAPR and at 2.0 GHz with 6.26-dB PAPR, and the average total power and average concurrent drain efficiency after DPD are 37.5 dBm and 54.24%, respectively.

Simulated Annealing Particle Swarm Optimization for High-Efficiency Power Amplifier Design

In this article, a method for design automation high-efficiency power amplifiers (PAs) based on an optimization-oriented is proposed. The advantages of using particle swarm optimization to design PAs in electronic design automatic tools are analyzed, and then, simulated annealing is combined to form simulated annealing particle swarm optimization (SA-PSO). In this article, the perfectly inelastic collision used in conventional PSO is replaced by the perfectly elastic collision to improve the searching ability through reducing kinetic energy consumption. A stepped fitness function is defined to avoid the performance pit at a single-frequency point, and the concept “missing and returning” is introduced to solve the nonconvergence problem in simulation. Based on the improved SA-PSO algorithm, a broadband 10 W and a triband 6-W PA are designed. The broadband 10-W PA achieves an average drain efficiency (DE) of 62.5% and an output power of 41.2 dBm in the 0.8-3-GHz frequency band, respectively; the triband 6-W PA achieves an average of 57.4%/47.9%/47.3% DE and 37.7-/38.3-/37.4 dBm output power in 3.35-3.55-/5.75-5.95-/7.65-7.95-GHz frequency bands, respectively, while the gains of most stopbands reach less than 0 dB. With digital predistortion technology, the adjacent channel power ratio (ACPR) can reach less than -45 dBc.

Enhancing Bandwidth and Back-Off Range of Doherty Power Amplifier With Modified Load Modulation Network

This article presents a novel methodology for designing a broadband Doherty power amplifier (DPA) with extended output power back-off (OBO) range. A modified load modulation network (LMN) is proposed to enhance the OBO range and the bandwidth of the DPA simultaneously. Analysis is conducted to explore the relationship between the proposed LMN parameters and the broadband performance under various OBO levels. Generalized design formulas of the LMN parameters are then introduced to offer the broadband solution for arbitrary current ratios and OBO levels. An asymmetric DPA is demonstrated and implemented with gallium nitride (GaN) transistors using the proposed approach. The fabricated DPA operates from 1.4 to 2.5 GHz with 9-dB OBO range. The measured drain efficiency reaches 61%-75.5% at saturation and 44.6%-54.6% at 9-dB OBO within the operating bandwidth. When driven by a 60-MHz modulated signal with 9-dB peak-to-average power ratio (PAPR), the fabricated DPA attains 47.4%-53.5% average drain efficiency and better than -45.5-dBc adjacent channel leakage ratio (ACLR) after digital predistortion.

Wideband Two-Way Hybrid Doherty Outphasing Power Amplifier

A new type of wideband dual-input hybrid Doherty outphasing power amplifier (HDO-PA) is developed in which the load-modulation scheme continuously converts as the frequency increase, from the previously reported HDO-PA mode with maximum flat efficiency response versus power to the conventional Doherty PA mode. For a symmetric HDO-PA implementation, this corresponds to the peak-to-backoff fundamental voltage ratio of the auxiliary amplifier linearly varying from 9/7 to 2 with frequency. A transmission-line-based wideband HDO-PA prototype is first established at the current-source reference planes to cover the frequency band from 1.4-GHz to 2.5-GHz. The wideband HDO-PA is implemented next at the package reference planes by synthesizing the wideband combiner circuit required to sustain the intrinsic load-modulation behavior across the entire frequency bandwidth. A 1.4-GHz to 2.5-GHz wideband HDO-PA is fabricated and characterized using both continuous-wave and modulated signals. The 6-dB backoff efficiency varies from 60% to 44% and the maximum power from 44.8 dBm to 42.9 dBm as the frequency increases. When the PA is excited with a 20 MHz bandwidth long-term evolution signal at 1.7 GHz with 6.5 dB peak-to-average-power ratio (PAPR), the PA achieves an average drain efficiency of 50.3% with -32.0 dBc adjacent-channel-power leakage ratio (ACLR) and an average drain efficiency of 47.8% with -54.0 dBc ACLR after digital predistortion linearization.

Frequency-Agile Class-J Power Amplifier With Clockwise Fundamental- and Second-Harmonic Loads

A novel frequency-agile power amplifier (PA) designed with a modified class-J theory enforcing constant maximum and minimum instantaneous drain voltages for all frequencies is presented. The resulting high-efficiency class-J mode that requires a reconfigurable drain supply exhibits clockwise fundamental- and second-harmonic load impedance trajectories versus frequency facilitating the PA design. This clockwise-loaded class-J (CLCJ) mode enables frequency-agile capability with enhanced efficiency when the proper drain supply voltage codesigned with the clockwise fundamental and harmonic loads is applied. The CLCJ PA designed from 0.8 to 2.4 GHz exhibits the measured drain efficiency in 57%–78% and 61%–86% ranges when operated in low and high compressions, respectively. To validate the frequency agility, 3G (2.84 MHz), 4G (20 MHz), and 5G (100 MHz) modulated signals were measured at different operating frequencies from 0.8 to 2.4 GHz. At 2 GHz, the average drain efficiency improved from 53% to 68% for CW signals and from 56.6% to 66.3% for a frequency-modulated 30-MHz chirp radar signal with second-harmonic injection.

Input-Harmonic-Controlled Broadband Continuous Class-F Power Amplifiers for Sub-6-GHz 5G Applications

A comprehensive analysis is presented for investigating the effects of input nonlinearity on performance and broadband design of continuous-mode class-F power amplifiers (PAs). New time-domain waveforms are derived considering input and output harmonic terminations for continuous-mode class-F operation. The derived design equations show that the typical fundamental load design space of a continuous class-F PA must be reengineered in the presence of second-harmonic input nonlinearity to new design space in order to achieve optimum class-F PA performance versus varying second-harmonic load impedance. For the practical validation, the impacts of input nonlinearity on the performance of continuous-mode class-F PAs are first confirmed with pulsed vector load–pull (VLP) measurements on a low-power GaN 2-mm device. Second, a broadband high-power GaN 24-mm part is designed following the proposed theory with in-package input second-harmonic terminations targeting 1.75–2.3-GHz frequency band for the sub-6 GHz 5G high-power applications. Efficiency higher than 65% with peak power more than 53.2 dBm was maintained over the target frequency band, with excellent flatness. Third, a Doherty PA is implemented based on the designed GaN 24-mm part to evaluate the broadband performance with modulated stimuli. Using a multicarrier signal having an instantaneous bandwidth of 395 MHz, the average drain efficiency of the Doherty PA at 8-dB output back-off is higher than 44%, and the linearized adjacent channel power ratio (ACPR) is better than −52 dBc.

Multiband Dual-Mode Doherty Power Amplifier Employing Phase Periodic Matching Network and Reciprocal Gate Bias for 5G Applications

This article presents a novel method to design the multiband Doherty power amplifier (DPA). It is illustrated that phase periodic matching networks (PPMNs) can be used as multiband impedance inverters, off-set elements, and phase compensators to realize multiband DPAs. Moreover, the number of Doherty operation bands can be further increased by employing the reciprocal gate biases. A six-band dual-mode DPA with 1.8-2.2-/3.9-4.3-GHz operation bands in Mode I and 1.52-1.72-/2.38-2.53-/3.67-3.82-/4.53-4.68-GHz operation bands in Mode II using commercial GaN transistors is designed and implemented to validate the proposed method. The fabricated DPA achieves 8.7-13.5-dB gain and 39.6-41.5-dBm peak output power at all the designed bands. Drain efficiency of 49.2%-54.5% and 42.2%-56.7% is measured at a 6-dB output back-off in Mode I and Mode II, respectively. When stimulated by a five-carrier 100-MHz OFDM signal with a 7.7-dB peak-to-average power ratio (PAPR), adjacent channel power ratio (ACPR) of better than -48.9 dBc can be obtained by the proposed DPA after digital predistortion with 35.5%-50.1% average drain efficiency at 1.65/1.95/2.45/3.75/4.1/4.6 GHz, respectively.

A High Efficiency Multi-Mode Outphasing RF Power Amplifier With 31.6 dBm Peak Output Power in 45nm CMOS

A high efficiency multi-mode class-E outphasing RF power amplifier (PA) with a passive combining circuit is presented. The multi-mode PA combines multiple class-E amplifier branches and can work in different configurations. The PA improves efficiency at lower power levels by switching ‘on’ and ‘off’ individual branches in a static or dynamic manner and using Efficiency Enhancement Circuit (EEC). The proposed power amplifier is designed in 45nm CMOS technology. The PA delivers 31.6 dBm peak output power at 2.4 GHz with 49.2% drain efficiency in high power single level mode. With 64-QAM long-term evolution (LTE) signal with 10 MHz and 20 MHz bandwidth, −57 dBc and −53 dBc adjacent channel power ratio (ACPR) are obtained in single level outphasing (SLO) mode after digital pre-distortion (DPD). 25% and 33% average drain efficiency are achieved with LTE signal with 6 dB peak-to-average power ratio (PAPR) in single level outphasing and asymmetric multilevel outphasing (AMO) mode, respectively. The PA satisfies the spectral mask requirement of 802.11g WLAN signal with high margin. Error vector magnitude (EVM) of 1.1% (−39.36 dB) is obtained from the PA in single level outphasing high power mode after DPD with 64-QAM LTE signal with 10 MHz bandwidth.

Injection Locking in Switching Power Amplifiers

In this work, injection locking in switching power amplifiers (PAs) is studied. Traditionally, injection-locked PAs (ILPAs) have supported phase modulation, with injection locking used primarily to improve the power-added efficiency by reducing the power required to drive the ILPA. Since the output power in conventional ILPA architectures is mainly contributed by the locked oscillator in an ILPA, the amplitude modulation is difficult to achieve unless supply modulation is employed. In the ILPA presented in this work, it is shown that by injection locking a switching PA and a power oscillator, improvement in both power-added efficiency and drain efficiency can be achieved as compared to just a switching PA. Moreover, amplitude modulation at a fixed supply voltage is achieved using an RF-DAC approach to scale both the switching PA and the locked oscillator. This approach employs variable injection-strengths varying from ≤1 (weak injection locking) to >1 (strong injection locking) to achieve the required power back-off. Accordingly, new formulations are introduced to extend the existing injection locking theory for injection strengths >1 case in ILPAs. Benefits of a larger injection strength on lock-range, maximum allowable symbol rate, AM-PM distortion and phase noise performance for an ILPA is provided. An ILPA is designed to support 64-QAM and implemented in a standard 65-nm bulk CMOS process. A peak drain efficiency of 42.7% and power-added efficiency of 40% is measured at the highest output power of 23 dBm, operating from a 1.45 V PA power supply at 2.5 GHz. Modulation tests with 5/50 MSym/s 64-QAM signals achieve the measured RMS EVM of 1.9%/3.1% with the average output power, drain efficiency and power-added efficiency of 18.1 dBm, 27.9% and 25.8% at 2.5 GHz, respectively.

A Highly Extended High-Efficiency Range Class-F–C Doherty Power Amplifier

This paper presents a new extended high-efficiency-range Doherty power amplifier (DPA) with a main and only a single auxiliary amplifier. In order to extend the output high-efficiency range with a high-efficiency level, asymmetrical cells are employed as the main and auxiliary amplifiers in class-F and class-C complex combining load (CCL) methodology, respectively. To verify the proposed methodology, a DPA with 12-dB output back-off (OBO) is designed and fabricated for wideband code division multiple access (WCDMA) applications. Large-signal continuous-wave measurement results show the power gain of about 11[Formula: see text]dB with a drain efficiency of 59.9% at 12[Formula: see text]dB of OBO. A two-tone test exhibits a third-order intermodulation distortion (IMD) of lower than [Formula: see text][Formula: see text]dBc. Modulated wave measurements show over 55% of average drain efficiency and an adjacent channel leakage power ratio (ACLR) of lower than [Formula: see text][Formula: see text]dBc at an output power level of 31.5[Formula: see text]dBm.

Novel Outphasing Power Amplifiers Designed With an Analytic Generalized Doherty–Chireix Continuum Theory

An analytic theory for dual-input outphasing power amplifiers that incorporate in one unified treatment, the continuum of solutions for power combining including the Doherty and Chireix modes is presented. This unified theory developed at the current-source reference planes reveals the performance trade-off achieved by all of the possible power amplifier (PA) combiners within the continuum of solutions. Furthermore, it identifies a novel type of dual-input hybrid Chireix–Doherty PA that combines key features of the Doherty and Chireix operations such that the fundamental drain voltages applied to both the main and auxiliary transistors remain constant. This hybrid PA relies on an input outphasing angle varying with the input power level to obtain the correct load modulation behavior. A 2-GHz dual-input hybrid Chireix–Doherty PA is implemented using nonlinear embedding and experimentally evaluated to validate the theory. A drain efficiency of 61% at 9-dB backoff power and a maximum output power of about 43 dBm are obtained for continuous-wave (CW) measurements. The efficiency increases monotonously with output power unlike that of the Doherty PA used for comparison. When excited with a 20-MHz LTE signal with 9.5-dB peak-to-average power ratio (PAPR), the dual-input PA yields a 60.0% average drain efficiency and −48.1-dBc adjacent-channel power-leakage ratio (ACLR) after linearization.